JP5264640B2 - 積層型半導体装置及びその製造方法 - Google Patents

積層型半導体装置及びその製造方法 Download PDF

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Publication number
JP5264640B2
JP5264640B2 JP2009173037A JP2009173037A JP5264640B2 JP 5264640 B2 JP5264640 B2 JP 5264640B2 JP 2009173037 A JP2009173037 A JP 2009173037A JP 2009173037 A JP2009173037 A JP 2009173037A JP 5264640 B2 JP5264640 B2 JP 5264640B2
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Prior art keywords
jig
opening
common electrode
semiconductor device
chip structure
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JP2009173037A
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Japanese (ja)
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JP2011029370A5 (https=
JP2011029370A (ja
Inventor
昌宏 春原
昭仁 高野
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Priority to JP2009173037A priority Critical patent/JP5264640B2/ja
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Publication of JP2011029370A5 publication Critical patent/JP2011029370A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/093—Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5524—Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2009173037A 2009-07-24 2009-07-24 積層型半導体装置及びその製造方法 Active JP5264640B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009173037A JP5264640B2 (ja) 2009-07-24 2009-07-24 積層型半導体装置及びその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009173037A JP5264640B2 (ja) 2009-07-24 2009-07-24 積層型半導体装置及びその製造方法

Publications (3)

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JP2011029370A JP2011029370A (ja) 2011-02-10
JP2011029370A5 JP2011029370A5 (https=) 2012-07-12
JP5264640B2 true JP5264640B2 (ja) 2013-08-14

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Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6727111B2 (ja) * 2016-12-20 2020-07-22 新光電気工業株式会社 半導体装置及びその製造方法
CN111081687B (zh) * 2019-12-16 2022-02-01 东莞记忆存储科技有限公司 一种堆叠式芯片封装结构及其封装方法
JP7513301B2 (ja) * 2020-04-03 2024-07-09 ウルトラメモリ株式会社 メモリユニット、半導体モジュール、ｄｉｍｍモジュール、及びそれらの製造方法
CN114582842B (zh) * 2022-02-28 2025-11-07 珠海天成先进半导体科技有限公司 一种形成三维立体堆叠芯片结构的底部填充方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2670323B1 (fr) * 1990-12-11 1997-12-12 Thomson Csf Procede et dispositif d'interconnexion de circuits integres en trois dimensions.
US5466634A (en) * 1994-12-20 1995-11-14 International Business Machines Corporation Electronic modules with interconnected surface metallization layers and fabrication methods therefore
KR100379835B1 (ko) * 1998-12-31 2003-06-19 앰코 테크놀로지 코리아 주식회사 반도체패키지및그제조방법
JP3476383B2 (ja) * 1999-05-27 2003-12-10 シャープ株式会社 半導体積層パッケージ
JP2009071095A (ja) * 2007-09-14 2009-04-02 Spansion Llc 半導体装置の製造方法

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