JP5227258B2 - Pll周波数シンセサイザ - Google Patents
Pll周波数シンセサイザ Download PDFInfo
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- JP5227258B2 JP5227258B2 JP2009121118A JP2009121118A JP5227258B2 JP 5227258 B2 JP5227258 B2 JP 5227258B2 JP 2009121118 A JP2009121118 A JP 2009121118A JP 2009121118 A JP2009121118 A JP 2009121118A JP 5227258 B2 JP5227258 B2 JP 5227258B2
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- phase difference
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- oscillation signal
- phase
- difference signal
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- 230000010355 oscillation Effects 0.000 claims description 112
- 239000003990 capacitor Substances 0.000 claims description 27
- 230000003111 delayed effect Effects 0.000 claims description 6
- 230000000052 comparative effect Effects 0.000 description 56
- 238000010586 diagram Methods 0.000 description 20
- 238000007599 discharging Methods 0.000 description 3
- 230000010363 phase shift Effects 0.000 description 3
- 239000013078 crystal Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000013016 damping Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
- H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Description
Claims (5)
- 入力される制御電圧値に応じた周波数を有する発振信号を出力する電圧制御発振器と、
前記電圧制御発振器から出力される発振信号または該発振信号の周波数を分周した周波数を有する信号を帰還発振信号として入力するとともに、基準発振信号をも入力し、これら帰還発振信号と基準発振信号との位相差を検出して、前記基準発振信号に対して前記帰還発振信号の位相が遅れているときに第1位相差信号を出力し、前記基準発振信号に対して前記帰還発振信号の位相が進んでいるときに第2位相差信号を出力する位相比較部と、
前記位相比較部から出力される第1位相差信号および第2位相差信号を入力して、前記基準発振信号のN周期(Nは2以上の整数)のうちM周期(Mは1以上N未満の整数)の割合で前記第1位相差信号および前記第2位相差信号を出力するゲート部と、
前記ゲート部から出力される第1位相差信号および第2位相差信号を入力して、これらの信号が表す位相差に応じた充放電電流を出力するチャージポンプと、
前記チャージポンプの出力端に接続される第1端と基準電位に接続される第2端とを有し、前記チャージポンプから出力される充放電電流を前記第1端に入力して充放電され、前記第1端の電位に応じた前記制御電圧値を前記電圧制御発振器へ出力する容量素子と、
前記位相比較部から出力される第1位相差信号および第2位相差信号を入力して、これらの信号が表す位相差に応じて前記容量素子の第1端の電位を上昇または下降させる電位調整部と、
を備えることを特徴とするPLL周波数シンセサイザ。 - 前記容量素子の前記第1端と前記電圧制御発振器の入力端との間に設けられたローパスフィルタを更に備えることを特徴とする請求項1に記載のPLL周波数シンセサイザ。
- 前記電位調整部が、
前記位相比較部から出力される第1位相差信号を入力する第1バッファと、
この第1バッファの出力端と前記容量素子の前記第1端との間に設けられた第1容量素子と、
前記位相比較部から出力される第2位相差信号を入力する第2バッファと、
この第2バッファの出力端と前記容量素子の前記第1端との間に設けられた第2容量素子と、
を含むことを特徴とする請求項1に記載のPLL周波数シンセサイザ。 - 前記電位調整部が、
前記第1バッファの出力端と前記第1容量素子との間に設けられた第1抵抗器と、
前記第2バッファの出力端と前記第2容量素子との間に設けられた第2抵抗器と、
を含むことを特徴とする請求項3に記載のPLL周波数シンセサイザ。 - 前記電位調整部が、前記第1バッファおよび前記第2バッファそれぞれを駆動するLDO電源を含む、ことを特徴とする請求項3に記載のPLL周波数シンセサイザ。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009121118A JP5227258B2 (ja) | 2009-05-19 | 2009-05-19 | Pll周波数シンセサイザ |
US12/781,468 US8513990B2 (en) | 2009-05-19 | 2010-05-17 | PLL frequency synthesizer |
CN2010101828675A CN101895293B (zh) | 2009-05-19 | 2010-05-19 | Pll频率合成器 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009121118A JP5227258B2 (ja) | 2009-05-19 | 2009-05-19 | Pll周波数シンセサイザ |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2010272968A JP2010272968A (ja) | 2010-12-02 |
JP5227258B2 true JP5227258B2 (ja) | 2013-07-03 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009121118A Active JP5227258B2 (ja) | 2009-05-19 | 2009-05-19 | Pll周波数シンセサイザ |
Country Status (3)
Country | Link |
---|---|
US (1) | US8513990B2 (ja) |
JP (1) | JP5227258B2 (ja) |
CN (1) | CN101895293B (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8634512B2 (en) * | 2011-02-08 | 2014-01-21 | Qualcomm Incorporated | Two point modulation digital phase locked loop |
US10819356B2 (en) * | 2017-05-24 | 2020-10-27 | Thine Electronics, Inc. | PLL frequency synthesizer |
JP7104402B2 (ja) * | 2018-05-25 | 2022-07-21 | ザインエレクトロニクス株式会社 | Pll回路 |
US11025260B1 (en) * | 2020-08-26 | 2021-06-01 | Qualcomm Incorporated | Phase-locked loop (PLL) with multiple error determiners |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5525932A (en) * | 1994-08-31 | 1996-06-11 | International Business Machines Corporation | Lock indicator for phase locked loop circuit |
JPH0879064A (ja) * | 1994-08-31 | 1996-03-22 | Nec Corp | 位相同期ループ回路 |
JP2001274682A (ja) * | 2000-03-27 | 2001-10-05 | Toshiba Corp | フェーズロックドループ回路 |
JP2002124874A (ja) * | 2000-10-13 | 2002-04-26 | Kawasaki Microelectronics Kk | 半導体装置 |
JP4138264B2 (ja) | 2001-03-16 | 2008-08-27 | 富士通株式会社 | Pll周波数シンセサイザ |
US6553089B2 (en) * | 2001-03-20 | 2003-04-22 | Gct Semiconductor, Inc. | Fractional-N frequency synthesizer with fractional compensation method |
EP1282234A1 (en) * | 2001-07-31 | 2003-02-05 | Texas Instruments Incorporated | Loop filter architecture |
US6762631B1 (en) * | 2001-11-06 | 2004-07-13 | National Semiconductor Corporation | Lock detection circuit for a phase locked loop circuit |
JP4220828B2 (ja) * | 2003-04-25 | 2009-02-04 | パナソニック株式会社 | 低域ろ波回路、フィードバックシステムおよび半導体集積回路 |
EP1734655A1 (en) * | 2004-03-26 | 2006-12-20 | Matsushita Electric Industrial Co., Ltd. | Switched capacitor filter and feedback system |
US7345550B2 (en) * | 2005-12-05 | 2008-03-18 | Sirific Wireless Corporation | Type II phase locked loop using dual path and dual varactors to reduce loop filter components |
US7355486B2 (en) * | 2006-03-31 | 2008-04-08 | International Business Machines Corporation | Current controlled oscillation device and method having wide frequency range |
US20070247199A1 (en) * | 2006-04-19 | 2007-10-25 | Mediatek Inc. | Phase-locked loop apparatus having aligning unit and method using the same |
JP5102603B2 (ja) * | 2007-12-21 | 2012-12-19 | ルネサスエレクトロニクス株式会社 | 半導体集積回路 |
TWI371923B (en) * | 2009-01-21 | 2012-09-01 | Univ Nat Taiwan | Phase locked loop |
-
2009
- 2009-05-19 JP JP2009121118A patent/JP5227258B2/ja active Active
-
2010
- 2010-05-17 US US12/781,468 patent/US8513990B2/en active Active
- 2010-05-19 CN CN2010101828675A patent/CN101895293B/zh active Active
Also Published As
Publication number | Publication date |
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CN101895293A (zh) | 2010-11-24 |
US8513990B2 (en) | 2013-08-20 |
CN101895293B (zh) | 2012-11-14 |
US20100295587A1 (en) | 2010-11-25 |
JP2010272968A (ja) | 2010-12-02 |
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