JP5222012B2 - 半導体発光素子及びその製造方法 - Google Patents
半導体発光素子及びその製造方法 Download PDFInfo
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- JP5222012B2 JP5222012B2 JP2008114399A JP2008114399A JP5222012B2 JP 5222012 B2 JP5222012 B2 JP 5222012B2 JP 2008114399 A JP2008114399 A JP 2008114399A JP 2008114399 A JP2008114399 A JP 2008114399A JP 5222012 B2 JP5222012 B2 JP 5222012B2
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- sapphire
- zno
- based semiconductor
- semiconductor light
- plane substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/28—Materials of the light emitting region containing only elements of group II and group VI of the periodic system
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/16—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
Description
第1の層としてNi層が積層され第2の層としてAu層が積層された構造(以下、Ni/Au積層構造と表記する)を形成する。続いて、リフトオフ法により、レジストマスクと、レジストマスクの開口部以外に積層されたNi/Au積層構造を取り除くことにより、p型ZnO系半導体層14上にp側電極16の形状を有するNi/Au積層構造が形成される。続いて、前記Ni/Au積層構造を、RTA(ラピッド・サーマル・アニーラー)により酸素10%雰囲気下で500℃の温度で30秒間の時間処理することにより、透明化する。以上により、図1に示すように、p型ZnO系半導体層14上に透光性電極からなるp側電極16が形成される。
Claims (4)
- αサファイア単結晶からなりA面{11−20}を主面とするサファイアA面基板上に形成されたZnO系半導体層を備えるZnO系半導体発光素子であって、
該サファイアA面基板は、50〜200μmの範囲の厚さを備え、c軸に直交するm軸に対して53.7±1.0°の角度をなし、互いに平行な2本の第1の辺と、該第1の辺に直交し、互いに平行な2本の第2の辺とで囲まれているか、又は、該m軸に対して36.3±1.0°の角度をなし、互いに平行な2本の第1の辺と、該第1の辺に直交し、互いに平行な2本の第2の辺とで囲まれていて、矩形に形成されていることを特徴とするZnO系半導体発光素子。 - 高さに対する一辺の長さの比として表されるアスペクト比が2〜4の範囲であることを特徴とする請求項1に記載のZnO系半導体発光素子。
- αサファイア単結晶からなりA面{11−20}を主面とするサファイアA面基板上に形成されたZnO系半導体層を備えるZnO系半導体発光素子の製造方法において、
50〜200μmの範囲の厚さを備える該サファイアA面基板の表面に該ZnO系半導体層を形成する工程と、
該サファイアA面基板の該ZnO系半導体層が形成された面の反対面に、c軸に直交するm軸に対して53.7±1.0°の角度をなすか、又は、該m軸に対して36.3±1.0°の角度をなす第1のスクライブ溝を形成する工程と、
該サファイアA面基板の該反対面に、該第1のスクライブ溝に直交する第2のスクライブ溝を形成する工程と、
該サファイアA面基板を、該第1のスクライブ溝でブレーキングし、続いて該第2のスクライブ溝でブレーキングする工程とを備えることを特徴とするZnO系半導体発光素子の製造方法。 - 前記ブレーキングにより、高さに対する一辺の長さの比として表されるアスペクト比が2〜4の範囲である前記ZnO系半導体発光素子を形成することを特徴とする請求項3に記載のZnO系半導体発光素子の製造方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008114399A JP5222012B2 (ja) | 2008-04-24 | 2008-04-24 | 半導体発光素子及びその製造方法 |
US12/428,768 US8124969B2 (en) | 2008-04-24 | 2009-04-23 | Semiconductor light emitting element and method for manufacturing the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008114399A JP5222012B2 (ja) | 2008-04-24 | 2008-04-24 | 半導体発光素子及びその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009267059A JP2009267059A (ja) | 2009-11-12 |
JP5222012B2 true JP5222012B2 (ja) | 2013-06-26 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2008114399A Expired - Fee Related JP5222012B2 (ja) | 2008-04-24 | 2008-04-24 | 半導体発光素子及びその製造方法 |
Country Status (2)
Country | Link |
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US (1) | US8124969B2 (ja) |
JP (1) | JP5222012B2 (ja) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4968660B2 (ja) * | 2005-08-24 | 2012-07-04 | スタンレー電気株式会社 | ZnO系化合物半導体結晶の製造方法、及び、ZnO系化合物半導体基板 |
JP2011233870A (ja) * | 2010-04-09 | 2011-11-17 | Mitsubishi Chemicals Corp | 半導体発光装置 |
US20130234166A1 (en) * | 2012-03-08 | 2013-09-12 | Ting-Chia Ko | Method of making a light-emitting device and the light-emitting device |
KR102306671B1 (ko) * | 2015-06-16 | 2021-09-29 | 삼성전자주식회사 | 발광 소자 패키지 |
JP6814646B2 (ja) * | 2017-01-23 | 2021-01-20 | 株式会社ディスコ | 光デバイスウェーハの加工方法 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3303645B2 (ja) * | 1995-12-04 | 2002-07-22 | 日亜化学工業株式会社 | 窒化物半導体発光素子の製造方法 |
US6674098B1 (en) * | 1999-07-26 | 2004-01-06 | National Institute Of Advanced Industrial Science And Technology | ZnO compound semiconductor light emitting element |
JP2003086541A (ja) * | 2001-09-11 | 2003-03-20 | Toyoda Gosei Co Ltd | 半導体デバイス用サファイア基板の切断方法 |
JP5060732B2 (ja) * | 2006-03-01 | 2012-10-31 | ローム株式会社 | 発光素子及びこの発光素子の製造方法 |
-
2008
- 2008-04-24 JP JP2008114399A patent/JP5222012B2/ja not_active Expired - Fee Related
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2009
- 2009-04-23 US US12/428,768 patent/US8124969B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
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US8124969B2 (en) | 2012-02-28 |
JP2009267059A (ja) | 2009-11-12 |
US20090267065A1 (en) | 2009-10-29 |
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