JP5219094B2 - 基板の表面を再生する方法 - Google Patents

基板の表面を再生する方法 Download PDF

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Publication number
JP5219094B2
JP5219094B2 JP2009294040A JP2009294040A JP5219094B2 JP 5219094 B2 JP5219094 B2 JP 5219094B2 JP 2009294040 A JP2009294040 A JP 2009294040A JP 2009294040 A JP2009294040 A JP 2009294040A JP 5219094 B2 JP5219094 B2 JP 5219094B2
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JP
Japan
Prior art keywords
layer
filler
substrate
raised
polishing
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Expired - Fee Related
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JP2009294040A
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English (en)
Japanese (ja)
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JP2010186987A (ja
JP2010186987A5 (enExample
Inventor
アラミ−イドリッシ アジズ
ケルディレス セバスティアン
シュワーゼンバッハ ウォルター
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Soitec SA
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Soitec SA
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Publication date
Application filed by Soitec SA filed Critical Soitec SA
Publication of JP2010186987A publication Critical patent/JP2010186987A/ja
Publication of JP2010186987A5 publication Critical patent/JP2010186987A5/ja
Application granted granted Critical
Publication of JP5219094B2 publication Critical patent/JP5219094B2/ja
Expired - Fee Related legal-status Critical Current
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02032—Preparing bulk and homogeneous wafers by reclaiming or re-processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
JP2009294040A 2009-02-12 2009-12-25 基板の表面を再生する方法 Expired - Fee Related JP5219094B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP09290104.0 2009-02-12
EP09290104A EP2219208B1 (en) 2009-02-12 2009-02-12 Method for reclaiming a surface of a substrate

Publications (3)

Publication Number Publication Date
JP2010186987A JP2010186987A (ja) 2010-08-26
JP2010186987A5 JP2010186987A5 (enExample) 2012-07-19
JP5219094B2 true JP5219094B2 (ja) 2013-06-26

Family

ID=40725919

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009294040A Expired - Fee Related JP5219094B2 (ja) 2009-02-12 2009-12-25 基板の表面を再生する方法

Country Status (7)

Country Link
US (1) US8435897B2 (enExample)
EP (1) EP2219208B1 (enExample)
JP (1) JP5219094B2 (enExample)
KR (1) KR101536334B1 (enExample)
CN (1) CN101866824B (enExample)
SG (1) SG164310A1 (enExample)
TW (1) TWI480939B (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100022070A1 (en) * 2008-07-22 2010-01-28 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing soi substrate
FR2971365B1 (fr) * 2011-02-08 2013-02-22 Soitec Silicon On Insulator Méthode de recyclage d'un substrat source
JP5799740B2 (ja) * 2011-10-17 2015-10-28 信越半導体株式会社 剥離ウェーハの再生加工方法
CN103646867B (zh) * 2013-11-29 2016-04-06 上海华力微电子有限公司 改善晶圆剥落缺陷的方法
JP6676365B2 (ja) * 2015-12-21 2020-04-08 キヤノン株式会社 撮像装置の製造方法
FR3074608B1 (fr) 2017-12-05 2019-12-06 Soitec Procede de preparation d'un residu de substrat donneur, substrat obtenu a l'issu de ce procede, et utilisation d'un tel susbtrat
US10373818B1 (en) * 2018-01-31 2019-08-06 Taiwan Semiconductor Manufacturing Co., Ltd. Method of wafer recycling
SE1950611A1 (en) * 2019-05-23 2020-09-29 Ascatron Ab Crystal efficient SiC device wafer production
FR3120159B1 (fr) 2021-02-23 2023-06-23 Soitec Silicon On Insulator Procédé de préparation du résidu d’un substrat donneur ayant subi un prélèvement d’une couche par délamination
CN113192823B (zh) * 2021-04-27 2022-06-21 麦斯克电子材料股份有限公司 一种soi键合工艺后衬底片的再生加工方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5867302A (en) * 1997-08-07 1999-02-02 Sandia Corporation Bistable microelectromechanical actuator
JPH11195775A (ja) * 1997-12-26 1999-07-21 Sony Corp 半導体基板および薄膜半導体素子およびそれらの製造方法ならびに陽極化成装置
SG71903A1 (en) * 1998-01-30 2000-04-18 Canon Kk Process of reclamation of soi substrate and reproduced substrate
US6863593B1 (en) 1998-11-02 2005-03-08 Applied Materials, Inc. Chemical mechanical polishing a substrate having a filler layer and a stop layer
JP3943782B2 (ja) 1999-11-29 2007-07-11 信越半導体株式会社 剥離ウエーハの再生処理方法及び再生処理された剥離ウエーハ
CN1270366C (zh) * 2002-06-04 2006-08-16 中芯国际集成电路制造(上海)有限公司 可重复使用的晶圆控片及其形成方法
WO2004019403A2 (en) * 2002-08-26 2004-03-04 S.O.I.Tec Silicon On Insulator Technologies Mechanical recycling of a wafer comprising a buffer layer, after having taken a layer therefrom
JP4492054B2 (ja) * 2003-08-28 2010-06-30 株式会社Sumco 剥離ウェーハの再生処理方法及び再生されたウェーハ
US6987055B2 (en) * 2004-01-09 2006-01-17 Micron Technology, Inc. Methods for deposition of semiconductor material
US7402520B2 (en) * 2004-11-26 2008-07-22 Applied Materials, Inc. Edge removal of silicon-on-insulator transfer wafer

Also Published As

Publication number Publication date
US8435897B2 (en) 2013-05-07
TW201030830A (en) 2010-08-16
JP2010186987A (ja) 2010-08-26
SG164310A1 (en) 2010-09-29
CN101866824A (zh) 2010-10-20
EP2219208B1 (en) 2012-08-29
US20100200854A1 (en) 2010-08-12
KR20100092363A (ko) 2010-08-20
CN101866824B (zh) 2014-03-05
TWI480939B (zh) 2015-04-11
KR101536334B1 (ko) 2015-07-13
EP2219208A1 (en) 2010-08-18

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