KR101536334B1 - 기판의 표면을 재생하는 방법 - Google Patents
기판의 표면을 재생하는 방법 Download PDFInfo
- Publication number
- KR101536334B1 KR101536334B1 KR1020090109607A KR20090109607A KR101536334B1 KR 101536334 B1 KR101536334 B1 KR 101536334B1 KR 1020090109607 A KR1020090109607 A KR 1020090109607A KR 20090109607 A KR20090109607 A KR 20090109607A KR 101536334 B1 KR101536334 B1 KR 101536334B1
- Authority
- KR
- South Korea
- Prior art keywords
- layer
- substrate
- protruding
- polishing
- thickness
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02032—Preparing bulk and homogeneous wafers by reclaiming or re-processing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP09290104.0 | 2009-02-12 | ||
| EP09290104A EP2219208B1 (en) | 2009-02-12 | 2009-02-12 | Method for reclaiming a surface of a substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20100092363A KR20100092363A (ko) | 2010-08-20 |
| KR101536334B1 true KR101536334B1 (ko) | 2015-07-13 |
Family
ID=40725919
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020090109607A Expired - Fee Related KR101536334B1 (ko) | 2009-02-12 | 2009-11-13 | 기판의 표면을 재생하는 방법 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US8435897B2 (enExample) |
| EP (1) | EP2219208B1 (enExample) |
| JP (1) | JP5219094B2 (enExample) |
| KR (1) | KR101536334B1 (enExample) |
| CN (1) | CN101866824B (enExample) |
| SG (1) | SG164310A1 (enExample) |
| TW (1) | TWI480939B (enExample) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100022070A1 (en) * | 2008-07-22 | 2010-01-28 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing soi substrate |
| FR2971365B1 (fr) * | 2011-02-08 | 2013-02-22 | Soitec Silicon On Insulator | Méthode de recyclage d'un substrat source |
| JP5799740B2 (ja) * | 2011-10-17 | 2015-10-28 | 信越半導体株式会社 | 剥離ウェーハの再生加工方法 |
| CN103646867B (zh) * | 2013-11-29 | 2016-04-06 | 上海华力微电子有限公司 | 改善晶圆剥落缺陷的方法 |
| JP6676365B2 (ja) * | 2015-12-21 | 2020-04-08 | キヤノン株式会社 | 撮像装置の製造方法 |
| FR3074608B1 (fr) | 2017-12-05 | 2019-12-06 | Soitec | Procede de preparation d'un residu de substrat donneur, substrat obtenu a l'issu de ce procede, et utilisation d'un tel susbtrat |
| US10373818B1 (en) * | 2018-01-31 | 2019-08-06 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of wafer recycling |
| SE1950611A1 (en) * | 2019-05-23 | 2020-09-29 | Ascatron Ab | Crystal efficient SiC device wafer production |
| FR3120159B1 (fr) | 2021-02-23 | 2023-06-23 | Soitec Silicon On Insulator | Procédé de préparation du résidu d’un substrat donneur ayant subi un prélèvement d’une couche par délamination |
| CN113192823B (zh) * | 2021-04-27 | 2022-06-21 | 麦斯克电子材料股份有限公司 | 一种soi键合工艺后衬底片的再生加工方法 |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5867302A (en) * | 1997-08-07 | 1999-02-02 | Sandia Corporation | Bistable microelectromechanical actuator |
| JP2001155978A (ja) * | 1999-11-29 | 2001-06-08 | Shin Etsu Handotai Co Ltd | 剥離ウエーハの再生処理方法及び再生処理された剥離ウエーハ |
| EP1662560A2 (en) * | 2004-11-26 | 2006-05-31 | Applied Materials, Inc. | Edge removal of silicon-on-insulator transfer wafer |
| US20060121699A1 (en) * | 2004-01-09 | 2006-06-08 | Blomiley Eric R | Deposition methods |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11195775A (ja) * | 1997-12-26 | 1999-07-21 | Sony Corp | 半導体基板および薄膜半導体素子およびそれらの製造方法ならびに陽極化成装置 |
| SG71903A1 (en) * | 1998-01-30 | 2000-04-18 | Canon Kk | Process of reclamation of soi substrate and reproduced substrate |
| US6863593B1 (en) | 1998-11-02 | 2005-03-08 | Applied Materials, Inc. | Chemical mechanical polishing a substrate having a filler layer and a stop layer |
| CN1270366C (zh) * | 2002-06-04 | 2006-08-16 | 中芯国际集成电路制造(上海)有限公司 | 可重复使用的晶圆控片及其形成方法 |
| WO2004019403A2 (en) * | 2002-08-26 | 2004-03-04 | S.O.I.Tec Silicon On Insulator Technologies | Mechanical recycling of a wafer comprising a buffer layer, after having taken a layer therefrom |
| JP4492054B2 (ja) * | 2003-08-28 | 2010-06-30 | 株式会社Sumco | 剥離ウェーハの再生処理方法及び再生されたウェーハ |
-
2009
- 2009-02-12 EP EP09290104A patent/EP2219208B1/en not_active Not-in-force
- 2009-10-29 SG SG200907181-2A patent/SG164310A1/en unknown
- 2009-10-30 TW TW098136973A patent/TWI480939B/zh not_active IP Right Cessation
- 2009-11-13 KR KR1020090109607A patent/KR101536334B1/ko not_active Expired - Fee Related
- 2009-12-16 CN CN200910246888.6A patent/CN101866824B/zh not_active Expired - Fee Related
- 2009-12-25 JP JP2009294040A patent/JP5219094B2/ja not_active Expired - Fee Related
-
2010
- 2010-02-12 US US12/658,655 patent/US8435897B2/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5867302A (en) * | 1997-08-07 | 1999-02-02 | Sandia Corporation | Bistable microelectromechanical actuator |
| JP2001155978A (ja) * | 1999-11-29 | 2001-06-08 | Shin Etsu Handotai Co Ltd | 剥離ウエーハの再生処理方法及び再生処理された剥離ウエーハ |
| US20060121699A1 (en) * | 2004-01-09 | 2006-06-08 | Blomiley Eric R | Deposition methods |
| EP1662560A2 (en) * | 2004-11-26 | 2006-05-31 | Applied Materials, Inc. | Edge removal of silicon-on-insulator transfer wafer |
Also Published As
| Publication number | Publication date |
|---|---|
| US8435897B2 (en) | 2013-05-07 |
| TW201030830A (en) | 2010-08-16 |
| JP2010186987A (ja) | 2010-08-26 |
| JP5219094B2 (ja) | 2013-06-26 |
| SG164310A1 (en) | 2010-09-29 |
| CN101866824A (zh) | 2010-10-20 |
| EP2219208B1 (en) | 2012-08-29 |
| US20100200854A1 (en) | 2010-08-12 |
| KR20100092363A (ko) | 2010-08-20 |
| CN101866824B (zh) | 2014-03-05 |
| TWI480939B (zh) | 2015-04-11 |
| EP2219208A1 (en) | 2010-08-18 |
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St.27 status event code: A-0-1-A10-A12-nap-PA0109 |
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| PG1501 | Laying open of application |
St.27 status event code: A-1-1-Q10-Q12-nap-PG1501 |
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St.27 status event code: A-3-3-R10-R13-asn-PN2301 St.27 status event code: A-3-3-R10-R11-asn-PN2301 |
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| A201 | Request for examination | ||
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