TWI322481B - Mechanical recycling of a wafer comprising a buffer layer, after having taken a layer therefrom - Google Patents
Mechanical recycling of a wafer comprising a buffer layer, after having taken a layer therefrom Download PDFInfo
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- TWI322481B TWI322481B TW92123246A TW92123246A TWI322481B TW I322481 B TWI322481 B TW I322481B TW 92123246 A TW92123246 A TW 92123246A TW 92123246 A TW92123246 A TW 92123246A TW I322481 B TWI322481 B TW I322481B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02032—Preparing bulk and homogeneous wafers by reclaiming or re-processing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76256—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques using silicon etch back techniques, e.g. BESOI, ELTRAN
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76259—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along a porous layer
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- Condensed Matter Physics & Semiconductors (AREA)
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- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Description
1322481 A7 B7 五、發明說明(i) 【發明所屬之技術領域】 本發明係關於將薄半導體層從施體晶圓(d〇nor wafer)轉移至接收基板(receiving substrate)後之包含有緩 衝層之體晶圓之回收。 5 【先前技術】 專門用語”緩衝層”通常表示在例如基板之第一晶體 構造以及第二晶體構造之間的轉變層,該第二晶體構造 具有修改材料之特性(例如構造或化學計量特性,或原子 表面再結合特性)之主要功能。 10 在緩衝層之特別情況下,後者可使獲得第二晶體構 造成為可能,而其晶格參數實質上與基板之晶格參數不 同。 為了這個目的,緩衝層可具有隨厚度逐漸變化之組 成物’然後,緩衝層之成·分之逐漸變化係直接與其逐漸 15變化之晶格參數相關。 其亦可具有更複雜的型式(例如具可變速率之組成物 中的變化、速率之符號反轉、或組成物中之不連續跳 經濟部智慧財產局員工消費合作社印製 升),此型式可能利用包含缺陷之固定組成物層而完成。 接著’提及變質(metamorphic)(緩衝)層或變質實施 20 例’例如變質磊晶。 為了產生特別構造’可從施體晶圓摘除產生在緩衝 層上之一層或一疊加層,以便被轉移至接收基板。 將形成於緩衝層上之薄層予以轉移之其中一個主要 應用係關於應變石夕層之形成。 本紙張尺度咖巾_家標^^1^(21“297公釐) 經濟部智慧財產局員工消費合作社印製 發明說明 如果一層之介面 其標稱晶格參數的:::之晶格參數分別大於或小於 變”之材料所構成…一層係由-種拉伸或壓縮"應 否則,如果"鬆他"枯祖脊粗I 參數的話,這m二 一層之標稱晶格 稱晶格參數係為:::弛"材料所構成’其中標 ”” /4在匕的平衡狀態下之整體形式之晶 格參數。 a層係由拉伸應變的梦所構成時,可明顯改善例 如材料之電子移動率之某些特性。 例如SiGe之其他材料實質上亦可受到類似的摘除。 」後’尤其错由被稱為Smart-cut©之製程,且為熟 心本項技藝者所熟知的轉移這種層至接收基板之上使 產生例如SOI(絕緣層上有半導體)構造之構造成為可 能。 舉例而言,在摘除一鬆弛SiGe層之後,所獲得之構 造接著可作為用以使矽成長之支撐。 因為SiGe之標稱晶格參數(取決於鍺含量)係大於石夕 之標稱晶格參數,所以獲得之SG0I(絕缘層上有矽鍺)偽 (pseudo)基板上之矽的成長使提供拉伸應變的矽層成為 2〇 可能。 舉例而言,這種製程之一例係說明於由L. J. Huang 等人所著作之IBM文獻("藉由晶圓接合與層轉移為高性 能·%效電晶體準備之絕緣層上有SiGe (SiGe-On-Ins ul at or prepared by wafer bonding and layer transfer for high- 10 15 本紙張尺度適用中國國家標準(CNS)A4規格(210x297公釐) 装 訂1322481 A7 B7 V. INSTRUCTION DESCRIPTION (i) Technical Field of the Invention The present invention relates to a body including a buffer layer after transferring a thin semiconductor layer from a donor wafer to a receiving substrate. Wafer recycling. 5 [Prior Art] The term "buffer layer" is generally used to mean, for example, a transition layer between a first crystal structure of a substrate and a second crystal structure having properties (eg, structural or stoichiometric properties) of the modified material, Or the main function of the atomic surface recombination properties). 10 In the special case of the buffer layer, the latter makes it possible to obtain a second crystal structure whose lattice parameters are substantially different from those of the substrate. For this purpose, the buffer layer may have a composition that gradually changes with thickness. Then, the gradual change of the buffer layer is directly related to the lattice parameter which gradually changes. It can also have more complex patterns (such as changes in the composition with variable rate, sign reversal of the rate, or discontinuous jumps in the composition of the Ministry of Economic Affairs, Intellectual Property Office, employee consumption cooperative printing), this type It may be done using a fixed composition layer containing defects. Next, a metamorphic (buffering) layer or metamorphism is carried out for 20 cases, such as metamorphic epitaxy. In order to create a special structure, a layer or a superposed layer on the buffer layer may be removed from the donor wafer to be transferred to the receiving substrate. One of the main applications for transferring a thin layer formed on a buffer layer is the formation of a strained layer. This paper scale coffee towel _ home standard ^ ^ 1 ^ (21 "297 mm) Ministry of Economic Affairs Intellectual Property Bureau employee consumption cooperative printed invention description if the interface of the layer of its nominal lattice parameters::: lattice parameters respectively A material that is larger or smaller than "changes" is composed of - a type of stretch or compression "should otherwise, if the "slow him" ancestral ridge coarse I parameter, the nominal lattice of the second layer The lattice parameter is::: relaxation" the material constitutes the 'marker'" /4 in the equilibrium state of the 之 in the overall form of the lattice parameters. When the layer a is composed of a dream of tensile strain, it can significantly improve certain characteristics such as the electron mobility of the material. Other materials such as SiGe may be substantially similarly removed. "After" is a process known as Smart-cut©, and is well known to those skilled in the art to transfer such a layer onto a receiving substrate to produce a structure such as an SOI (semiconductor on insulator) structure. become possible. For example, after removing a relaxed SiGe layer, the resulting structure can then serve as a support for growth of the crucible. Because the nominal lattice parameter of SiGe (depending on the yttrium content) is greater than the nominal lattice parameter of Shi Xi, the SG0I (with 矽锗 on the insulating layer) is obtained on the pseudo substrate. The tensile layer of the strain becomes 2 〇 possible. For example, one example of such a process is described in the IBM literature by LJ Huang et al. ("SiGe (SiGe) is provided on the insulating layer prepared by wafer bonding and layer transfer for high performance and % effect transistors. -On-Ins ul at or prepared by wafer bonding and layer transfer for high- 10 15 This paper size is applicable to China National Standard (CNS) A4 specification (210x297 mm).
1322481 A7 B7 五、發明說明(3) performance field-effect transistors)",Applied Physics Letters,2001年2月26曰,第78卷,第9號)中,於其 中出現製造Si/SGOI構造之方法。 這種製程之另一例係刊載在文獻US 2002/007481 5 中。 變質成長之其他應用是可能的,尤其關於ΠΙ-V族 之半導體。 因此,通常藉由使用以GaAs為基或以InP為基之 技術來製造電晶體。 10 就電子性能而論,InP具有勝過GaAs之實質上的優 點,尤其,InP層與InGaAs或InAlAs層之組合使吾人 可改善電子移動性。 然而,面臨GaAs技術,銷售使用InP技術之組件 之能力受到限制,尤其就成本、可取得率、機械弱點以 15 及主體基板之尺寸而論(與GaAs之6吋直徑比較而言, InP之最大直徑一般係為4忖)。 經濟部智慧財產局員工消費合作社印製 參考接收基板,藉由GaAs基板上之缓衝層之變質 磊晶而移除並獲得之InP層,似乎已找到對於這個問題 之解決方法。 20 然後,某些摘除製程,例如”回蝕”型式之製程,在 摘除期間會導致基板與緩衝層之殘留部分之毀壞。 在一些其他摘除製程中,例如Smart-cut©製程,基 板可回收,但緩衝層會損失。 然而,變質生產技術是複雜的。 本紙張尺度適用中國國家標準(CNS)A4規格(210x297公釐) 1322481 A7 B7 五、發明說明(4 ) -- 因此,充分運用並產生這種緩衝層可能需要一個漫 長、困難且昂貴的運作。 再者,肇因於組成物的變化之内部應變可能導致高 比率之例如錯置與點缺陷之晶體缺陷之出現。 5 尤其可藉由增加厚度使這些内部應變、進而是缺陷 之產生減至最少,晶格參數會隨著厚度改變。 缓衝層通常被製成厚的主要就是為了這個理由而 一般厚度範圍是從1至數微米(/zm)e 然而,經濟上與技術上的拘束限制了緩衝層之某些 10基本特性,例如其厚度或某種構造複雜性。 為了所有這些理由,在每次回收基板之後,完全避 免形成緩衝層將是明智的。 【發明内容】 經濟部智慧財產局員工消費合作社印製. 依據第一實施樣態,本發明意欲藉由提供一種在已 15摘除從半導體材料選取的材料之至少一有用層之後回收 施體晶圓之方法來達成這個目的,該施體晶圓依序包含 一基板、一緩衝構造、以及摘除前之一有用層,該方法 包含移除位於發生摘除之施體晶圓之側面上的物質,其 特徵為:物質之移除包括採用機械手段,俾能在移除物 20質之後’緩衝構造之至少一部分會殘留,此緩衝構造之 至少一部分能夠在後來的有用層摘除期間作為緩衝構造 被再使用。 依據第二實施樣態,本發明提供一種摘除施體晶圓 上之有用層以便被轉移至接收基板之方法,其特徵為: 本紙張尺度適用中國國家標準(CNS)A4規格(210x297公釐) A71322481 A7 B7 5, performance description (3) performance field-effect transistors), "Applied Physics Letters, February 26, 2001, Vol. 78, No. 9", in which the method of manufacturing Si / SGOI structure appears . Another example of such a process is published in document US 2002/007481 5 . Other applications of metamorphic growth are possible, especially with respect to semiconductors of the ΠΙ-V family. Therefore, a transistor is usually fabricated by using a GaAs-based or InP-based technology. 10 In terms of electronic properties, InP has the fundamental advantage over GaAs. In particular, the combination of the InP layer and the InGaAs or InAlAs layer allows us to improve electron mobility. However, in the face of GaAs technology, the ability to sell components using InP technology is limited, especially in terms of cost, availability, mechanical weakness, and the size of the body substrate (the largest InP compared to the 6-inch diameter of GaAs) The diameter is generally 4忖). The Ministry of Economic Affairs' Intellectual Property Office employee consumption cooperative printed the reference receiving substrate, and the InP layer removed and obtained by the metamorphic epitaxial layer of the buffer layer on the GaAs substrate seems to have found a solution to this problem. 20 Then, some ablation processes, such as the "etch back" type process, can cause damage to the residual portions of the substrate and buffer layer during the removal process. In some other removal processes, such as the Smart-cut© process, the substrate can be recycled, but the buffer layer can be lost. However, metamorphic production techniques are complex. This paper scale applies to the Chinese National Standard (CNS) A4 specification (210x297 mm). 1322481 A7 B7 V. INSTRUCTIONS (4) -- Therefore, the full use and production of such a buffer layer may require a long, difficult and expensive operation. Furthermore, the internal strain due to variations in composition may result in the appearance of high ratios of crystal defects such as misalignment and point defects. 5 In particular, by increasing the thickness, these internal strains, and thus the generation of defects, are minimized, and the lattice parameters change with thickness. The buffer layer is usually made thick mainly for this reason and generally has a thickness ranging from 1 to several micrometers (/zm). However, economic and technical constraints limit some of the 10 basic characteristics of the buffer layer, for example Its thickness or some structural complexity. For all of these reasons, it is sensible to completely avoid the formation of a buffer layer after each recovery of the substrate. According to a first embodiment, the present invention is intended to provide a method for recycling a donor wafer after at least one useful layer of material selected from the semiconductor material has been removed. To achieve this, the donor wafer sequentially includes a substrate, a buffer structure, and a useful layer before the removal, the method comprising removing the substance on the side of the donor wafer from which the removal is performed, characterized by: Removal includes mechanical means that at least a portion of the cushioning structure may remain after removal of material 20, at least a portion of which may be reused as a cushioning structure during subsequent removal of the useful layer. According to a second embodiment, the present invention provides a method of removing a useful layer on a donor wafer for transfer to a receiving substrate, characterized in that: the paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 x 297 mm) A7.
其包含: (a) 將施體晶圓接合至接收基板; (b) 使接合至接收基板之有用層與施體晶 圓分離, (c) 遵從該回收方法回收施體晶圓。 5 依據第三實施樣態,本發明提供一種從施體晶圓周 期性摘除有用層之方法,其特徵為:其包含摘除有用層 之數個步驟’這些步驟之每一個都遵從該摘除方法。 依據第四實施樣態,本發明提供一種該周期性摘除 法或該摘除方法之應用,用以產生包含接仗基板與有 10,層之構造’該有用層包含至少一下述材料:、應 變Sp Ge、屬於ΙΠ_ν族之合金、其係分別從可能的 (八1如,111),,1),^)之組合選取之組成物。 依據第五只知樣態,本發明提供一種藉由摘除提供 有用層,且其能夠遵從該回收方法而被回收之施體晶 15圓,其特徵為:其依序包含一基板與緩衝構造之一殘留 部分。 經濟部智慧財產局員工消費合作社印製 本發明之其他實施樣態、目的與優點將藉閱讀其較 佳方法之操作,並經由非限制例提供並參考附圖所製作 之下述詳細說明而得以更顯清楚。 >0 【實施方式】 本發明之主要目的在於至少—有用層已從晶圓被摘 除之後,回收包含一缓衝構造(亦即,作用如同緩衝層之 任何構造)之一晶圓,俾能將這個有用層整合至半導體構The method comprises: (a) bonding the donor wafer to the receiving substrate; (b) separating the useful layer bonded to the receiving substrate from the donor wafer, and (c) recovering the donor wafer in accordance with the recycling method. In accordance with a third embodiment, the present invention provides a method of periodically removing a useful layer from a donor wafer, characterized in that it comprises a plurality of steps of removing the useful layer. Each of these steps follows the ablation method. According to a fourth embodiment, the present invention provides an application of the periodic ablation method or the ablation method for producing a structure comprising a substrate and a layer having a layer of at least one of the following materials: strain Sp Ge, an alloy belonging to the ΙΠ_ν group, and a composition selected from a combination of possible (eight 1, for example, 111), 1), and ^). According to a fifth aspect, the present invention provides a donor crystal 15 circle which is recovered by providing a useful layer and which can be recovered according to the recycling method, characterized in that it sequentially comprises a substrate and a buffer structure. section. Other embodiments, objects, and advantages of the invention will be apparent from the description of the preferred embodiments of the invention. More clearly. >0 [Embodiment] The main object of the present invention is to recover at least one of the wafers including a buffer structure (i.e., any structure functioning as a buffer layer) after the useful layer has been removed from the wafer. Integrate this useful layer into the semiconductor structure
本紙張尺度規格 (210x297 公釐) 1322481 A7 B7 五、發明說明(6) 造中,該回收包含緩衝構造之至少局部復原,俾能使其 可於後來的摘除中被再使用。 因此,該回收處理必須包含不會損壞缓衝構造之至 少一部分之適當處理。 5 的確,緩衝構造通常包含例如錯置之結晶缺陷 (crystallographic default),當將能量供應於其上時,其 可利用一種重要方式增長並增加尺寸,這種能量可由熱 處理、化學製程或機械製程來提供。 經濟部智慧財產局員工消費合作社印製 例如,如果於350°C、450°C或550°C之溫度下加熱 10 SiGe之緩衝構造,則此構造狀態會相對於所選擇的溫度 來改變(譬如參見Re等人所著作之文獻"藉由分子束磊晶 而成長之Sil-xGex/Si( 100)異質結構之構造特性與穩定度 (Structural characterisation and stability of Sil-xGex/Si(100) heterostructures grown by molecular beam 15 epitaxy)",2001年7月,晶體成長之期刊,第227-228 卷,第749-755頁)。隨著溫度的增加,緩衝構造將傾向 於藉由利用滑動面、堆疊缺陷或其他構造鬆弛型式緩和 它們來減少其内應力。這在未來會對位於與待形成之有 用層之介面處帶來某些困難。然後,將這些内應力維持 20 侷限在緩衝構造中是相當重要的。 接著,必須以一種利用適合回收之手段之方式來實 現回收,俾能避免並限制緩衝構造内部的這些晶體應力 之延伸,這些應力會損壞其特性,從而損壞形成於其上 之有用層之特性。 -8- 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 具優點的是,其具有一種實質上鬆弛及/或表面上的 構造缺陷的數量並不值得注意之結晶構造。 於此文獻中,"緩衝層”已如上地更廣泛被定義。 具優點的是’緩衝層係包含在緩衝構造中’並具有 5 下述兩個功能之至少一個: 1. 降低上層中之缺陷密度; 2. 使兩個結晶構造之一晶格參數與不同晶格參數匹 I己。 關於緩衝層之第一功能’緩衝層係為兩個構造之間 10 的間層(interlayer),而緩衝層在它的其中一個表面周圍 具有實質上與第一構造之晶格參數相同之第一晶格參 數’且在它的另一個表面周圍具有實質上與第二構造之 晶格參數相同之第二晶格參數》 在這個文獻的其餘部分中’所說明之緩衝層或構造 15 —般將遵從這個後者的緩衝層。 然而’本發明亦關於於此文獻中以最一般的方式定 義之任何緩衝層或任何缓衝構造β 經濟部智慧財產局員工消費合作社印製 再者,以下將說明依據本發明之方法之·一例,其包 括藉由摘除而回收一有用層之一施體晶圓,此施體晶圓 20 最初由一支撐基板與一緩衝構造所組成。 參考圖1 ’包含在已知習知技術内之施體晶圓1 〇(藉 由摘除之一薄層之施體)係由一支撐基板1與一缓衝構造 I所組成。 在本發明中對這個施體晶圓10之應用,係為從緩衝 -9- 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 1322481 A7 B7 五、發明說明(8) 構造I之部分4及/或形成於緩衝構造丨之表面上之上方 覆蓋層(〇verlayer)之至少一部分(未顯示於圖}中)摘除有 用層之應用,以便將其整合至例如s〇I構造之構造中。 施體晶圓10之支撐基板i包含至少一個具有第一晶 5格參數之半導體層,其位於支撐基板丨與缓衝構造〗Z 介面。 在一個特別组態中’支撐基板1係由具有第—晶格 參數之單一個半導體所組成。 在緩衝構造I之第一組態中,緩衝構造J係由緩衝 10 層2所組成。 於此情況下,位於支撐基板1上之緩衝層2使得於 其表面可能出現實質上與基板1之第一晶格參數不同之 第二晶格參數,從而可能在相同的施體晶圓1 〇中具有兩 層1與4 ’此兩層分別具有不同之晶格參數。 15 再者’在某些應用上’緩衝層2可能使上覆蓋層 (overlying layer)避免包含高缺陷密度及/或受到顯著的鹿 力成為可能。 " 經濟部智慧財產局員工消費合作社印製 再者,在某些應用上,緩衝層2可能使上覆蓋層具 有良好表面狀況成為可能。 2〇 一般而言,緩衝層2具有隨厚度逐漸改變之晶林表 數,以便建立兩個晶格參數之間的轉變。 這種層一般被稱為變質層。 這種晶格參數之逐漸改變可能在緩衝層2之厚户 連續產生。 -10- 本紙張尺度適用中國國家標準(CNS)A4規格(210x297公釐) 1322481Paper Size Specification (210x297 mm) 1322481 A7 B7 V. INSTRUCTIONS (6) In the middle of the process, the recovery includes at least partial restoration of the buffer structure, which allows it to be reused in subsequent removals. Therefore, the recycling process must include appropriate processing that does not damage at least a portion of the buffer structure. 5 Indeed, buffer structures typically contain, for example, crystallographic defaults, which can be grown and increased in size in an important way when energy is supplied thereto, which can be by heat treatment, chemical process or mechanical process. provide. Ministry of Economic Affairs, Intellectual Property Office, Staff Consumer Cooperative, for example, if a 10 SiGe buffer structure is heated at 350 ° C, 450 ° C or 550 ° C, the state of the structure will change with respect to the selected temperature (eg See the literature by Re et al. "Structural characterisation and stability of Sil-xGex/Si(100) heterostructures Grown by molecular beam 15 epitaxy)", July 2001, Journal of Crystal Growth, Vol. 227-228, pp. 749-755). As the temperature increases, the buffer construction will tend to reduce its internal stress by mitigating them with sliding surfaces, stacking defects, or other structural relaxation patterns. This will present some difficulties in the future at the interface with the useful layer to be formed. It is then important to limit these internal stresses to 20 in the buffer construction. Recycling must then be achieved in a manner that is suitable for recycling, which avoids and limits the extension of these crystal stresses within the buffer structure, which can damage its characteristics and thereby damage the properties of the useful layer formed thereon. -8- This paper scale applies to the Chinese National Standard (CNS) A4 specification (210 X 297 mm). It is advantageous to have a crystal structure that is substantially indistinguishable and/or structurally imperfect on the surface. . In this document, the "buffer layer" has been more broadly defined as above. It is advantageous that the 'buffer layer is contained in the buffer structure' and has at least one of the following two functions: 1. Lowering the upper layer Defect density; 2. Make one of the two crystal structures with different lattice parameters. The first function of the buffer layer is 'the buffer layer is the interlayer between the two structures, and The buffer layer has a first lattice parameter substantially the same as the lattice parameter of the first configuration around one of its surfaces and has substantially the same lattice parameter as the second structure around its other surface The two lattice parameters, the buffer layer or structure 15 described in the remainder of this document will generally follow this latter buffer layer. However, the present invention also relates to any buffer defined in this document in the most general manner. Layer or any buffer structure β Ministry of Economic Affairs Intellectual Property Office employee consumption cooperative printing, an example of a method according to the present invention, including recycling a useful layer by ablation A donor wafer 20 is initially composed of a support substrate and a buffer structure. Referring to FIG. 1 'the donor wafer 1 包含 (by removing a thin layer of the donor body) included in the known prior art It consists of a supporting substrate 1 and a buffer structure 1. The application of the donor wafer 10 in the present invention applies the Chinese National Standard (CNS) A4 specification (210 X 297 metrics) from the buffer -9- paper scale. PCT) 1322481 A7 B7 V. INSTRUCTION DESCRIPTION (8) Part 4 of structure I and/or at least a portion of the upper cover layer (not shown in the figure) formed on the surface of the buffer structure 摘Application to integrate it into a configuration such as a s〇I structure. The support substrate i of the donor wafer 10 includes at least one semiconductor layer having a first crystal 5 grid parameter, which is located on the support substrate 丨 and the buffer structure 〖Z interface In a special configuration, the 'support substrate 1' consists of a single semiconductor with a first-lattice parameter. In the first configuration of the buffer structure I, the buffer structure J consists of a buffer of 10 layers 2. In this case The buffer layer 2 on the support substrate 1 may have a second lattice parameter substantially different from the first lattice parameter of the substrate 1 on its surface, so that it may have two layers 1 in the same donor wafer 1 4 'The two layers have different lattice parameters respectively. 15 Again, 'in some applications' the buffer layer 2 may make it possible for the overlying layer to avoid high defect density and/or be significantly deer " Ministry of Economic Affairs Intellectual Property Bureau employee consumption cooperative printing, in some applications, the buffer layer 2 may make the upper cover layer have a good surface condition. 2〇 In general, the buffer layer 2 has a gradually increasing thickness Change the number of crystals in order to establish a transition between the two lattice parameters. This layer is generally referred to as a metamorphic layer. This gradual change in lattice parameters may occur continuously in the thicker layers of the buffer layer 2. -10- This paper scale applies to China National Standard (CNS) A4 specification (210x297 mm) 1322481
或者’其可能分"階段(stagesy,來實現,每個階段係 為-薄層具有不同於一下層階段之晶袼參數之實質上固 定的晶格參數,俾能-階段一階段地分別改變晶格參 數。 5 其亦可具有更複雜的形式,例如具可變速率之組成 物令的變化,速率之符號反轉、或組成物中之不連續跳 升。 較佳是從基板i開始以一種漸進方式,藉由增加並 未包3於基板1中之至少一原子元素之濃度來發現緩衝 10 層2中之晶格參數之改變。 因此,舉例而言,產生在由單一材料所構成之基板 1上的緩衝層2可以是由二元 '三元、四元或更高的材 料所構成a 因此,舉例而言,產生在由二元材料所構成之基板 15 1上的緩衝層2可以是由三元、四元或更高的材料所構 成。 經濟部智慧財產局員工消費合作社印製 緩衝層2較佳是使用例如CVD與MBE技術(分別為 化子 沈積(Chemical Vapour Deposition)"與"分子束 磊晶(Molecular Beam Epitaxy)"的縮寫字)之已知技術, 20藉由在支撐基板1上成長(譬如藉由磊晶)而產生。 一般而言’緩衝層2可能藉由任何其他已知方法而 產生’以便獲得譬如由各種不同原子元素之合金所組成 之緩衝層2。 修整位於緩衝層2下的基板1之表面之次要步驟(譬 -11- 本紙張尺度適用中國國家標準(CNS)A4規格(210x297公釐) 1322481 A7 15 經濟部智慧財產局員工消費合作社印製 20 五、發明說明(10 如藉由CMP拋光),或許可能在製造緩衝層2之前發 生。 在緩衝構造I之第二組態中’並參考圖丨,緩衝構 造I係由一緩衝層2(實質上與第一組態之緩衝層相同)與 一附加層4所組成。 附加層4可能在基板i與緩衝層2之間,或在緩衝 層2上,如圖1所示。 在第一特別情況下,這種附加層4可構成第二緩衝 層,例如使限制缺陷成為可能,從而改善產生在緩衝構 造1上之一層之晶體品質之緩衝層。 這種附加層4係由較佳是具有固定材料組成物之半 導體所構成。 然後,這種待產生之緩衝層4之組成物與厚度之選 擇,對達到此種特性尤其是重要的基準。 因此,舉例而言,磊晶成長層中之構造缺陷通常在 這個層之厚度内逐漸減少。· 在第二特別情況下,附加層4係位於緩衝層2上並 作為緩衝層2之上層。 因此其可固定第二晶格參數。 在第三特別情況下,附加層4係位於缓衝層2上並 在將在施體晶圓10中實現之摘除動作中扮演一個角色, 例如於其層級之摘除。 附加層亦可具有數個功能,例如從最後這三個特別 情況中選取的功能。 -12-Or the 'may be divided into stages' (stagesy, to achieve, each stage is - the thin layer has a substantially fixed lattice parameter different from the crystal layer parameter of the lower layer stage, and the energy phase - phase changes separately Lattice parameters. 5 It may also have a more complex form, such as a change in composition with a variable rate, a sign inversion of the rate, or a discontinuous jump in the composition. Preferably, starting from substrate i A progressive manner in which the change in the lattice parameter in the buffer layer 10 is found by increasing the concentration of at least one atomic element that is not included in the substrate 1. Thus, for example, it is formed of a single material. The buffer layer 2 on the substrate 1 may be composed of a binary 'ternary, quaternary or higher material. Thus, for example, the buffer layer 2 formed on the substrate 15 1 composed of a binary material may be It is made up of ternary, quaternary or higher materials. The Ministry of Economic Affairs Intellectual Property Office staff consumption cooperative print buffer layer 2 is preferably using, for example, CVD and MBE technology (Chemical Vapour Deposition). versus& The known technique of "the abbreviation of Molecular Beam Epitaxy" is generated by growing on the support substrate 1 (for example, by epitaxy). Generally, the buffer layer 2 may be borrowed. It is produced by any other known method to obtain a buffer layer 2 composed of an alloy of various atomic elements. A secondary step of trimming the surface of the substrate 1 under the buffer layer 2 (譬-11- This paper scale applies China National Standard (CNS) A4 Specification (210x297 mm) 1322481 A7 15 Ministry of Economic Affairs Intellectual Property Office Staff Consumer Cooperative Printed 20 V. Inventive Note (10 by CMP polishing) may occur before the buffer layer 2 is manufactured. In the second configuration of the buffer structure I, and referring to the figure, the buffer structure I consists of a buffer layer 2 (essentially the same as the buffer layer of the first configuration) and an additional layer 4. The additional layer 4 may Between the substrate i and the buffer layer 2, or on the buffer layer 2, as shown in Fig. 1. In the first special case, such an additional layer 4 may constitute a second buffer layer, for example to make it possible to limit defects, thereby Improvement occurred in A buffer layer of a crystal quality of one layer of the buffer structure 1. The additional layer 4 is composed of a semiconductor preferably having a fixed material composition. Then, the composition and thickness of the buffer layer 4 to be produced are selected. A benchmark that is particularly important for achieving such characteristics. Thus, for example, structural defects in epitaxially grown layers are generally reduced over the thickness of this layer. · In the second special case, the additional layer 4 is located in the buffer. Layer 2 is used as the upper layer of buffer layer 2. Therefore, it can fix the second lattice parameter. In the third special case, the additional layer 4 is located on the buffer layer 2 and is removed in the donor wafer 10 Play a role, for example, at the level of its removal. The additional layer can also have several functions, such as the one selected from the last three special cases. -12-
10 15 5 附加層4係位於緩衝層2 之第一晶格參數不同之第二晶 在一種有利的組態中 i’並具有與支撐基板1 格參數。 -緩:後面的組態之特別情況下,附加層4係由因 ,.衝層2而鬆他之材料所構成,並具有第二晶格參數。 附加層4較佳是以CVD或職,藉由在緩衝層2 上成長(譬如藉由磊晶成長)而產生。 〜%队丨尔仕屌爽,直招 延續位於其下面的緩衝層2 一 办成*而實現,於此情況7 之緩衝層2亦較佳是藉由層成長而形成。 ^在第二實施例中,附加層4之成長係在修整下面的 緩衝層2之表面之次要步騾(譬如藉由CMp拋光、熱處 理或其他平整技術)之後實現,以使包含於緩衝層2中之 錯置與其他缺陷不會增長,不會增加尺寸且不會建立任 何滑動面、堆疊缺陷、或其他會降低因此形成的最終緩 衝構造I之品質的缺陷。 從施體晶圓10摘除有用層係依據下述主要模式之其 中一個運作: U)待被摘除之有用層係為附加層4之一部分。 (2)待被摘除之有用層係為上方覆蓋層(未顯示於圖i 中)之一部分’其也許在修整緩衝構造I之表面之前,上 方覆蓋層已譬如藉由磊晶成長而預先在緩衝構造I上形 成。 接著,施體晶圓10作為供上方覆蓋層之成長用的基 -13- 本紙張尺度適用令國國家標準(CNS)A4規格(21〇 χ297公茇) 五、發明說明(12 5 10 15 經濟部智慧財產局員工消費合作社印製 20 板。 依據期望使用之摘除模式而定,上方覆蓋層可包含 一個或多個薄層。 再者’其較佳是具有實質上與緩衝構造I之自由面 之鬆弛材料之晶格參數相同的晶格參數,例如相同材科 之層’或將具有其拉伸或壓縮應變的結晶構造之全部 或一些之另一種材料’或這兩種型式之材.料之組合。 在施體晶圓10之一特別實施例中,一個或多個間層 更進一步的會被插在緩衝構造I與上方覆蓋層之間。於 此情況下,這個或這些間層不會被移除。 、 (3)待被摘除之有用層係為附加層4與一上方覆蓋層 (以λ質上與第二摘除模式中所說明的相同方式形成)之 一部分。 不論所選擇的摘除模式為何,並參考圖2,在摘除 之後且在大多數的情形下,凸出部分7a及/或粗糙部分 7b會出現在殘留的施體晶圓1〇之摘除表面上。 這種摘除表面"明顯"屬於位於緩衝層2上面之摘除 後的層7。 依據從二個以前所討論的摘除模式選取的摘除模 式’這種摘除後的層7係由層4之全部或一些,可能是 一個或多個間層,且可能是上方覆蓋層之一部分所組 成。 明顯出現在摘除後的層7之表面上的部分7a與 7b,係主要視摘除模式以及摘除期間所操作之技術而 -14- 本纸張尺度適用中國國家標準(CNS)A4規格(210x297公爱) 1322481 A7 B7 五、發明說明(u 定 15 經濟部智慧財產局員工消費合作社印製 20 •因此’舉例而言,目前工業上所使用之摘除模式 在於不摘除施體晶圓10之整個表面上面之有用層而 僅摘除在施體晶圓10之一部分(通常為實質上中央部分) 上面之有用層,從而殘留下例如那些以參考符發7^表 不之在施體晶圓10之表面上的凸出部分。這些凸出部 分通常是完整的並位於施體晶圓10之表面之周邊,接 著’所有凸出部分在商業上係已知為"摘除環"。 •因此,舉例而言,已知的摘除技術,例如,那些 我們將更進一步研究且後來在此文獻(例如已經提及: Smart-cut◎技術)上的技術,有時導致例如摘除表面上之 那個以參考符號7b表示之表面粗糙度。 旦執行摘除,就會操作依據本發明之回故以便還 原施體晶圓1 0。 依據本發明之回收之第一步驟在於移除至少凹凸部 分7a與7b(顯示於圖2)。 依據本發明之這種物質之移除係如此操作,以使得 在移除之後,緩衝構造1之至少一部分會殘留下來,其 可在後來的新有用層之摘除期間被再度使用。 在移除物質之後,緩衝構造I之殘留部分因此回 收’而不像習知技術之已知回收。 在回收之第一特別情況下,並關於該摘除之第二模 式(2),較有利為選擇上方覆蓋層之厚度,俾使在摘除之 後,上方覆蓋層之殘留部分(為摘除後的層7)係藉由移除 -15-10 15 5 The additional layer 4 is located in the second layer of the buffer layer 2 having the first lattice parameter different in an advantageous configuration i' and has a lattice parameter with the support substrate. - Slow: In the special case of the latter configuration, the additional layer 4 is composed of the material of the layer 2 and the layer 2, and has the second lattice parameter. The additional layer 4 is preferably produced by CVD or occupation by growth on the buffer layer 2 (e.g., by epitaxial growth). ~% of the team's 丨 屌 , , , , , , , , , , , , , , , , , , , , 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 In the second embodiment, the growth of the additional layer 4 is achieved after a secondary step of trimming the surface of the underlying buffer layer 2 (such as by CMp polishing, heat treatment or other planarization techniques) to be included in the buffer layer. The misplacement and other defects in 2 will not increase, will not increase the size and will not create any sliding surface, stacking defects, or other defects that will degrade the quality of the resulting final buffer structure I. The removal of the useful layer from the donor wafer 10 operates according to one of the following main modes: U) The useful layer to be removed is part of the additional layer 4. (2) The useful layer to be removed is part of the upper cover layer (not shown in Figure i). It may be pre-buffered by epitaxial growth, perhaps before the surface of the buffer structure I is trimmed. Formed on the structure I. Next, the donor wafer 10 is used as a base for the growth of the upper cover layer. 13- The paper size is applicable to the National Standard (CNS) A4 specification (21〇χ297 cm). 5. Description of the invention (12 5 10 15 Ministry of Economics) The property bureau employee consumption cooperative prints 20 boards. Depending on the desired removal mode, the upper cover layer may contain one or more thin layers. Further, it preferably has a slack that is substantially free from the free surface of the cushioning structure I. The lattice parameters of the material having the same lattice parameters, such as the layer of the same material 'or another material of some or some of the crystalline structures having its tensile or compressive strain' or a combination of the two types In a particular embodiment of the donor wafer 10, one or more interlayers are further inserted between the buffer structure I and the upper cover layer. In this case, the one or more layers are not removed. (3) The useful layer to be removed is part of the additional layer 4 and an upper cover layer (formed in the same manner as described above in the second ablation mode). Regardless of the mode of removal selected, Referring to Fig. 2, after the removal and in most cases, the protruding portion 7a and/or the rough portion 7b may appear on the removal surface of the residual donor wafer 1〇. This removal surface "apparent" Layer 7 after removal of the buffer layer 2. According to the ablation mode selected from the two previously discussed ablation modes, the layer 7 after removal is composed of all or some of the layers 4, possibly one or more interlayers And may be composed of a part of the upper cover layer. The portions 7a and 7b apparently appearing on the surface of the layer 7 after the removal are mainly based on the removal mode and the technique operated during the removal. China National Standard (CNS) A4 Specification (210x297 public) 1322481 A7 B7 V. Invention Description (u Ding 15 Ministry of Economic Affairs Intellectual Property Bureau employee consumption cooperative printing 20 • Therefore 'for example, the current industrial use of the removal mode The utility layer does not remove the useful layer above the entire surface of the donor wafer 10 and only removes the useful layer above a portion (usually a substantially central portion) of the donor wafer 10, thereby remaining For example, those protrusions on the surface of the donor wafer 10 are indicated by reference symbols. These projections are generally intact and located on the periphery of the surface of the donor wafer 10, and then 'all projections are commercially available. The system is known as "extracting rings". Thus, for example, known ablation techniques, for example, those we will study further and later in this document (eg already mentioned: Smart-cut ◎ technology) The technique sometimes results in, for example, the removal of the surface roughness indicated by reference numeral 7b on the surface. Once the removal is performed, the return according to the present invention is operated to reduce the donor wafer 10. The first of the recycling according to the present invention The step consists in removing at least the concavo-convex portions 7a and 7b (shown in Figure 2). The removal of such a substance in accordance with the present invention is such that at least a portion of the cushioning structure 1 remains after removal, which can be reused during subsequent removal of the new useful layer. After removal of the material, the residual portion of the buffering structure I is thus recovered' and is not recovered as is known in the art. In the first special case of recycling, and with regard to the second mode (2) of the ablation, it is advantageous to select the thickness of the upper cover layer so that after the removal, the remaining portion of the upper cover layer (for the layer 7 after the removal) ) by removing -15-
訂Order
1322481 A7 B7 五、發明說明(14 物質之標準機械手段(例如抱光手段& cMp)而移除,而 不需從安全的緩衝構造!移除物質從而保留整個緩衝 構造I。 即使目前之發展可順利達到在i㈣左右的厚产, 回收期間藉由標準機械手段(如拋光)而移除之材料厚度 一般係在2/zm左右。 10 15 經濟部智慧財產局員工消費合作社印製 20 在兄下’並關於該摘除之第二模 式(2),較有利為選擇上方覆蓋層與附加層4之厚度,俾 使在摘除之後,上方覆蓋層之殘留部分(為摘除後的又層7) 以及附加f 4之至少一部分,係藉由移除物質之標準機 械手段(例如拋光手段或CMP)而移除,而不需從安全的 緩衝層2移除物質,從而保留整個緩衝層2。 物質之移除包含使用用以機械侵蝕物質之手段(例如 拋光或研磨)之運作。 通常所使用之拋光技術在於將施體板1〇置放在拋光 頭與能繞著驅動軸旋轉之拋光板之間。 拋光頭與抛光板之各自主要表面實質上是平行的。 施加至拋光頭之力量將施體晶圓1〇壓靠在拋光板之 上表面。 施體晶圓10相對於拋光板之旋轉移動導致在施體晶 圓10之一個面上的摩擦,因而拋光這個表面。 在一個較佳模式中,伴隨有施體晶圓10之拋光頭係 沿著一條確定路徑在拋光板之上表面上面移動,以便儘 可能均勻化此拋光。這種移動譬如可以是一種沿著特定 -16-本纸張尺度適用中國國家標準(CNS)A4規格(21〇χ297公爱) ^22481 A7 B7 五、發明說明(u) 軸線之平移來回移動或是一種螺旋移動。 拋光板較佳是覆蓋上有紋理之材料或織物。 較佳是可注入可能潤滑拋光板在施體晶圓上之摩擦 動作之拋光溶液。 5 .一般利用被注入之去離子水之晶圓表面之拋光後清 潔可在搬光之後進行。 一般利用被注入之包含適當表面活化劑之溶液之抛 光後沖洗可能在拋光與清潔之間運作。表面活化劑之主 要功能係用以儘可能分散在沖洗溶液中可能繼續侵蝕切 10片之表面之殘留粒子,從而減少它們在表面上的沈積, 並允許移除它們。 較佳是注入更多這些溶液之其中一種,俾能弄濕覆 蓋拋光板之織物,從而儘可能充分使溶液分布在施體晶 圓之整個表面上面。 15 在拋光板之第一實施例中,拋光、沖洗與清潔之該 專板功能係只藉由單一板而實現。 然而,為了改善整個方法之生產力,具有數個板之 裝置將是較佳的。 經濟部智慧財產局員工消費合作社印製 在这些板之第二實施例中’拋光功能係藉由一拋光 20板而實現,而沖洗與清潔功能係藉由被稱為沖洗/清潔板 之單一板而實現。本實施例把拋光從沖洗/清潔分開,係 藉由使用供沖洗用之完全沒有可能殘留附著至一板之任 何粒子殘留物之一板來改善沖洗之品質。 在這些板之第三實施例中,拋光板、沖洗板與清潔 -17- 本紙張尺度適用中國國家標準(CNS)A4規格(21〇 X 297公爱) 1322481 A7 B7 五、發明說明(l6 板係為分別的板。相對於第二實施例,本實施例將清潔 與沖洗分開’藉由使用供清潔用之完全沒有可能殘留附 著至沖洗板之任何粒子殘留物之一板,從而改善切片之 表面之最後清潔度。 除了抛光以外’可能需要加入例如石夕土粒子之研磨 粒子以便改善物質之磨損。 除了拋光以外’可能需要加入化學劑以便以化學钱 刻伴隨藉由撤光板運作之機械侵姓。 10 在從施體晶圓10移除物質之有利的操作模式中,執 行又被稱為CMP之化學機械平坦化,其原理係使拋光板 之拋光表面與包含研磨粒子之拋光流體和化學蝕刻劑混 在一起。 除了機械拋光以外,拋光流體接著聯合使用施體晶 圓10之待拋光之表面之化學姓刻(藉由使用姓刻劑)與機 15 械侵蝕(利用研磨粒子)。 又於此,施體晶圓10之被抱光表面之沖洗及/或清 潔可能接續在物質之移除之後。 經濟部智慧財產局員工消費合作社印製 吾人應注意到沖洗可能在某些情況下,不僅對拋光 之殘留與研磨粒子之較快移除有效,而且對拋光之化學 20 動作有效。 此乃因為,如果拋光期間所使用之化學蝕刻劑具有 鹼性pH值的話,藉由將一般酸性表面活化劑添加至拋 光溶液,會促進拋光溶液之化學動作之快速停止。 對某些例如矽之半導體而言’化學動作優於機械動 -18- 本紙張尺度適用中國國家標準(CNS)A4規格(210x297公釐) 1322481 A7 B7 五、發明說明 17 經濟部智慧財產局員工消費合作社印製 作(當拋光這種半導體之小表面時,使用研磨粒子)。 尤其對在前段落所提及之材料而言,這種利用酸性 表面活化劑之沖洗因此可能顯著停止拋光之作用並控制 其對切片之影響。如此,抛光後之厚度因此受到保證而 且是可再生的。 因此,可能控制拋光之停止,因而更正確的控制移 除之厚度。 再者,沖洗溶液之漸進注入將是較佳的:太快注入 導致拋光溶液之pH值之快速降低,且在某些例如矽之 半導體之情況下,可能具有因結塊增加研磨粒子之尺 寸,因而使其暴露至由這些較大的粒子結塊所導致的研 磨損壞之後果。 此處所提供之平坦化一層之操作應用之一例,係在 待平坦化之層至少一部分包含矽的狀況下。 適合拋光矽之溶液一般係為具有在7與之間的 pH值之驗性溶液’而較佳是在8與1 〇之間,然後,化 學劑較佳疋具有例如氨之含氮驗基(nitr〇gen_c〇ntaining base)。 研磨粒子較佳是具有大約十分之一微米之尺寸之矽 20 土分子》 如果決定沖洗的話,則將使用具有較佳是在3與5 之間’或甚至在4左右之pH值之表面活化劑,其具有 接近至少0.1%之CMC(臨界膠束濃度(Critical Micellar Concentration))。 10 15 -19- 本紙張尺度適用中國國家標準(CNS)A4規格(2丨〇 x 297公釐) 裝 訂 1322481 A7 ----B7 五、發明說明 沖洗步驟之時間將較佳大約是拋光時間之50%。 這些機械或化學機械手段,在本發明之範疇内,對 於控制被移除物質之數量尤其有利,俾能允許緩衝構造 I之至少一部分被保留。 然而,一般而言,從施體晶圓1〇移除物質可包括 操作侵㈣質之所有機械手段,例如,研磨或利用原子 物質之轟擊》 在這種物質之移除之前可能發生熱處理,而熱處理 10 15 經濟部智慧財產局員工消費合作社印製 20 可能更進一步將待被移除之表面平順化及/或移除凸出 部分7a或粗糙部分7b。 舉例而言,可以如文獻us 6,596 61〇中所揭露的執 仃熱處理,於此係藉由熱處理而移除這種凸出部分〜 與粗糙部> 7b。這項技術在摘除已發生在緩衝構造上 之上方覆蓋層的情況下進行較有利,俾能使這種熱處理 主要作用於這個上方覆蓋層上,而非作用在緩衝構造ι 上,藉以保護緩衝構造I使免於增加内部缺陷。 因此使用下述物質移除模式之其中一個: (a) 移除包含至少凹凸部分&與几之摘除後的層7 之一部分;或 (b) 移除整個摘除後的層7 ;或 (C)移除整個摘除後的層7與緩衝層2之一部分。 如果摘除後的層7包含原始上方覆蓋層之一部分, 貝J物質移除模式(a)較佳是包括完全摘除這個上方覆蓋 層之部分。 -20- 1322481 五、發明說明(19) 參考® 3’物質移除後之原始緩衝構造之 分係以參考符號1,表示。 戈^邵 其包含: 5 15 經濟部智慧財產局員工消費合作社印製 20 整個原始緩衝構造卜當使用物質移除模式(a)時且 當物質移除模式⑷不牽涉摘除附加層4之任何—部分 時;或 、'缓衝層2與附加層4之-部分,當使用物質移除模 式⑷時且當物質移除模式⑷牽涉摘除附加層4之—部八 時;或 °刀 -緩衝層·2,當使用物質移除模式(b)時;或 _緩衝層2之—部分,當使用物質移除模式(c)時。 在關於物質移除之第一回收步驟之後,第二回收步 驟包括重新形成在第一步驟期間被移除之至少某些層。 首先在某些情況下,修整施體晶圓1〇之表面將是較 佳的,該施體晶圓10之表面係為在第一回收步驟期間運 作之物質移除發生之處,俾能移除在物質移除期間可能 已顯現的任何粗縫度。 為了這個目的,譬如將使用熱處理,以使包含在緩 衝構造I中之錯置與其他缺陷不會增長,不會增加尺寸 且不會建立任何滑動面或堆疊缺陷,如已經討論的。 然後’當原始緩衝構造I之一部分在第一回故步驟 期間被移除時,這個第二步驟牽涉從殘留的緩衝構造Γ 還原緩衝構造I。 緩衝構造I之還原一旦形成之後,較佳是能使其實 -21- 1322481 五、發明說明(2〇 質上與原始緩衝構造I相同。 在—個特別實施例中,將可能略微改變某政 二產參數,以便獲得略與原始物不同之緩衝構造卜舉 例而言,將略微改變材料中之某些化合物之濃度。 還原緩衝構造I晕涉當原始緩衝層2之—部八在第 -回收步螺期間被切除時,重新形成緩衝層2::移除 部分。 、 還原緩衝構造I牽涉當原始附加層4之全部或一部 分在第—回收步驟期間被切除時,重新形成附加層4之 全部或一部分。 傘於此情況下,將可能產生具有實質上與原始物相同 或只質上與原始物不同之厚度之附加層4。 15 20 里一旦緩衝構造I被還原,上方覆蓋層或許會形成於 其中上方覆盍層將至少部分包含待被移除之新 有用層以及可能包含在緩衝構造I與上方覆蓋層之間 的一個或多個間層。 在這個第二回收步驟期間可能形成之層,較.佳是藉 由層成長(譬如藉由CVD或MB£磊晶成長)而產生在它 們各自的下層上。 在第一情況下’這些層I與5之至少一層係在原 處直接延續下層成長支樓之形成而成長,於此情況下 之下層成長支撐亦較佳是藉由層成長而形成。 在第二情況下’這些層之至少一層係在修整下層成 長支撐之表面之次要步驟(譬如藉由CMP拋光、熱處理 -22- 本紙張尺度舶+ S S家標準(CNS)A4規格 (210 X 297公釐) 1322481 A7 B7 五、發明說明(21) 10 15 經濟部智慧財產局員工消費合作社印製 20 或其他平整技術)之後成長,以使包含在緩衝構造I中之 錯置與其他缺陷不會增長,不會增加尺寸且不會建立任 何滑動面、堆疊缺陷或其他會降低緩衝構造I之品質的 缺陷。 因此’除了熟悉本項技藝者所期望與實現之修改以 外’最後獲得實質上與原始物相同之施體晶圓10,亦即 圖1所示之施體晶圓1 〇。 依此方式獲得之施體晶圓10包含原始緩衝構造I之 至少一部分,因而包含原始緩衝層2之至少一部分,這 使避免如已知回收方法之狀況全部的、漫長的且昂貴的 再形成成為可能。 參考圖4a至4f,其係顯示依據本發明之從一施體 晶圓10摘除一薄層以及摘除後回收施體晶圓之方法 之各種不同的步驟,其使用具有實質上與上述圖丨所說 明的層構造相同之一層構造之施體晶圓1〇,因此參考圖 4a,其包含一基板i以及一緩衝構造16 在依據本發明之這個例示方法中’已在緩衝構造I 之上增加一上方覆蓋層5。 在這個方法期間將實現之移除,將與摘除上方覆蓋 層5且或許緩衝構造I之一部分有關聯。 同樣地在施體晶圓10之其他構造組態中,可能有數 個上方覆蓋層,而摘除接著將與上方覆蓋層且或許與緩 衝構w I之一部分有關聯,或者可能沒有上方覆蓋層, 而摘除接著將只與緩衝構造〖之_部分有關聯。 -23-1322481 A7 B7 V. INSTRUCTIONS (14) The standard mechanical means of matter (eg, immersion means & cMp) are removed without the need to remove the material from the safe cushioning structure! The entire buffer structure I is retained. It can smoothly reach the high yield around i (four), and the thickness of the material removed by standard mechanical means (such as polishing) during recycling is generally around 2/zm. 10 15 Ministry of Economic Affairs Intellectual Property Bureau employee consumption cooperative print 20 And in relation to the second mode (2) of the ablation, it is advantageous to select the thickness of the upper cover layer and the additional layer 4 so that after the removal, the remaining portion of the upper cover layer (for the layer 7 after the removal) At least a portion of the additional f 4 is removed by standard mechanical means of removing the material (eg, polishing means or CMP) without removing the material from the safe buffer layer 2, thereby retaining the entire buffer layer 2. Removal involves the use of means for mechanically eroding the substance (eg polishing or grinding). The usual polishing technique consists in placing the donor plate 1 on the polishing head and around the drive shaft. Between the polishing plates. The polishing head and the polishing plate are substantially parallel to each other. The force applied to the polishing head presses the donor wafer 1 against the upper surface of the polishing plate. The donor wafer 10 is opposed to the polishing plate. The rotational movement causes friction on one face of the donor wafer 10, thereby polishing the surface. In a preferred mode, the polishing head associated with the donor wafer 10 moves over a defined path over the upper surface of the polishing pad so that This polishing is made as uniform as possible. This movement can be, for example, applicable to the Chinese National Standard (CNS) A4 specification (21〇χ297 public) along the specific-16-paper scale. ^22481 A7 B7 V. Description of invention (u The translation of the axis moves back and forth or a spiral movement. The polishing plate is preferably covered with a textured material or fabric. It is preferred to inject a polishing solution that may lubricate the frictional action of the polishing plate on the donor wafer. The post-polishing cleaning of the surface of the wafer to which the deionized water is injected can be performed after the light is transferred. Generally, the solution containing the appropriate surfactant is injected. Post-light rinsing may work between polishing and cleaning. The primary function of the surfactant is to disperse as much as possible of the residual particles in the rinsing solution that may continue to erode the surface of the cut sheet, thereby reducing their deposition on the surface, and It is preferred to remove them. It is preferred to inject one of these solutions to wet the fabric covering the polishing pad to distribute the solution as much as possible over the entire surface of the donor wafer. 15 First implementation of the polishing pad In this case, the special function of polishing, rinsing and cleaning is achieved by a single board. However, in order to improve the productivity of the whole method, a device with several boards would be better. Co-op in the second embodiment of these panels, the 'polishing function is achieved by polishing a 20-plate, and the rinsing and cleaning functions are achieved by a single plate called a rinsing/cleaning plate. This embodiment separates the polishing from rinsing/cleaning by improving the quality of the rinsing by using a plate for any particle residue that is completely free from residual adhesion to a plate. In the third embodiment of these plates, the polishing plate, the rinsing plate and the cleaning -17- paper scale apply to the Chinese National Standard (CNS) A4 specification (21〇X 297 public) 1322481 A7 B7 V. Invention description (l6 board The present invention is a separate plate. Compared to the second embodiment, the present embodiment separates the cleaning from the rinsing' by using one of any particle residue for cleaning that is completely free from residual adhesion to the rinsing plate, thereby improving the dicing. The final cleanliness of the surface. In addition to polishing, it may be necessary to add abrasive particles such as Shixia particles to improve the wear of the material. In addition to polishing, it may be necessary to add chemicals to chemically engrave with the mechanical invasion by the optical plate. In an advantageous mode of operation for removing material from the donor wafer 10, a chemical mechanical planarization, also known as CMP, is performed, the principle of which is to polish the polishing surface of the polishing plate with a polishing fluid and chemical etchant comprising abrasive particles. Mixing together. In addition to mechanical polishing, the polishing fluid is then used in conjunction with the chemical surname of the surface of the donor wafer 10 to be polished (by With the surname), the machine is eroded (using abrasive particles). Further, the rinsing and/or cleaning of the immersed surface of the donor wafer 10 may be followed by the removal of the substance. Co-operative printing We should note that rinsing may be effective in some cases not only for the faster removal of polishing residues and abrasive particles, but also for the chemical action of polishing. This is because, if used during polishing, the chemistry used during polishing When the etchant has an alkaline pH, the addition of a generally acidic surfactant to the polishing solution promotes a rapid stop of the chemical action of the polishing solution. For some semiconductors such as germanium, the chemical action is superior to mechanical motion. 18- This paper scale applies to China National Standard (CNS) A4 specification (210x297 mm) 1322481 A7 B7 V. Invention Description 17 Ministry of Economic Affairs Intellectual Property Bureau employee consumption cooperative print production (When polishing the small surface of this semiconductor, use grinding Particles. Especially for the materials mentioned in the previous paragraph, this flushing with acidic surfactants may therefore be significant The effect of polishing is controlled and its effect on the slicing is controlled. Thus, the thickness after polishing is thus ensured and reproducible. Therefore, it is possible to control the stopping of the polishing, thereby more accurately controlling the thickness of the removal. Progressive injection will be preferred: too fast injection results in a rapid decrease in the pH of the polishing solution, and in the case of certain semiconductors such as germanium, it may have increased the size of the abrasive particles due to agglomeration, thereby exposing it to The grinding caused by the agglomeration of these larger particles is damaged. One example of the operational application of the flattening layer provided herein is in the case where at least a portion of the layer to be planarized contains niobium. It is an assay solution having a pH between 7 and preferably between 8 and 1 Torr. Then, the chemical agent preferably has a nitrogen-containing test group such as ammonia (nitr〇gen_c〇ntaining base ). The abrasive particles are preferably 矽20 soil molecules having a size of about one tenth of a micron. If the rinsing is decided, a surface activation having a pH of preferably between 3 and 5 or even at about 4 will be used. An agent having a CMC (Critical Micellar Concentration) close to at least 0.1%. 10 15 -19- This paper size is applicable to China National Standard (CNS) A4 specification (2丨〇x 297 mm) Binding 1322481 A7 ----B7 V. Invention The time of the rinsing step will preferably be about polishing time. 50%. These mechanical or chemical mechanical means, in the context of the present invention, are particularly advantageous for controlling the amount of material to be removed, allowing at least a portion of the buffer structure I to be retained. However, in general, removing material from the donor wafer 1 可 can include all mechanical means of operating the invading material, for example, grinding or bombardment with atomic material. Heat treatment may occur prior to removal of such material, while heat treatment 10 15 Ministry of Economic Affairs Intellectual Property Office Staff Consumer Cooperative Print 20 It is possible to further smooth the surface to be removed and/or remove the convex portion 7a or the rough portion 7b. For example, the heat treatment as disclosed in the document us 6, 596 61, can be carried out by removing the convex portion ~ and the roughness portion 7b by heat treatment. This technique is advantageous in the case of removing the overlying layer that has occurred on the cushioning structure, so that the heat treatment is mainly applied to the upper cover layer instead of acting on the buffer structure ι to protect the cushioning structure. I is exempt from increasing internal defects. Therefore, one of the following substance removal modes is used: (a) removing a portion of the layer 7 containing at least the concavo-convex portion & and a few removed; or (b) removing the entire removed layer 7; or (C) The entire removed layer 7 and a portion of the buffer layer 2 are removed. If the removed layer 7 comprises a portion of the original upper cover layer, the shell material removal mode (a) preferably includes the portion from which the upper cover layer is completely removed. -20- 1322481 V. INSTRUCTIONS (19) The reference to the original buffer structure after the removal of the 3' substance is indicated by reference numeral 1. Ge ^ Shao Qi contains: 5 15 Ministry of Economic Affairs Intellectual Property Bureau employee consumption cooperative printed 20 The entire original buffer structure when using the substance removal mode (a) and when the material removal mode (4) does not involve the removal of any additional layer 4 - Partially; or, 'the portion of the buffer layer 2 and the additional layer 4, when the substance removal mode (4) is used and when the substance removal mode (4) involves the removal of the additional layer 4 - part 8; or the ° knife-buffer layer 2, when the substance removal mode (b) is used; or - the part of the buffer layer 2, when the substance removal mode (c) is used. After the first recovery step with respect to material removal, the second recovery step includes reforming at least some of the layers that were removed during the first step. First, in some cases, it may be preferable to trim the surface of the donor wafer, the surface of the donor wafer 10 being where the material removal during the first recovery step occurs, and the material can be removed. Any roughness that may have appeared during the removal. For this purpose, for example, a heat treatment will be used so that the misalignment and other defects contained in the buffer structure I do not increase, do not increase in size, and do not create any sliding faces or stacking defects, as already discussed. Then, when a portion of the original buffer structure I is removed during the first failback step, this second step involves restoring the buffer structure I from the residual buffer structure. Once the reduction of the buffer structure I is formed, it is preferable to make the same as the original buffer structure I. In a special embodiment, it may be slightly changed. The parameters are produced in order to obtain a buffer structure that is slightly different from the original. For example, the concentration of some of the compounds in the material will be slightly changed. The reduction buffer structure I is dizzy when the original buffer layer 2 is in the first - recycling step When the snail is cut off, the buffer layer 2::removed portion is reformed. The reduction buffer structure I involves re-forming all of the additional layer 4 when all or part of the original additional layer 4 is cut during the first-recovery step. In this case, an additional layer 4 having a thickness substantially the same as or different from the original material may be produced. 15 20 Once the buffer structure I is restored, the upper cover layer may be formed. The upper cover layer will at least partially contain a new useful layer to be removed and one or more interlayers that may be included between the buffer structure I and the upper cover layer. The layers that may be formed during the second recovery step are preferably produced on their respective lower layers by layer growth (eg, by CVD or MB £ epitaxial growth). In the first case, 'these layers I and 5 At least one layer is grown in the original place directly continuing the formation of the lower growth branch. In this case, the underlying growth support is preferably formed by layer growth. In the second case, at least one of the layers is trimmed. Secondary steps to the surface of the underlying growth support (eg by CMP polishing, heat treatment -22- This paper scale + SS standard (CNS) A4 specification (210 X 297 mm) 1322481 A7 B7 V. Description of invention (21) 10 15 Ministry of Economic Affairs Intellectual Property Bureau employees consumption cooperatives print 20 or other leveling technology) and then grow so that the misplaced and other defects contained in the buffer structure I will not grow, will not increase the size and will not establish any sliding surface , stacking defects or other defects that degrade the quality of the buffer structure I. Therefore, 'except for the modifications and realizations expected by the skilled artisan', the final application is substantially the same as the original one. The wafer 10, that is, the donor wafer 1 图 shown in Figure 1. The donor wafer 10 obtained in this manner comprises at least a portion of the original buffer structure I and thus comprises at least a portion of the original buffer layer 2, which avoids recycling as known A full, lengthy, and expensive re-formation of the method is possible. Referring to Figures 4a through 4f, there are shown various variations of the method of removing a thin layer from a donor wafer 10 and recycling the donor wafer in accordance with the present invention. a step of using a donor wafer 1 having substantially the same layer structure as that described above with reference to FIG. 4a, comprising a substrate i and a buffer structure 16 in this exemplary method in accordance with the present invention 'An upper cover layer 5 has been added above the buffer structure I. Removal will be achieved during this method and will be associated with the removal of the upper overlay 5 and perhaps one of the buffer structures 1. Similarly, in other configurations of the donor wafer 10, there may be several upper overlays, and the ablation will then be associated with the upper overlay and perhaps with one of the buffer structures, or there may be no upper overlay, and then removed. Will only be associated with the _ part of the buffer structure. -twenty three-
裝 訂Binding
10ZZ46I A710ZZ46I A7
這兩個層I與5較佳是依據已知技術已藉由磊晶成 長(譬如藉由CVD與MBE)而形成。 在第一情況下,這些層之至少一層係在原處,直接 延續下層成長支撐之形成而成長,於此情況下之下層成 5 長支樓亦較佳是藉由層成長而形成。 在第二情況下,這些層之至少一層係在修整下層成 長支撐之表面之次要步驟(譬如藉由CMp拋光、熱處理 或其他平整技術)之後成長,以使包含在緩衝構造〗中之 錯置與其他缺陷不會增長,不會增加尺寸且不會建立任 10何滑動面、堆疊缺陷或其他會降低緩衝構造I之品質的 缺陷。 種摘除溥層之方法係顯示於圖4b與4c中。 本發明之第一較佳摘除步驟在於建立施體晶圓1〇中 之脆弱地帶’以便於這個脆弱地帶執行後來的分離,從 15 而分開期望之有用層。 於此提出幾種可被操作以建立這種脆弱地帶之技 術: 經濟部智慧財產局員工消費合作社印製 第一技術為熟悉本項技藝者所熟知之被稱為Smut-cut®技術 (又其說明可能在一些涵蓋用以減少晶圓 之技術 2〇之文獻中被找到其在於在其第一步驟中,以特定能量 植入原子物質(例如氫離子),以便依此方式建立脆弱地 帶。 第一技術在於藉由建立至少一多孔性的層來形成一 脆弱”面,言如在文獻£p_A 〇 849 788中所說明的。 •24- 本纸張尺度適用中國國家標準(CNS)A4規格--- 丄⑽481 A7 B7 五 發明說明( 23 依據這兩個技術之其中一個而形成之脆弱地帶,以 建立在基板1之上較佳: •在緩衝構造I之緩衝層中;或 -在緩衝層與緩衝構造I之任何鬆弛層之間;或 •在緩衝構造I之任何鬆他層中;或 、在緩衝構造I與上方覆蓋層5之間;或 -在上方覆蓋層5中,如果後者足夠厚的話;這就是 由一疊層所組成之上方覆蓋層5之特別情況。 10 15 20 參考圖4b,關於摘除一薄層之第二步驟在於使接收 基板6附著於上方覆蓋層5之表面。 接收基板6形成機械支撐,此機械支撐之剛性大到 足以支撐將從施體晶圓10被移除之上方覆蓋層5,並足 以保護它免受任何來自外界之機械應變。 這種接收基板6可能譬如由矽或石英或另一種型式 之材料所構成。 接收基板6係'藉由將其與上方復蓋f 5》密接觸的 方式置放,及將其接合於其上而進行附著,於其中分子 黏著劑最好是在基板6與上方覆蓋層5之間施加。 這種接合技術與變形例一起係特別說明於由Q γ T〇ng、u. G〇Sele與·ey所著作之名稱為”半導體晶圓 ^ ^ (Science and technology) , interscienceThe two layers I and 5 are preferably formed by epitaxial growth (e.g., by CVD and MBE) in accordance with known techniques. In the first case, at least one of the layers is in situ and grows directly following the formation of the underlying growth support. In this case, the formation of the 5 long branches is preferably formed by layer growth. In the second case, at least one of the layers is grown in a secondary step of trimming the surface of the underlying growth support (eg, by CMp polishing, heat treatment, or other planarization techniques) to displace the inclusions in the buffer structure. And other defects will not grow, will not increase the size and will not create any 10 sliding surfaces, stacking defects or other defects that will degrade the quality of the buffer structure I. The method of removing the ruthenium layer is shown in Figures 4b and 4c. The first preferred ablation step of the present invention consists in establishing a fragile zone in the donor wafer 1 to facilitate subsequent separation of the fragile zone, separating the desired useful layer from 15. Here are several techniques that can be manipulated to create such a vulnerable zone: The Ministry of Economic Affairs, the Intellectual Property Office, the Employees' Cooperative, and the first technology to be printed is known to those skilled in the art as Smut-cut® technology (also The description may be found in some of the literature covering techniques for wafer reduction in that it implants atomic species (eg, hydrogen ions) with specific energy in its first step to establish a vulnerable zone in this manner. One technique consists in forming a fragile "face" by establishing at least one porous layer, as described in the document £p_A 〇 849 788. • 24-- This paper scale applies to the Chinese National Standard (CNS) A4 specification. --- 丄 (10) 481 A7 B7 Five inventions description (23) The fragile zone formed by one of the two technologies is preferably built on the substrate 1: • in the buffer layer of the buffer structure I; or - in the buffer Between the layer and any relaxed layer of the buffer structure I; or in any of the loose layers of the buffer structure I; or between the buffer structure I and the upper cover layer 5; or - in the upper cover layer 5, if the latter Thick enough This is the special case of the upper cover layer 5 consisting of a laminate. 10 15 20 Referring to Figure 4b, the second step for removing a thin layer consists in attaching the receiving substrate 6 to the surface of the upper cover layer 5. The substrate 6 forms a mechanical support that is sufficiently rigid to support the overlying cover layer 5 that will be removed from the donor wafer 10 and is sufficient to protect it from any mechanical strain from the outside. Such a receiving substrate 6 may be矽 or quartz or another type of material. The receiving substrate 6 is placed in close contact with the upper cover f 5 and adhered thereto for attachment, in which the molecules are adhered Preferably, the agent is applied between the substrate 6 and the upper cover layer 5. This bonding technique is specifically described together with the modification in the name "semiconductor" by Q γ T〇ng, u. G〇Sele and ey. Wafer ^ ^ (Science and technology) , interscience
Technology)的文獻中。 "如果必要的話,接合伴隨有待接合之各個表面之適 當的預先處理及/或伴隨有熱能之供應及/或額外點合劑 -25- 本紙張尺度適用中國國家標準(CNS)A4規格(21〇 χ 297公釐) 1322481 A7 B7 五、發明說明(24 ) 之提供。 因此,舉例而言,在接合期間或正好在接合之後施 加之熱處理,可能使接合連接變硬。 接合亦可由例如矽土之接合層所控制,該接合層係 5 插在上方覆蓋層5與接收基板6之間,尤其具有高分子 接合能力。 具優點的是,形成接收基板6之接合面之材料及/或 可能形成之接合層之材料是電性絕缘的,以便從已摘除 層產生SOI構造,接著,SOI構造之半導體層係為被轉 10 移之有用層5。 一旦接收基板6被接合之後,施體晶圓10之一部分 係於預先形成之脆弱地帶藉由使其分離而被摘除。 在該第一技術(Smart-cut®)的情況下,在第二步驟 中,植入地帶(形成脆弱地帶)係受到熱及/或機械處理, 15 或其他能量之供應,以便於脆弱地帶使其分離。 在該第二技術的情況下,脆弱層係受到機械處理或 其他能量之提供,以便於脆弱層使其分離。 經濟部智慧財產局員工消費合作社印製 依據這兩個技術之其中一個之於脆弱地帶之分離, 譬如使移除晶圓10的大部分成為可能,以便獲得可能包 20 含緩衝構造I之其餘部分、上方覆蓋層5、任何接合層 與接收基板6之構造。 然後,較佳是操作於移除層修整所形成之構造之表 面之步驟,以便藉由使用譬如化學機械拋光CMP、蝕刻 或熱處理來移除任何表面粗糙度,厚度之不均勻及/或不 -26- 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 1322481 A7 五、發明說明(25 被期望的層。 摘除後的層r形成位於摘除後殘留之基板】之上的 施體晶圓1〇之一部分,這整個晶圓形成欲被傳送以供回 收之把體晶圓10*,以挣赌接古 便隨後在另一個層摘除期間被再度 使用。 口收步驟係顯示於圖4d、4e與4f中-。 參考圖4d,第-回收步驟相當於移除摘除後的層7, 之一部分。 *依據那些上述已經討論的之其中—個機械或化學機 械侵蝕或蝕刻係被操作以移除摘除後的層7,之一部分。 15 經濟部智慧財產局員工消費合作社印製 20 尤其如果摘除後的層7,包含數個不同的原始層(譬 如,上方覆蓋層5之一部分與緩衝構造〗之一部分)的 話,亦可藉由各種不同的機械手段來操作用以移除物質 之數個技術,例如,藉由CMP所達成之侵蝕與藉由單純 所達成之拋光’兩者可以彼此接續。 這種物質之機械侵姓可能在表面處理(例如化學餘 刻、熱處理或平整技術)之前及/或之後,以使包含在緩 衝構造I中之錯置與其他缺陷不會增長,不會增加尺寸 且不會建立任何滑動面、堆疊缺陷或其他會降低緩衝構 造I之品質的缺陷。 在所有的情況下’且參考圖4d於這個第一回收步驟 之結尾’緩衝構造Γ之至少一部分會殘留下來。 參考圖4e與4f’第二回收步驟相當於藉由各自形 成緩衝構造I之任何失去部分與上方覆蓋層5,來還原 -27-本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 實質上與摘除前已存在的那些層相同的層。 ^些層最好是依據一項技術(實質上與上述這些技術 之其中一個相同),藉由形成一層而還原。 在第一情況下,這些層之至少一層係在原處,直接 延續下層成長支撐之形成而成長,於此情況下之下層成 長支撐亦最好是藉由層成長而形成。 在第二情況下,這四個層之至少一層係在修整下層 成長支撐之表面之次要步驟(譬如藉由CMP拋光、熱處 理或其他平整技術)之後成長,以使包含在緩衝構造I中 1〇之錯置與其他缺陷不會增長,+會增加尺寸且不會建立 任何滑動面、堆疊缺陷或其他會降低緩衝構造I之品質 的缺陷。 施體晶® 10",所獲得之層工與5並不需要與施體晶 圓10之層I與5相同,圖4d所示之施體晶圓可能作為 15供其他型式之層用的基板。 在依據本發明回收施體晶圓1〇之後,可接著再操作 摘除一有用層之方法。 因此,在本發明之有利的上下文中,依據本發明之 從施體晶圓10摘除有用層之循環方法係藉由使得下述事 20 項彼此重複順利完成而操作: .一摘除模式;以及 •依據本發明之一回收方法。 在操作循環摘除方法之前,可能依據本發明,利用 上述之用以在基板上產生薄層之一種或多種技術來操作 -28- 1322481 A7 B7 五、發明說明(27 ) 一種產生施體晶圓10之方法。 在這個文獻之其餘部分中,我們提供包含緩衝構造 I並能夠藉由依據本發明之—方法而操作之施體晶圓1〇 之組態之數個例子。 尤其,我們將提供可被有利地用於這種施體晶圓之 數種材料β 如我們所看見的,具有第一晶格參數之產生在基板 1上之緩衝構造ί,大部分時間具有在其自由面上擁有第 二晶格參數之主要功能。 10 然後,這種緩衝構造〗包含可能產生這種匹配的晶 格參數之緩衝層2。 最常採用以獲得具有此種特性之緩衝層2之技術, 係用具有由數個原子元素所組成之緩衝層2,其包含: •至少一原子元素’其會在基板1之組成物令;以 15 及 •至少一原子元素,其完全沒有或非常少會在基板 1中’具有在緩衝層2之厚度内逐漸改變之濃度。 緩衝層2中之這種元素之漸進濃度,將是緩衝層2 經濟部智慧財產局員工消費合作社印製 中之晶格參數之以一種變質方式而逐漸改變的主要原 20 因。 因此,於此組態中,缓衝層2將主要是合金》 為基板1之組成物以及為缓衝層2所選擇的原子元 素可以是屬於IV族,例如Si或Ge。 舉例而言’於此情況下,可能具有由Si所構成之基 -29- 本紙張尺度適用中國围家標準(CNS)A4規格(210 x 297公釐) 1與由SiGe所構成之緩衝層2,其中Ge濃度係隨著 於,、基板1之介面接近〇之數值以及在缓衝層2之 另一面上之特定數值之間的厚度漸進改變。 在另個方案中,基板1與緩衝層2之組成物包含 5 m-V族之合金,例如可能的(Al,Ga,InHN,P,As:^$e 緩衝層2較佳是由屬於三元型式或更高等級之合金 所組成。 舉例而言,於此情況下,可能具有由AsGa所構成 之基板1與包含As及/或Ga以及至少一其他元素之缓衝 10層2’該至少一其他元素係隨著在位於與基板1之介面 接近0之數值以及在緩衝層2之另一面上之特定數值之 間的厚度漸進改變。 基板1與緩衝層2之組成物可包含Π_νι族之原子 元素對,例如可能的(2!1,(:(1)-(5,56,丁〇組合。 15 以下’我們提供這種組態之一些例子: 例1 :在回收之後,施體晶圓10包含: -一基板1,由Si所構成; 經濟部智慧財產局員工消費合作社印製 -一緩衝構造I’由SiGe所構成,具有一緩衝層2 與一附加層4 ; zo - 一摘除後的層7 ’由Si或SiGe所構成,其在摘除 上方覆蓋層5之一部分之後形成上方覆蓋層5之其餘部 分。 這些施體晶圓10尤其在摘除SiGe及/或應變Si之 層時被使用,以便產生SGOI、SOI或Si/SGOI構造。 -30- 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 五、發明說明(29 5 10 15 經濟部智慧財產局員工消費合作社印製 20 緩衝層2較佳是具有從與基板i之介面漸進增加之 Ge濃度’以便如上所述使SiGe晶格參數改變。 厚度一般是在1與3/zm之間,以便於該表面獲得 良好的構造鬆弛’並包含與晶格參數之差異相關的缺 陷,俾能隱藏這些缺陷。 . 附加層4係由因緩衝層2而鬆弛之SiGe所構成,其 中Ge濃度較佳是均勻的且實質上等於靠近它們的介面 之緩衝層2之Ge濃度。 在SiGe附加層4内之矽中的鍺濃度一般係在15〇/〇與 30%之間。 以30%的這個限制表示目前技術之一般限制,但在 未來幾年可能會作改變。 附加層4具有隨情況可大幅改變之厚度,而一般厚 度係在0.5與1微米之間。 例2 :在回收之後,施體晶圓1〇包含: -一 Si基板1 ; •具有一 SiGe緩衝層2與實質上鬆弛Ge之一附加 層4之一緩衝構造I ; -一摘除後的AsGa層7,其在摘除上方覆蓋層5之 一部分之後形成上方覆蓋層5之其餘部分。 緩衝層2較佳是具有從與基板1之介面漸進增加之 Ge濃度’以便使晶格參數在Si基板1之晶格參數與Ge 附加層4之晶格參數之間改變。 為了這個目的’在缓衝層2中’ Ge濃度係被製成從 .31. 本纸張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 1322481 Α7 Β7 五、發明說明(3〇 大約〇進行至大約100%’或更精確地在98%左右,以便 使兩種材料之理論上的晶格之完全相同。 例3 :在回收之後,施體晶圓1〇包含: -—基板1,在其與緩衝構造I之介面處包含至少 一 AsGa部分; -由III-V材料所構成之緩衝構造I ; -—摘除後的層7 ’包含Ill-v材料,其在摘除上方 覆蓋層5之一部分之後構成上方覆蓋層5之其餘部分。 這種緩衝構造I之主要益處係用以使上方覆蓋層5 10 15 經濟部智慧財產局員工消費合作社印製 20 之材料V之晶格參數(其標稱數值大約為5 87埃)與Technology) in the literature. " If necessary, the joint is accompanied by appropriate pre-treatment of the surfaces to be joined and/or accompanied by the supply of thermal energy and/or additional dot-mixer-25- This paper scale applies to the Chinese National Standard (CNS) A4 specification (21〇 χ 297 mm) 1322481 A7 B7 V. Description of invention (24). Thus, for example, heat treatment applied during or just after joining may stiffen the joint connection. The bonding may also be controlled by a bonding layer such as alumina, which is interposed between the upper cladding layer 5 and the receiving substrate 6, and particularly has a polymer bonding ability. Advantageously, the material forming the interface of the receiving substrate 6 and/or the material of the bonding layer that may be formed is electrically insulating to produce an SOI structure from the removed layer, and then the semiconductor layer of the SOI structure is turned 10 Move the useful layer 5. Once the receiving substrate 6 is bonded, a portion of the donor wafer 10 is removed by pre-forming the fragile zone by separating it. In the case of the first technology (Smart-cut®), in the second step, the implant zone (forming the fragile zone) is subjected to thermal and/or mechanical treatment, 15 or other energy supply to facilitate the fragile zone. Its separation. In the case of this second technique, the fragile layer is subjected to mechanical treatment or other energy supply to facilitate the separation of the fragile layer. The Ministry of Economic Affairs' Intellectual Property Office staff consumption cooperative prints the separation of the vulnerable zone based on one of these two technologies, such as making it possible to remove most of the wafer 10 in order to obtain the remainder of the possible package 20 containing the buffer structure I. The structure of the upper cover layer 5, any bonding layer and the receiving substrate 6. Then, preferably, the step of removing the surface of the layer formed structure is performed to remove any surface roughness, thickness unevenness and/or no by using, for example, chemical mechanical polishing CMP, etching or heat treatment. 26- The paper size applies to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 1322481 A7 V. Description of the invention (25 desired layer. The layer r after removal forms the substrate remaining after removal) One part of the wafer wafer, which forms the wafer wafer 10* to be transferred for recycling, to be used again after the other layer is removed. The mouth-taking step is shown in the figure. 4d, 4e and 4f - Referring to Figure 4d, the first-recovery step is equivalent to removing a portion of the removed layer 7, * being operated according to one of those mechanical or chemical mechanical erosion or etching systems already discussed above. To remove the removed layer 7, one part. 15 Ministry of Economic Affairs Intellectual Property Bureau employee consumption cooperative print 20 Especially if the removed layer 7 contains several different original layers (for example, one of the upper cover layers 5) In the case of a part of the buffer structure, a number of different techniques can be used to operate the techniques for removing the substance, for example, the erosion achieved by CMP and the polishing achieved by simply The mechanical invaders of this substance may be before and/or after surface treatment (such as chemical re-engraving, heat treatment or leveling techniques) so that misplacements and other defects contained in the buffer structure I do not increase. Does not increase the size and does not create any sliding surfaces, stacking defects or other defects that will degrade the quality of the buffer structure I. In all cases 'and refer to Figure 4d at the end of this first recycling step' buffer construction At least a portion will remain. Referring to Figures 4e and 4f, the second recovery step is equivalent to restoring any lost portion of the buffer structure I to the upper cover layer 5, and the paper size is applied to the Chinese National Standard (CNS). A4 size (210 X 297 mm) is essentially the same layer as those already existed before removal. ^These layers are preferably based on a technique (essentially One of the technologies is the same), which is reduced by forming a layer. In the first case, at least one layer of these layers is in the original place, and directly grows under the formation of the lower growth support. In this case, the growth support of the lower layer is also best. In the second case, at least one of the four layers is grown after a secondary step of trimming the surface of the underlying growth support (eg, by CMP polishing, heat treatment, or other planarization techniques) to The misalignment and other defects contained in the buffer structure I will not increase, and the + will increase the size and will not create any sliding surface, stack defects or other defects that will degrade the quality of the buffer structure I. Shi Jingjing 10", The layers and 5 obtained do not need to be the same as layers I and 5 of the donor wafer 10, and the donor wafer shown in Figure 4d may serve as a substrate for 15 other layers. After the donor wafer has been recovered in accordance with the present invention, a method of removing a useful layer can then be performed. Therefore, in the advantageous context of the present invention, the recycling method for removing the useful layer from the donor wafer 10 in accordance with the present invention operates by causing the following 20 items to be successfully completed with each other: an ablation mode; and One of the inventions is a recycling method. Prior to operating the cycle ablation method, it is possible to operate in accordance with the present invention using one or more of the techniques described above for creating a thin layer on a substrate. -28-1322481 A7 B7 V. INSTRUCTION DESCRIPTION (27) A method of producing a donor wafer 10 . In the remainder of this document, we provide several examples of configurations that include a buffer structure I and that can be manipulated by the method of the present invention. In particular, we will provide several materials that can be advantageously used in such donor wafers. As we have seen, the first lattice parameter produces a buffer structure on the substrate 1, which has a free time most of its time. The main function of the second lattice parameter is on the surface. 10 This buffer construction then contains a buffer layer 2 that may produce such matched lattice parameters. The technique most commonly used to obtain the buffer layer 2 having such characteristics is to use a buffer layer 2 composed of a plurality of atomic elements, which comprises: • at least one atomic element 'which will constitute a composition on the substrate 1; With 15 and at least one atomic element, there is no or very little concentration in the substrate 1 that has a gradual change in the thickness of the buffer layer 2. The progressive concentration of this element in the buffer layer 2 will be the main cause of the gradual change of the lattice parameters in the printing of the buffer layer 2 of the Intellectual Property Office of the Ministry of Economic Affairs. Therefore, in this configuration, the buffer layer 2 will be mainly a composition of the substrate 1 and the atomic element selected for the buffer layer 2 may be of the group IV, such as Si or Ge. For example, 'in this case, there may be a base -29 composed of Si. This paper scale applies to the Chinese National Standard (CNS) A4 specification (210 x 297 mm) 1 and the buffer layer 2 composed of SiGe. Wherein the Ge concentration is gradually changed as the interface between the substrate 1 approaches the value of 〇 and the thickness between the specific values on the other side of the buffer layer 2. In another embodiment, the composition of the substrate 1 and the buffer layer 2 comprises an alloy of a 5 mV group, for example, a possible (Al, Ga, InHN, P, As: ^$e buffer layer 2 is preferably of a ternary type Or a higher grade alloy. For example, in this case, there may be a substrate 1 composed of AsGa and a buffer containing 10 layers of As and/or Ga and at least one other element 2' The elemental system gradually changes with a thickness between a value close to 0 to the interface of the substrate 1 and a specific value on the other side of the buffer layer 2. The composition of the substrate 1 and the buffer layer 2 may contain atomic elements of the Π_νι group. Yes, for example, possible (2!1,(:(1)-(5,56, 〇〇 combination. 15 below') We provide some examples of this configuration: Example 1: After recycling, the donor wafer 10 contains: - a substrate 1, consisting of Si; Ministry of Economic Affairs Intellectual Property Bureau employee consumption cooperative printing - a buffer structure I' consisting of SiGe, with a buffer layer 2 and an additional layer 4; zo - a layer 7 after removal 'consisting of Si or SiGe, which is shaped after removing a portion of the upper cover layer 5 The rest of the upper cover layer 5. These donor wafers 10 are used, in particular, in the removal of SiGe and/or strained Si layers to produce SGOI, SOI or Si/SGOI configurations. -30- This paper scale applies to Chinese national standards (CNS) A4 specification (210 X 297 mm) V. Description of invention (29 5 10 15 Ministry of Economic Affairs Intellectual Property Office employee consumption cooperative printing 20 buffer layer 2 preferably has a Ge concentration gradually increasing from the interface with substrate i) The SiGe lattice parameters are varied as described above. The thickness is generally between 1 and 3/zm so that the surface obtains good structural relaxation' and contains defects associated with differences in lattice parameters that can hide these defects. The additional layer 4 is composed of SiGe which is relaxed by the buffer layer 2, wherein the Ge concentration is preferably uniform and substantially equal to the Ge concentration of the buffer layer 2 near the interface of the SiGe additional layer 4. The radon concentration is generally between 15 〇 / 〇 and 30%. The 30% limit represents the general limitations of the current technology, but may change in the next few years. The additional layer 4 has a thickness that can vary greatly depending on the situation. ,and The thickness is between 0.5 and 1 micron. Example 2: After recycling, the donor wafer 1〇 comprises: - a Si substrate 1; • one of the SiGe buffer layer 2 and one of the substantially relaxed Ge one additional layer 4 buffer Structure I; - A removed AsGa layer 7, which forms the remainder of the upper cladding layer 5 after removing a portion of the upper cladding layer 5. The buffer layer 2 preferably has a Ge concentration that progressively increases from the interface with the substrate 1. In order to change the lattice parameter between the lattice parameter of the Si substrate 1 and the lattice parameter of the Ge additional layer 4. For this purpose 'in the buffer layer 2' the Ge concentration system is made from .31. This paper scale applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 1322481 Α7 Β7 V. Invention description (3 〇 approximately 100 to about 100%' or more precisely about 98%, so that the theoretical lattice of the two materials is exactly the same. Example 3: After recycling, the donor wafer 1〇 contains: - substrate 1 Having at least one AsGa portion at its interface with the buffer structure I; - a buffer structure I composed of a III-V material; - the removed layer 7' comprises an Ill-v material, which is removed from the upper cover layer 5 A portion of the outer cover layer 5 is then formed. The main benefit of this buffer structure I is to make the upper cover layer 5 10 15 the Ministry of Economic Affairs Intellectual Property Office staff consumption cooperative print 20 material V lattice parameters (its The nominal value is approximately 5 87 angstroms) and
AsGa之材料之晶格參數(其標稱數值大約為5.65埃)相匹 配。 在整體III-V材料中’且藉由比較整體ιηρ與整體 AsGa ’ AsGa較不昂貴’在半導體市場上可更廣泛取 得,較少機械脆弱性,其乃為一種較為熟知之利用背面 接觸技術之材料’且其尺寸可達到高數值(對整體Inp而 吕,一般為6叶而非4对)。 在摘除前之施體晶圓10之特別組態中,摘除前之上 方覆蓋層5包含待被移除之ιηρ。 因為整體InP具有大致受限於4吋之尺寸,所以施 體晶圓10提供譬如一種以製造尺寸為6吋之ιηρ層之解 決方法。 用以產生這種上方覆蓋層之緩衝構造I需要一般大 於1微米之厚度,尤其如杲其可依據本發明被回收的 -32- 本紙張尺度適用中國國家標準(CNS)A4規格(210 χ297公釐) 1322481 A7 B7 五、發明說明(31) 話’其將被製成朝向更大的厚度改變。 通常被操作以產生這種緩衝構造I之磊晶成長技術 係又特別困難且昂貴,因此其對於在摘除有用層之後能 至少局部使其恢復是有利的。 具優點的是’緩衝構造I包含由InGaAs所組成之緩 衝層2 ’其中in濃度係在〇與大約53〇/〇之間改變。 緩衝構造I可更包含由例如InGaAs或InAlAs之III-V材料所構成之附加層4 ’ ΠΙ-V材料具有實質上固定的 原子元素之遭度。 10 15 經濟部智慧財產局員工消費合作社印製 20 在一個特別的摘除情況下,InP上方覆蓋層5與附 加層4之一部分將被移除’以便將其轉移至接收基板。 因此’將可能從任何存在於兩種移除材料之間的電 氣或電子特性獲得利益》 情況是,舉例而言,如果被移除之附加層4之一部 分係由InGaAs或InAlAs所構成的話:inAlAs材料與 InP之間的電子頻帶不連續性將建立被摘除層中之改善 的電子移動性。 施體晶圓10可能包含其他III-V化合物(例如 InAlAs等)之其他組態。 這種層摘除之一般應用為HEMT或HBT(分別為"高 電子移動率電晶體"與"異質接合雙載子電晶體")生產。 在這個文獻中所提出之半導體層中,可能添加其他 成分加至這些半導體層’例如在討論中的層中具有實質 上小於或等於50%之碳濃度或尤其具有小於或等於5% -33- 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 1322481The lattice parameters of the AsGa material (which has a nominal value of approximately 5.65 angstroms) match. In the overall III-V material 'and by comparing the overall ιηρ with the overall AsGa 'AsGa less expensive' is more widely available in the semiconductor market, less mechanical fragility, which is a more familiar use of back contact technology The material 'and its size can reach a high value (for the overall Inp, especially 6 leaves instead of 4 pairs). In the special configuration of the donor wafer 10 prior to removal, the upper overlying cover layer 5 contains the ιηρ to be removed. Since the overall InP has a size that is substantially limited to 4 inches, the donor wafer 10 provides, for example, a solution for fabricating a layer of 6 Å. The buffer structure I used to create such an overlying cover layer typically requires a thickness greater than 1 micron, especially as it can be recycled in accordance with the present invention. The -32- paper scale applies to the Chinese National Standard (CNS) A4 specification (210 χ 297 metric) PCT) 1322481 A7 B7 V. INSTRUCTIONS (31) The words 'will be made to change towards a greater thickness. Epitaxial growth techniques that are typically operated to create such a buffer structure I are particularly difficult and expensive, and thus are advantageous for at least partially recovering after removal of the useful layer. Advantageously, the buffer structure I comprises a buffer layer 2' comprised of InGaAs wherein the in concentration is varied between 〇 and about 53 〇/〇. The buffer structure I may further comprise an additional layer 4' of a III-V material such as InGaAs or InAlAs having a substantially fixed atomic element. 10 15 Ministry of Economic Affairs Intellectual Property Office Staff Consumer Cooperative Print 20 In a particular removal scenario, a portion of the overlay layer 5 and additional layer 4 above the InP will be removed' to transfer it to the receiving substrate. Thus the 'will be possible to benefit from any electrical or electronic properties present between the two removed materials' is, for example, if one of the additional layers 4 removed is made up of InGaAs or InAlAs: inAlAs The electronic band discontinuity between the material and InP will establish improved electron mobility in the removed layer. The donor wafer 10 may contain other configurations of other III-V compounds (e.g., InAlAs, etc.). The general application for this layer removal is HEMT or HBT ("High Electron Mobility Transistor" and "Hexual Bonded Bipolar Transistor", respectively). In the semiconductor layer proposed in this document, it is possible to add other components to these semiconductor layers', for example having a carbon concentration of substantially less than or equal to 50% or especially less than or equal to 5% -33 in the layer in question. This paper size applies to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 1322481
之濃度之碳。 最後,本發明並未受限於由上述例子中所提供之材 料所構成之緩衝構造卜中間層8或上方覆蓋層5 ,但亦 延伸至其他型式之合金(IV_IV、m_v、II VI型式卜 應該特別要載明的是這些合金可以是二元、三元、 四元或更高等級的材料。 本發明並未受限於具有使兩個鄰近構造之間的晶格 參數與不同的各個晶格參數相匹配之主要功能之可回收 的緩衝層2或緩衝構造!,但亦關於在本文獻中以最普 通的方式定義且依據本發明可被回收之任何緩衝層2或 緩衝構造I。 摘除後最後獲得之構造並未受限於SGOI或SOI構 造β 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS)A4規格(210x297公釐) 1322481The concentration of carbon. Finally, the present invention is not limited to the buffer structure intermediate layer 8 or the upper cover layer 5 composed of the materials provided in the above examples, but also extends to other types of alloys (IV_IV, m_v, II VI type should be It is particularly noted that these alloys may be binary, ternary, quaternary or higher grade materials. The invention is not limited to having individual lattices that have different lattice parameters between two adjacent structures. The recyclable buffer layer 2 or buffer structure of the main function whose parameters match, but also with respect to any buffer layer 2 or buffer structure I which is defined in the most common manner in this document and which can be recovered in accordance with the invention. The resulting structure is not limited by the SGOI or SOI structure. The Ministry of Economic Affairs, the Intellectual Property Office, the employee consumption cooperative, the printed paper scale, the Chinese National Standard (CNS) A4 specification (210x297 mm), 1322481
五、發明說明 33 圖 10 15 圖式簡單說明】 圖1顯示依據習知技術之施體晶圓 顯示摘除後之施體晶圓。 圖3顯示第一回收步驟後之施體晶圓。 圖4顯示依據本發明之方法之各種不同步驟,其依 序匕括從一施體晶圓摘除一薄層,以及回收摘除後之施 體晶圓。 【圖式之代號說明 11'〜緩衝構造 1〜基板 2’〜下部 4'〜上部 6〜接收基板 1'〜緩衝構造之殘留部分 2〜緩衝層 附加層 5〜上方覆蓋層 7〜摘除後的層 〜摘除後的層 7a〜凸起部分 7b〜粗糙部分 10、10,、10·•〜施體晶圓 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS)A4規格(210x297公釐)V. DESCRIPTION OF THE INVENTION 33 Figure 10 15 Brief description of the drawing Fig. 1 shows a donor wafer after the removal of the donor wafer according to the prior art. Figure 3 shows the donor wafer after the first recycling step. Figure 4 shows various steps of the method in accordance with the present invention, which sequentially includes removing a thin layer from a donor wafer and recovering the removed donor wafer. [Description of the code 11' to the buffer structure 1 to the substrate 2' to the lower portion 4' to the upper portion 6 to the receiving substrate 1' to the remaining portion of the buffer structure 2 to the buffer layer additional layer 5 to the upper cover layer 7 to the removed layer Layer ~ removed layer 7a ~ raised portion 7b ~ rough portion 10, 10, 10 ·•~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ MM)
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FR0210588A FR2843827B1 (en) | 2002-08-26 | 2002-08-26 | MECHANICAL RECYCLING OF A PLATE COMPRISING A STAMP LAYER AFTER SELECTING A THIN LAYER |
US43193002P | 2002-12-09 | 2002-12-09 |
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