JP5178028B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP5178028B2 JP5178028B2 JP2007059479A JP2007059479A JP5178028B2 JP 5178028 B2 JP5178028 B2 JP 5178028B2 JP 2007059479 A JP2007059479 A JP 2007059479A JP 2007059479 A JP2007059479 A JP 2007059479A JP 5178028 B2 JP5178028 B2 JP 5178028B2
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
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- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
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- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19102—Disposition of discrete passive components in a stacked assembly with the semiconductor or solid state device
- H01L2924/19103—Disposition of discrete passive components in a stacked assembly with the semiconductor or solid state device interposed between the semiconductor or solid-state device and the die mounting substrate, i.e. chip-on-passive
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- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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Description
第1の実施形態に係る半導体装置1の構成において半導体チップ4とチップコンデンサ8との水平方向の離間距離を非常に短くさせようとすると、半導体チップ4及びチップコンデンサ8のサイズによっては、チップコンデンサ8と半導体チップ4とが直接的に接触するか、あるいは直接接触しなくても近接しすぎて電気的に接触してしまう不具合が生じ得る。また、搭載ずれしたチップコンデンサ8によって半導体チップ4の搭載が出来ない不具合が生じ得る。なお、ここでいう水平方向とは基板2の面と平行する方向である。
これに対して第2の実施形態に係るスペーサー層21を備える構成では、半導体チップ4と基板2とスペーサー層21で囲まれた空間がある。そのため、上述したようなチップコンデンサ8あるいは半導体チップ4の搭載ズレを当該空間で吸収して上記不具合の発生を抑えることができる。
4 半導体チップ 5 パッド電極 6 パッド電極 7 導体板
8 チップコンデンサ 9 ボンディングワイヤ 10 バンプ電極
11 モールド樹脂 20 半導体装置 21 スペーサー層
100 半導体装置 101 基板 102 半導体チップ
103 パッド電極 104 パッド電極 105 バンプ電極
106 チップコンデンサ 107 ボンディングワイヤ
108 モールド樹脂
Claims (7)
- 表面上に設けられた半導体チップの配置領域と、前記配置領域の外周に対応する前記表面に設けられた複数の第1の電極と、前記表面上に設けられるチップコンデンサの端子と接続される電極であり、前記第1の電極と前記配置領域との間に、前記チップコンデンサと前記半導体チップの離間距離が、水平的に見て前記半導体チップと前記チップコンデンサが接触するか、あるいは電気的に接触するほどに短く設けられたパッド電極とを有する樹脂材料から成る基板と、表面上に第2の電極が形成され、裏面が前記基板の表面と対向し、前記配置領域に設けられた前記半導体チップと、前記基板と前記半導体チップの裏面との間に配置され、前記配置領域に設けられた金属材料からなるスペーサー層と、前記パッド電極に設けられた接着層によって接着されたチップコンデンサと、前記第1の電極と前記第2の電極とを電気的に接続し、前記チップコンデンサを跨いだボンディングワイヤとを備えた半導体装置の製造方法であり、
前記スペーサー層の横幅を、前記半導体チップの横幅よりも狭くし、前記スペーサー層の高さを前記チップコンデンサの高さよりも高くして、前記接着層の形成ずれ、または前記半導体チップの搭載ずれにより発生する前記チップコンデンサと前記半導体チップとの前記接触または前記電気的接触を、前記半導体チップ、前記基板および前記スペーサー層で囲まれた空間により吸収する事を特徴とした半導体装置の製造方法。 - 前記チップコンデンサの代わりに、コイル、チップ抵抗またはチップインダクタンスからなる電子部品が設けられる請求項1に記載の半導体装置の製造方法。
- 前記配置領域に対応する前記基板には、金属材料からなるアイランドが設けられる請求項1または請求項2に記載の半導体装置の製造方法。
- 前記チップコンデンサまたは前記電子部品は前記半導体チップと重畳せず、前記半導体チップと前記電子部品との水平方向の離間距離が0.1mm以下であることを特徴とする請求項2または請求項3に記載の半導体装置の製造方法。
- 前記半導体チップ上に、別の半導体チップが積層されていることを特徴とする請求項1
乃至請求項4のいずれかに記載の半導体装置の製造方法。 - 前記半導体チップ上に、別の半導体チップが平面的に複数個配置されていることを特徴とする請求項1乃至請求項4のいずれかに記載の半導体装置の製造方法。
- 前記半導体チップはディスクリート素子であり、前記別の半導体チップは前記半導体チップを制御する素子を含むことを特徴とする請求項5または請求項6に記載の半導体装置の製造方法。
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JP2007059479A JP5178028B2 (ja) | 2007-03-09 | 2007-03-09 | 半導体装置の製造方法 |
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JP2007059479A JP5178028B2 (ja) | 2007-03-09 | 2007-03-09 | 半導体装置の製造方法 |
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JP2012015448A Division JP2012080145A (ja) | 2012-01-27 | 2012-01-27 | 半導体装置 |
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JP5178028B2 true JP5178028B2 (ja) | 2013-04-10 |
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US20230395558A1 (en) * | 2022-06-01 | 2023-12-07 | Nanya Technology Corporation | Semiconductor device with supporter against which bonding wire is disposed |
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JP4228457B2 (ja) * | 1999-03-15 | 2009-02-25 | ソニー株式会社 | 電子モジュール及び電子機器 |
JP2001127245A (ja) * | 1999-10-26 | 2001-05-11 | Seiko Epson Corp | 半導体装置及びその製造方法、回路基板並びに電子機器 |
JP3819851B2 (ja) * | 2003-01-29 | 2006-09-13 | 松下電器産業株式会社 | 半導体装置およびその製造方法 |
JP2006156797A (ja) * | 2004-11-30 | 2006-06-15 | Shinko Electric Ind Co Ltd | 半導体装置 |
JP4589743B2 (ja) * | 2005-01-31 | 2010-12-01 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP4823662B2 (ja) * | 2005-11-29 | 2011-11-24 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
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