JP5149206B2 - 回路装置、回路装置の製造方法および回路装置の評価方法 - Google Patents
回路装置、回路装置の製造方法および回路装置の評価方法 Download PDFInfo
- Publication number
- JP5149206B2 JP5149206B2 JP2009003759A JP2009003759A JP5149206B2 JP 5149206 B2 JP5149206 B2 JP 5149206B2 JP 2009003759 A JP2009003759 A JP 2009003759A JP 2009003759 A JP2009003759 A JP 2009003759A JP 5149206 B2 JP5149206 B2 JP 5149206B2
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- circuit device
- film
- bump
- bonding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01075—Rhenium [Re]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01327—Intermediate phases, i.e. intermetallics compounds
Description
(1)金属間化合物の生成
(2)酸化被膜、吸着した汚染被膜の有無
(3)結晶粒径、形状
(4)結晶方位
Claims (7)
- 第1電極を備えた第1の部材と、第2電極を備えた第2の部材と、前記第1および第2の電極に挟まれた位置に配置され、両電極を接続するAuバンプを備えた回路装置であって、
前記第1電極は、少なくとも表面がAu層からなり、当該第1電極の上には、前記Au層の結晶粒よりも粒径が小さいAu多結晶からなるAu微細結晶膜が配置されていることを特徴とする回路装置。 - 請求項1に記載の回路装置において、前記第1電極のAu層は、Auメッキ層であり、前記Au微細結晶膜は、気相成長により形成された膜であることを特徴とする回路装置。
- 請求項1または2に記載の回路装置において、前記Au微細結晶膜は、前記第1電極のAu層よりも膜厚が薄いことを特徴とする回路装置。
- 少なくとも表面がAu層からなるAu電極を備えた基板に、Auバンプを固相拡散接合する工程を含む回路装置の製造方法であって、
前記固相拡散接合工程は、
前記Au電極の上に、該Au電極の表面Au層を構成するAuの結晶粒よりも結晶粒の小さいAu微細結晶膜を形成する工程と、
前記Au微細結晶膜が形成された前記Au電極上に前記Auバンプを加熱圧着する工程とを有することを特徴とする回路装置の製造方法。 - 請求項4に記載の回路装置の製造方法において、前記Au微細結晶膜を形成する工程は、気相成長法により前記Au微細結晶膜を形成することを特徴とする回路装置の製造方法。
- 請求項5に記載の回路装置の製造方法において、前記Au微細結晶膜を蒸着法あるいはスパッタ法により形成することを特徴とする回路装置の製造方法。
- 請求項1に記載の回路装置を評価する方法であって、
前記第1電極とAuバンプの断面を拡大観察し、少なくとも前記Au微細結晶膜とAuバンプとの接合面を渡って形成された再結晶粒が確認された場合、良品と判断することを特徴とする回路装置の評価方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009003759A JP5149206B2 (ja) | 2009-01-09 | 2009-01-09 | 回路装置、回路装置の製造方法および回路装置の評価方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009003759A JP5149206B2 (ja) | 2009-01-09 | 2009-01-09 | 回路装置、回路装置の製造方法および回路装置の評価方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2010161296A JP2010161296A (ja) | 2010-07-22 |
JP5149206B2 true JP5149206B2 (ja) | 2013-02-20 |
Family
ID=42578248
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009003759A Expired - Fee Related JP5149206B2 (ja) | 2009-01-09 | 2009-01-09 | 回路装置、回路装置の製造方法および回路装置の評価方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP5149206B2 (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9673163B2 (en) | 2011-10-18 | 2017-06-06 | Rohm Co., Ltd. | Semiconductor device with flip chip structure and fabrication method of the semiconductor device |
JP6011074B2 (ja) | 2012-01-20 | 2016-10-19 | 富士通株式会社 | 電子装置の製造方法及び電子装置の製造装置 |
JP2013243100A (ja) * | 2012-05-23 | 2013-12-05 | Ushio Inc | ショートアーク型放電ランプ |
JP6347900B2 (ja) * | 2015-09-30 | 2018-06-27 | 日立オートモティブシステムズ株式会社 | 半導体センサ装置およびその製造方法 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2655496B2 (ja) * | 1994-11-21 | 1997-09-17 | 日本電気株式会社 | フェイスダウン接続用集積回路素子 |
JPH11195666A (ja) * | 1997-12-26 | 1999-07-21 | Murata Mfg Co Ltd | 半導体装置 |
JP2004172597A (ja) * | 2002-10-30 | 2004-06-17 | Matsushita Electric Ind Co Ltd | 半導体装置およびその製造方法 |
JP4817892B2 (ja) * | 2005-06-28 | 2011-11-16 | 富士通セミコンダクター株式会社 | 半導体装置 |
-
2009
- 2009-01-09 JP JP2009003759A patent/JP5149206B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2010161296A (ja) | 2010-07-22 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US11094664B2 (en) | Semiconductor device and method of manufacturing semiconductor device | |
TWI254398B (en) | Semiconductor device and its manufacturing method | |
US7629687B2 (en) | Semiconductor device and method for manufacturing the same | |
JP6033011B2 (ja) | 電力用半導体装置および電力用半導体装置の製造方法 | |
US8536047B2 (en) | Methods and systems for material bonding | |
JP2019106550A (ja) | 電極接続方法及び電極接続構造 | |
JP5779931B2 (ja) | 半導体装置の製造方法 | |
US8742584B2 (en) | Semiconductor device | |
JP5149206B2 (ja) | 回路装置、回路装置の製造方法および回路装置の評価方法 | |
US7015580B2 (en) | Roughened bonding pad and bonding wire surfaces for low pressure wire bonding | |
KR20080099139A (ko) | 반도체칩 및 그 제조 방법 | |
EP2158601A1 (en) | Under bump metallization structure having a seed layer for electroless nickel deposition | |
KR20180088323A (ko) | 금속 본드를 위한 임시적 인터페이스 그래디언트 본딩 | |
TWI599664B (zh) | 用於功率模組封裝之金屬帶材 | |
TWI534917B (zh) | 半導體裝置及其製造方法 | |
JPWO2011129256A1 (ja) | ボンディングワイヤ | |
TW201633481A (zh) | 用於接合應用的經塗佈銅(Cu)線 | |
WO2014024796A1 (ja) | 半導体装置およびその製造方法 | |
JP2010050163A (ja) | 電子素子の実装方法および該実装方法によって実装された電子部品 | |
JPH07169797A (ja) | ボンディング方法及びボンディング構造 | |
Zhang et al. | Critical temperatures in thermocompression gold stud bonding | |
JP2013018003A (ja) | 金属接合構造とその製造方法 | |
US7169627B2 (en) | Method for inspecting a connecting surface of a flip chip | |
US20130193569A1 (en) | Integrated Circuit Die And Method Of Fabricating | |
JP5195715B2 (ja) | 半導体装置の部品実装方法、及び半導体装置の実装部品 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20111215 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20121022 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20121113 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20121129 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5149206 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20151207 Year of fee payment: 3 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |