JP5127288B2 - 半導体装置の作製方法 - Google Patents

半導体装置の作製方法 Download PDF

Info

Publication number
JP5127288B2
JP5127288B2 JP2007114570A JP2007114570A JP5127288B2 JP 5127288 B2 JP5127288 B2 JP 5127288B2 JP 2007114570 A JP2007114570 A JP 2007114570A JP 2007114570 A JP2007114570 A JP 2007114570A JP 5127288 B2 JP5127288 B2 JP 5127288B2
Authority
JP
Japan
Prior art keywords
semiconductor layer
layer
semiconductor
region
opening
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2007114570A
Other languages
English (en)
Japanese (ja)
Other versions
JP2008270664A (ja
JP2008270664A5 (enExample
Inventor
智昭 森若
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP2007114570A priority Critical patent/JP5127288B2/ja
Publication of JP2008270664A publication Critical patent/JP2008270664A/ja
Publication of JP2008270664A5 publication Critical patent/JP2008270664A5/ja
Application granted granted Critical
Publication of JP5127288B2 publication Critical patent/JP5127288B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0312—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes
    • H10D30/0314—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes of lateral top-gate TFTs comprising only a single gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon

Landscapes

  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)
JP2007114570A 2007-04-24 2007-04-24 半導体装置の作製方法 Expired - Fee Related JP5127288B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007114570A JP5127288B2 (ja) 2007-04-24 2007-04-24 半導体装置の作製方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007114570A JP5127288B2 (ja) 2007-04-24 2007-04-24 半導体装置の作製方法

Publications (3)

Publication Number Publication Date
JP2008270664A JP2008270664A (ja) 2008-11-06
JP2008270664A5 JP2008270664A5 (enExample) 2010-05-20
JP5127288B2 true JP5127288B2 (ja) 2013-01-23

Family

ID=40049745

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007114570A Expired - Fee Related JP5127288B2 (ja) 2007-04-24 2007-04-24 半導体装置の作製方法

Country Status (1)

Country Link
JP (1) JP5127288B2 (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8603841B2 (en) * 2010-08-27 2013-12-10 Semiconductor Energy Laboratory Co., Ltd. Manufacturing methods of semiconductor device and light-emitting display device
KR101733196B1 (ko) * 2010-09-03 2017-05-25 삼성디스플레이 주식회사 박막 트랜지스터, 이의 제조 방법, 및 이를 구비한 표시 장치
CN109496359B (zh) * 2018-10-08 2020-04-28 长江存储科技有限责任公司 利用自然氧化层形成具有沟道结构的三维存储器件的方法

Also Published As

Publication number Publication date
JP2008270664A (ja) 2008-11-06

Similar Documents

Publication Publication Date Title
JP5415001B2 (ja) 半導体装置
JP5393057B2 (ja) 半導体装置の作製方法
US8581260B2 (en) Semiconductor device including a memory
JP5337380B2 (ja) 半導体装置及びその作製方法
US7692223B2 (en) Semiconductor device and method for manufacturing the same
JP5110888B2 (ja) 半導体装置の作製方法
US8252643B2 (en) Semiconductor device and manufacturing method thereof
JP5337347B2 (ja) 半導体装置、半導体装置の作製方法
JP5411456B2 (ja) 半導体装置
JP5127288B2 (ja) 半導体装置の作製方法
JP5337346B2 (ja) 半導体装置の作製方法
US7608892B2 (en) Semiconductor device and manufacturing method of the same
JP5674747B2 (ja) 半導体装置
JP5105915B2 (ja) 半導体装置及びその作製方法
JP2008277475A (ja) 半導体装置の作製方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100402

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20100402

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20121023

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20121025

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20121030

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20151109

Year of fee payment: 3

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees