JP4916680B2 - 半導体装置の作製方法、剥離方法 - Google Patents
半導体装置の作製方法、剥離方法 Download PDFInfo
- Publication number
- JP4916680B2 JP4916680B2 JP2005192520A JP2005192520A JP4916680B2 JP 4916680 B2 JP4916680 B2 JP 4916680B2 JP 2005192520 A JP2005192520 A JP 2005192520A JP 2005192520 A JP2005192520 A JP 2005192520A JP 4916680 B2 JP4916680 B2 JP 4916680B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- circuits
- substrate
- region
- thin film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/021—Manufacture or treatment of multiple TFTs
- H10D86/0214—Manufacture or treatment of multiple TFTs using temporary substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/80—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F71/00—Manufacture or treatment of devices covered by this subclass
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/94—Laser ablative material removal
Landscapes
- Thin Film Transistor (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005192520A JP4916680B2 (ja) | 2005-06-30 | 2005-06-30 | 半導体装置の作製方法、剥離方法 |
| US11/425,559 US7521383B2 (en) | 2005-06-30 | 2006-06-21 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005192520A JP4916680B2 (ja) | 2005-06-30 | 2005-06-30 | 半導体装置の作製方法、剥離方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2007012917A JP2007012917A (ja) | 2007-01-18 |
| JP2007012917A5 JP2007012917A5 (enExample) | 2008-05-29 |
| JP4916680B2 true JP4916680B2 (ja) | 2012-04-18 |
Family
ID=37590185
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2005192520A Expired - Fee Related JP4916680B2 (ja) | 2005-06-30 | 2005-06-30 | 半導体装置の作製方法、剥離方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US7521383B2 (enExample) |
| JP (1) | JP4916680B2 (enExample) |
Families Citing this family (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1455394B1 (en) * | 2001-07-24 | 2018-04-11 | Samsung Electronics Co., Ltd. | Transfer method |
| US8030132B2 (en) * | 2005-05-31 | 2011-10-04 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of semiconductor device including peeling step |
| US7727773B2 (en) * | 2006-10-31 | 2010-06-01 | Semiconductor Energy Laboratory Co., Ltd | Method of manufacturing an analytical sample and method of analyzing an analytical sample |
| US7897482B2 (en) * | 2007-05-31 | 2011-03-01 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
| US8731706B2 (en) | 2008-09-12 | 2014-05-20 | Hitachi High-Technologies Corporation | Vacuum processing apparatus |
| KR102309244B1 (ko) | 2013-02-20 | 2021-10-05 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 |
| TWI685026B (zh) | 2013-08-06 | 2020-02-11 | 日商半導體能源研究所股份有限公司 | 剝離方法 |
| TW201943069A (zh) | 2013-09-06 | 2019-11-01 | 日商半導體能源研究所股份有限公司 | 發光裝置以及發光裝置的製造方法 |
| US9981457B2 (en) * | 2013-09-18 | 2018-05-29 | Semiconductor Emergy Laboratory Co., Ltd. | Manufacturing apparatus of stack |
| JP6513929B2 (ja) * | 2013-11-06 | 2019-05-15 | 株式会社半導体エネルギー研究所 | 剥離方法 |
| KR102334815B1 (ko) | 2014-02-19 | 2021-12-02 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 발광 장치 및 박리 방법 |
| TWI679560B (zh) | 2014-03-13 | 2019-12-11 | 日商半導體能源研究所股份有限公司 | 觸控面板 |
| DE112015001780B4 (de) | 2014-04-11 | 2022-02-03 | Semiconductor Energy Laboratory Co., Ltd. | Lichtemittierende Vorrichtung |
| JP6822858B2 (ja) * | 2016-01-26 | 2021-01-27 | 株式会社半導体エネルギー研究所 | 剥離の起点の形成方法及び剥離方法 |
| CN109564851A (zh) | 2016-08-31 | 2019-04-02 | 株式会社半导体能源研究所 | 半导体装置的制造方法 |
| JP6981812B2 (ja) * | 2016-08-31 | 2021-12-17 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| KR102882107B1 (ko) * | 2016-10-07 | 2025-11-05 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 유리 기판의 세정 방법, 반도체 장치의 제작 방법, 및 유리 기판 |
| CN110520962B (zh) * | 2017-03-16 | 2023-11-21 | 株式会社半导体能源研究所 | 半导体装置的制造方法及半导体装置 |
| US12453275B2 (en) | 2021-05-07 | 2025-10-21 | Semiconductor Energy Laboratory Co., Ltd. | Display apparatus |
| WO2025198034A1 (ja) * | 2024-03-22 | 2025-09-25 | 日産化学株式会社 | 加工された半導体基板の製造方法 |
Family Cites Families (30)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5258236A (en) * | 1991-05-03 | 1993-11-02 | Ibm Corporation | Multi-layer thin film structure and parallel processing method for fabricating same |
| US5272104A (en) * | 1993-03-11 | 1993-12-21 | Harris Corporation | Bonded wafer process incorporating diamond insulator |
| JPH09318849A (ja) * | 1996-05-24 | 1997-12-12 | Fujitsu Ltd | 光伝送モジュールおよびその製造方法 |
| JP3809681B2 (ja) | 1996-08-27 | 2006-08-16 | セイコーエプソン株式会社 | 剥離方法 |
| CN1143394C (zh) | 1996-08-27 | 2004-03-24 | 精工爱普生株式会社 | 剥离方法、溥膜器件的转移方法和薄膜器件 |
| JP4619461B2 (ja) | 1996-08-27 | 2011-01-26 | セイコーエプソン株式会社 | 薄膜デバイスの転写方法、及びデバイスの製造方法 |
| JP4619462B2 (ja) | 1996-08-27 | 2011-01-26 | セイコーエプソン株式会社 | 薄膜素子の転写方法 |
| USRE38466E1 (en) | 1996-11-12 | 2004-03-16 | Seiko Epson Corporation | Manufacturing method of active matrix substrate, active matrix substrate and liquid crystal display device |
| US6127199A (en) | 1996-11-12 | 2000-10-03 | Seiko Epson Corporation | Manufacturing method of active matrix substrate, active matrix substrate and liquid crystal display device |
| JPH1126733A (ja) | 1997-07-03 | 1999-01-29 | Seiko Epson Corp | 薄膜デバイスの転写方法、薄膜デバイス、薄膜集積回路装置,アクティブマトリクス基板、液晶表示装置および電子機器 |
| JPH11243209A (ja) | 1998-02-25 | 1999-09-07 | Seiko Epson Corp | 薄膜デバイスの転写方法、薄膜デバイス、薄膜集積回路装置、アクティブマトリクス基板、液晶表示装置および電子機器 |
| JP3809733B2 (ja) | 1998-02-25 | 2006-08-16 | セイコーエプソン株式会社 | 薄膜トランジスタの剥離方法 |
| JP4126747B2 (ja) | 1998-02-27 | 2008-07-30 | セイコーエプソン株式会社 | 3次元デバイスの製造方法 |
| HU227114B1 (en) * | 1999-05-11 | 2010-07-28 | Egis Gyogyszergyar Nyilvanosan | (1r, 2s, 4r)-(-)-2-[n,n-(dimethylamino-ethoxy)]-2-phenyl-1,7,7-trimethyl-bicyclo[2.2.1]heptane of high purity and pharmaceutically acceptable acid addition salts thereof, process for preparation of them and medicaments containing the same |
| US6333202B1 (en) * | 1999-08-26 | 2001-12-25 | International Business Machines Corporation | Flip FERAM cell and method to form same |
| JP4478268B2 (ja) | 1999-12-28 | 2010-06-09 | セイコーエプソン株式会社 | 薄膜デバイスの製造方法 |
| US20020086137A1 (en) * | 2000-12-28 | 2002-07-04 | International Business Machines Corporation | Method of reducing wafer stress by laser ablation of streets |
| US8415208B2 (en) | 2001-07-16 | 2013-04-09 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and peeling off method and method of manufacturing semiconductor device |
| TW558743B (en) * | 2001-08-22 | 2003-10-21 | Semiconductor Energy Lab | Peeling method and method of manufacturing semiconductor device |
| EP1677346B1 (en) * | 2001-10-01 | 2011-12-14 | Electro Scientific Industries, Inc. | Machining substrates, particularly semiconductor wafers |
| TWI264121B (en) | 2001-11-30 | 2006-10-11 | Semiconductor Energy Lab | A display device, a method of manufacturing a semiconductor device, and a method of manufacturing a display device |
| KR101079757B1 (ko) | 2002-10-30 | 2011-11-04 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체장치 및 반도체장치의 제작방법 |
| JP4373085B2 (ja) | 2002-12-27 | 2009-11-25 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法、剥離方法及び転写方法 |
| JP4393859B2 (ja) * | 2002-12-27 | 2010-01-06 | 株式会社半導体エネルギー研究所 | 記録媒体の作製方法 |
| JP4151420B2 (ja) * | 2003-01-23 | 2008-09-17 | セイコーエプソン株式会社 | デバイスの製造方法 |
| US7508644B2 (en) * | 2004-06-30 | 2009-03-24 | Research In Motion Limited | Spark gap apparatus and method for electrostatic discharge protection |
| US7316512B2 (en) * | 2004-07-30 | 2008-01-08 | General Electric Company | Interconnect device |
| US7118989B2 (en) * | 2004-08-20 | 2006-10-10 | Intel Corporation | Method of forming vias on a wafer stack using laser ablation |
| WO2006123825A1 (en) | 2005-05-20 | 2006-11-23 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of semiconductor device |
| US8030132B2 (en) | 2005-05-31 | 2011-10-04 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of semiconductor device including peeling step |
-
2005
- 2005-06-30 JP JP2005192520A patent/JP4916680B2/ja not_active Expired - Fee Related
-
2006
- 2006-06-21 US US11/425,559 patent/US7521383B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2007012917A (ja) | 2007-01-18 |
| US20070004233A1 (en) | 2007-01-04 |
| US7521383B2 (en) | 2009-04-21 |
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