JP4867333B2 - Silicon carbide semiconductor device and method for manufacturing silicon carbide semiconductor device - Google Patents

Description

  The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly to a silicon carbide semiconductor device and a method for manufacturing a silicon carbide semiconductor device.

When a layer made of silicon carbide (SiC) is thermally oxidized, an insulating film made of silicon dioxide (SiO ₂ ) can be obtained. Therefore, conventionally, a high breakdown voltage insulated gate field effect transistor (MOSFET) in which a layer made of silicon dioxide is adapted to a gate insulating film has been manufactured.

  However, a large number of trap levels exist at the MOS interface of the silicon carbide semiconductor device formed by the conventional thermal oxidation method. As a result, the channel mobility (channel conductance) is decreased, and there is a problem that the loss at the time of on, that is, the on-resistance is increased.

  In order to deal with this problem, for example, in Non-Patent Document 1 below, after forming the gate insulating film, the wafer is annealed in a nitric oxide (NO) atmosphere to perform nitriding treatment of the MOS interface, thereby improving the quality of the MOS interface. An improved silicon carbide semiconductor device is described.

Non-Patent Document 2 discloses a silicon carbide semiconductor in which the quality of the MOS interface is improved by annealing at 1200 ° C. or higher in an N ₂ O atmosphere after forming a gate insulating film by heat treatment in an oxygen (O ₂ ) atmosphere. The device and a silicon carbide semiconductor device in which a gate insulating film is formed by heat treatment at 1200 ° C. or higher in an N ₂ O atmosphere to improve the quality of the MOS interface are described.

G.Y.Chung et al., "Improved Inversion Channel Mobility for 4H-SiC MOSFETs Following High Temperature Anneals in Nitric Oxide", Electron Device Letters, VOL. 22 (2001) No. 4, pp. 176-178 L.A. Lipkin et al., "N2O Processing Improves the 4H-SiC: SiO2 Interface," Materials Science Forum Vols 389-393 (2002) pp. 985-988

  By the way, when a silicon carbide semiconductor device is mass-produced by the method described in Non-Patent Document 1, annealing treatment in a nitrogen monoxide atmosphere is used as a routine process. However, nitric oxide is highly toxic. Therefore, it is essential to introduce incidental equipment such as an apparatus for treating nitric oxide, which increases the manufacturing cost.

  Further, the method described in Non-Patent Document 2 requires a high-temperature atmosphere of 1200 degrees or more. Accordingly, since a heat treatment apparatus having specifications that are excellent in temperature controllability at high temperatures and that can withstand repeated high-temperature heat treatment is required, the manufacturing cost increases as in the case of the treatment of Non-Patent Document 1. .

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a silicon carbide semiconductor device capable of reducing the manufacturing cost and a manufacturing method thereof.

A silicon carbide semiconductor device according to the present invention includes a silicon carbide substrate, a first nitrogen-containing silicon carbide layer formed on the silicon carbide substrate, and a nitrogen concentration formed on the first nitrogen-containing silicon carbide layer. 1. It includes nitrogen formed by thermally oxidizing a second nitrogen-containing silicon carbide layer that is higher than 1 nitrogen-containing silicon carbide layer and that is 5 × 10 ¹⁹ cm ⁻³ or more and 1 × 10 ²¹ cm ⁻³ or less. And a gate insulating film made of silicon dioxide .

  According to the silicon carbide semiconductor device of the present invention, a low-cost silicon carbide semiconductor device can be obtained.

Embodiment 1 FIG.
As an example of the silicon carbide semiconductor device and the manufacturing method thereof according to the first embodiment, an n-channel silicon carbide semiconductor device and a manufacturing method thereof will be described. The method for manufacturing the silicon carbide semiconductor device according to the first embodiment is characterized in that, in the future, a drift layer to be a gate oxide film is doped with high-concentration nitrogen in advance, and thermal oxidation is performed after the drift layer is formed. .

  First, FIG. 1 shows a cross-sectional structure of a silicon carbide semiconductor device. In the figure, 1 is an n-type (first conductivity type) substrate, 2 is a first drift layer made of n-type (first conductivity type) silicon carbide, and 3 is made of n-type (first conductivity type) silicon carbide. The second drift layer, 4 is a p-type (second conductivity type) base region, 5 is an n-type (first conductivity type) source region, 6 is a gate insulating film made of silicon dioxide, 7 is a gate electrode, A source electrode, 9 represents a drain electrode, respectively. In addition, although the 2nd drift layer 3 is not shown in figure in the figure, the reason is mentioned later.

  Next, a method for manufacturing the silicon carbide semiconductor device according to the first embodiment will be outlined based on FIGS. First, a first drift layer 2 and a second drift layer 3 made of n-type silicon carbide are formed on an n-type (first conductivity type) substrate 1 by an epitaxial crystal growth method (FIG. 2). As n-type substrate 1, for example, an n-type silicon carbide substrate is suitable.

Here, a method of forming the drift layer of the silicon carbide semiconductor device according to the present embodiment by the epitaxial crystal growth method of the silicon carbide semiconductor device according to the first embodiment will be described. The first drift layer 2 is formed by introducing hydrogen gas at a flow rate of 50 L / min, silane gas 9 sccm, propane gas 4.5 sccm, and nitrogen gas 1 sccm in a high-temperature atmosphere of 1500 degrees reduced to 250 mbar. Thereafter, the first drift layer 2 is formed by epitaxial growth for about 3.5 hours, and then the second drift layer 3 is formed by increasing the flow rate of nitrogen gas. The first drift layer 2 formed under the above conditions has a nitrogen concentration of about 1 × 10 ¹⁶ cm ⁻³ and a film thickness of about 12 μm.

At this time, the second drift layer 3 is doped with nitrogen at a high concentration, and the concentration is 5 × 10 ¹⁹ cm ⁻³ or more and 1 × 10 ²¹ cm ⁻³ or less which is higher than the first drift layer 2. Is preferred. The reason why this concentration is preferable is as follows. That is, when a gate insulating film made of silicon dioxide is formed by thermally oxidizing silicon carbide, the surface density of the generated Sic-SiO ₂ interface trap is about 10 ¹² cm ^-2 . Further, since the thickness of one layer of silicon dioxide is about 0.2 nm, the interface trap density at the MOS interface is 10 ¹² cm ⁻² ÷ 0.2 nm = 5 × 10 ¹⁹ cm ⁻³ . Therefore, a nitrogen concentration of at least 5 × 10 ¹⁹ cm ⁻³ is required to react with all the Sic—SiO ₂ interface traps.

On the other hand, the upper limit value is derived from the fact that the limit of the nitrogen concentration that can be doped into the second drift layer 3 is about 1 × 10 ²¹ cm ⁻³ .

  One or more drift layers may be formed on the second drift layer 3. One or more drift layers may be formed between the first drift layer 2 and the second drift layer 3. Further, the thickness of the drift layer including the second drift layer 3 and stacked above the second drift layer 3 is preferably 50 nm or less.

  After the epitaxial crystal growth, a pair of p-type (second conductivity type) base regions 4 are formed by implanting impurities into portions spaced apart by a predetermined interval on the second drift layer 3 using a resist as a mask. At this time, the p-type base region 4 must reach at least one of the drift layers under the second drift layer 3. The cross-sectional structure after removing the resist is shown in FIG. Examples of the p-type impurity include boron (B) and aluminum (Al).

  Further, impurities are ion-implanted into each of the p-type base regions 4 using a resist as a mask to form an n-type (first conductivity type) source region 5. At this time, the n-type source region 5 must reach at least one of the drift layers under the second drift layer 3. FIG. 4 shows a cross-sectional structure after removing the resist. Examples of the n-type impurity include phosphorus (P) and nitrogen (N).

  Then, after ion implantation of n-type and p-type impurities, if the wafer of FIG. 4 is annealed at a high temperature, the implanted ions are electrically activated.

  After this treatment, the second drift layer 3 doped with nitrogen at a high concentration is oxidized by a thermal oxidation method. By this thermal oxidation, a gate insulating film 6 made of nitrogen-containing silicon dioxide is formed on the entire surface of the wafer. At this time, the range for oxidizing the second drift layer 3 may be the entire wafer surface (FIG. 5) or a part (FIG. 6). That is, FIG. 6 shows a state where a part of the second drift layer 3 is oxidized and a part of the second drift layer 3 that is not oxidized remains. In FIG. 1, the second drift layer 3 was not present because the entire surface of the wafer was thermally oxidized as shown in FIG.

  By this thermal oxidation treatment, the thickness of the gate insulating film 6 including the second drift layer 3 and formed from the drift layer stacked higher than the second drift layer 3 is about twice that before the heat treatment. Further, by setting the nitrogen concentration doped in the second drift layer 3 as described above, the nitrogen content in the vicinity of the MOS interface of the gate insulating film 6 is 0.2% to be appropriate for reducing the trap level. 3%.

  Here, a temperature profile in the heat treatment apparatus in the thermal oxidation treatment for the purpose of forming the gate insulating film 6 is shown in FIG. An example of a heat treatment apparatus that performs this thermal oxidation treatment is a reaction furnace. In the following, description will be given by taking the case of using a reactor as an example.

First, the wafer after the formation of the base region 4 and the source region 5 shown in FIG. 4 is introduced into the reactor heated to about 700 ° C., and the reaction is performed in an argon (Ar) atmosphere or a nitrogen (N ₂ ) atmosphere. The temperature is raised until the temperature at which thermal oxidation is performed is reached.

Next, when the thermal oxidation temperature is reached, the reactor is switched from an argon atmosphere or a nitrogen atmosphere to an oxygen (O ₂ ) atmosphere containing water vapor or an atmosphere containing only oxygen, and this state is maintained for a predetermined time. Thermal oxidation treatment is performed. In the course of this thermal oxidation process, the silicon carbide layer on the wafer surface is oxidized to form a gate insulating film 6 made of silicon dioxide.

  Note that the thermal oxidation treatment may be performed in an oxygen-only atmosphere for a certain period after the start of the treatment, and the remaining period may be performed in an oxygen atmosphere containing water vapor, or vice versa. This thermal oxidation treatment is performed at a temperature of 950 ° C. or higher and 1150 ° C. or lower. In thermal oxidation processing at a temperature higher than 1150 ° C., a heat treatment apparatus having a special specification that has excellent temperature controllability at high temperature and can withstand repeated heat treatment at high temperature is indispensable. This is because the cost increases. On the other hand, thermal oxidation does not proceed at 950 degrees or less.

  Thereafter, at the end of the thermal oxidation process, the inside of the reaction furnace is switched again to an argon atmosphere or a nitrogen atmosphere, and after annealing for 10 minutes, the temperature is lowered to 700 degrees and the wafer is taken out of the reaction furnace. .

  Next, as shown in FIG. 8, a gate electrode 7 is formed and patterned on the gate insulating film 6. The gate electrode 7 is patterned in such a shape that the pair of base region 4 and source region 5 are located at both ends, and the first drift layer 2 exposed between the base regions 4 is located in the center.

  Further, as shown in FIG. 9, the gate insulating film 6 on each source region 4 is removed by lithography and etching techniques. After the removal, as shown in FIG. 10, a source electrode 8 is formed and patterned at a portion where the source region 4 is exposed on the surface. Finally, when the drain electrode 9 is formed on the back side of the substrate 1, the main part of the element structure as shown in FIG. 1 is completed.

  As described above, in the first embodiment, in order to form the gate insulating film 6, the second drift layer 3 doped with high-concentration nitrogen is thermally oxidized in an oxygen atmosphere. Thereby, the nitrogen content at the MOS interface becomes an appropriate value, and the trap level at the MOS interface is remarkably reduced. As a result, the quality of the MOS interface is improved, so that a silicon carbide semiconductor device with good gate characteristics can be obtained while reducing the manufacturing cost.

  Further, in the conventional manufacturing method in which the annealing process is performed in a nitrogen monoxide atmosphere or a nitrogen dioxide atmosphere after forming the gate insulating film, unevenness in the nitrogen concentration at the MOS interface occurs depending on the reaction furnace and annealing conditions used for the annealing process. As a result, the gate characteristics may vary among manufactured silicon carbide semiconductor devices.

  In contrast, in the manufacturing method according to the first embodiment, the second drift layer 3 is doped with high-concentration nitrogen in advance before the thermal oxidation treatment, and then the thermal oxidation treatment is performed. Therefore, there is no problem as in the prior art, and there is no variation in gate characteristics between silicon carbide semiconductor devices, and a silicon carbide semiconductor device having stable gate characteristics can be obtained.

Next, in order to confirm the gate characteristics of the silicon carbide semiconductor device manufactured by the manufacturing method according to the first embodiment, a comparison result is shown in FIG. In the figure, one is a silicon carbide semiconductor device manufactured by the manufacturing method according to the present embodiment, which forms a second drift layer 3 doped with 1 × 10 ²⁰ cm ⁻³ of nitrogen, and oxygen of 1100 degrees A silicon carbide semiconductor device that has been subjected to thermal oxidation treatment in an atmosphere. The other is a silicon carbide semiconductor device in which the second drift layer 3 is formed without doping nitrogen and subjected to thermal oxidation.

  As is apparent from the figure, the silicon carbide semiconductor device manufactured by the manufacturing method according to the first embodiment, that is, the second drift layer 3 doped with high-concentration nitrogen is formed, and the thermal oxidation treatment is performed. The silicon carbide semiconductor device has a larger drain current value and a steep slope than the silicon carbide semiconductor device not doped with nitrogen.

Channel mobility mu _{c h} determined from the linear region, the nitrogen in the silicon carbide semiconductor device not doped whereas was 2.8 cm ² / Vs, manufactured by the method according to the first embodiment The silicon carbide semiconductor device was improved by about 6 times to 17 cm ² / Vs. This is because the second drift layer 3 doped with nitrogen is formed, and the second drift layer 3 is thermally oxidized, so that the origin of the trap level at the MOS interface is nitrided and becomes electrically inactive. This is because the trap level at the MOS interface is reduced and the channel mobility is increased.

Furthermore, another comparative example is shown in FIG. As in the case of FIG. 11, in the drawing, one is a silicon carbide semiconductor device manufactured by the manufacturing method according to the present embodiment, and the second drift layer 3 doped with nitrogen of 2 × 10 ²⁰ cm ⁻³ is used. A silicon carbide semiconductor device formed and subjected to thermal oxidation treatment in an oxygen atmosphere of 1150 degrees. The other is a silicon carbide semiconductor device in which the second drift layer 3 is formed without doping nitrogen and subjected to thermal oxidation.

Channel mobility mu _{c h} determined from the linear region, the nitrogen in the silicon carbide semiconductor device not doped whereas was 2.8 cm ² / Vs, which is manufactured by the manufacturing method according to this embodiment In the silicon carbide semiconductor device, 20 cm ² / Vs, an improvement of about 7 times. This is because the nitridation originating from the trap level at the MOS interface is further advanced by doping the second drift layer 3 with more nitrogen than in the case of FIG. That is, as the nitrogen concentration contained in the second drift layer 3 is higher, the channel mobility is improved.

The channel mobility strongly depends on the presence or absence of nitrogen doped in the second drift layer 3 before the thermal oxidation treatment. That is, when the second drift layer 3 doped with nitrogen having a concentration of 5 × 10 ¹⁹ cm ⁻³ or more and 1 × 10 ²¹ cm ⁻³ or less was formed, good gate characteristics were obtained.

  The effect of the thermal oxidation treatment of the second drift layer 3 doped with nitrogen in an oxygen atmosphere depends on the thickness of the gate insulating film 6. That is, when the gate insulating film 6 is 2 nm or more and 100 nm or less, a sufficient effect of improving the gate characteristics is exhibited. However, when the film thickness is out of the above range, a sufficient effect cannot be obtained. This is because when the thickness of the gate insulating film 6 is 100 nm or more, the heat does not reach the MOS interface sufficiently, so that the trap level nitridation at the MOS interface does not proceed. In addition, when the film thickness is less than 2 nm, it is difficult to maintain a uniform film thickness of the gate insulating film 6, resulting in variations in gate characteristics for each element that cannot be ignored in practice.

  Even when the temperature of the thermal oxidation treatment is set to 1150 ° C. or less, the quality of the MOS interface can be improved by optimizing the treatment conditions. However, at a heat treatment temperature lower than 950 degrees, it is no longer possible to sufficiently improve the quality of the MOS interface. This is because the heat treatment temperature is too low to obtain an effect.

Embodiment 2. FIG.
As an example of the silicon carbide semiconductor device according to the second embodiment and the method for manufacturing the same, an n-channel silicon carbide semiconductor device and a method for manufacturing the same will be described as in the first embodiment. The second embodiment is characterized in that after the first drift layer 2, the base region 4 and the source region 5 are formed and annealed, a drift layer doped with nitrogen is formed and thermal oxidation is performed. . Hereinafter, description will be made with reference to FIGS.

  The procedures up to the formation of only the first drift layer 2 by the epitaxial crystal growth method, the formation of the base region 4 and the source region 5, and the annealing treatment at a high temperature by the heat treatment apparatus are the same as in the first embodiment.

Thereafter, as shown in FIG. 14, the second drift layer 10 doped with nitrogen is formed by an epitaxial crystal growth method. The second drift layer 10 need not be a single layer as long as it is doped with nitrogen, and may be composed of two or more layers having different nitrogen concentrations. However, the nitrogen concentration of the second drift layer 10 as the lowermost layer is preferably 5 × 10 ¹⁹ cm ⁻³ or more and 1 × 10 ²¹ cm ⁻³ or less, as in the first embodiment. The layer thickness of the second drift layer 10 is 1 nm or more and 50 nm or less.

  As shown in FIG. 16, the n-type channel epi layer 11 may be formed before the second drift layer 10 is formed.

  After the formation of the second drift layer 10, the wafer is put into a reaction furnace, and the second drift layer 10 is oxidized by a thermal oxidation method. As a result, as shown in FIG. 15, a gate insulating film 6 made of nitrogen-containing silicon dioxide is formed on the entire surface of the wafer. The film thickness of the gate insulating film 6 obtained by thermally oxidizing the second drift layer 10 is about twice that of the second drift layer 10. Further, by setting the concentration of nitrogen to be doped in the second drift layer 10 as described above, the nitrogen content in the vicinity of the MOS interface of the gate insulating film 6 is appropriate for reducing the trap level. 3%.

  The steps after the thermal oxidation treatment are the same as in the first embodiment, and after these steps, the silicon carbide semiconductor device having the structure shown in FIG. 1 can be obtained.

As a result, after forming n-type channel epitaxial layer 11 as shown in FIG. 16, second drift layer 10 doped with nitrogen is formed, and a silicon carbide semiconductor is subjected to thermal oxidation treatment in an oxygen atmosphere of 1100 degrees The device achieved very good gate characteristics with a channel mobility of 35 cm ² / Vs.

  This is because the trap level at the MOS interface can be remarkably reduced by thermally oxidizing the second drift layer 10 doped with high-concentration nitrogen, and the n region is used in the channel portion. This is because the influence of electrons passing through the channel from the trap level existing at the MOS interface is reduced.

  It is noted that the manufacturing method described in the second embodiment can be applied to a silicon carbide semiconductor device having a structure in which an insulating film is formed on a silicon carbide layer. When the manufacturing method described in the second embodiment is used when manufacturing such a silicon carbide semiconductor device, the influence of electrons passing through the channel from the trap level existing at the MOS interface is reduced, and the gate characteristics are reduced. Is improved.

1 is a cross sectional view of a silicon carbide semiconductor device manufactured by the method for manufacturing a silicon carbide semiconductor device according to the first embodiment. FIG. 4 is a cross sectional view of the silicon carbide semiconductor device for illustrating the method for manufacturing the silicon carbide semiconductor device according to the first embodiment. FIG. 4 is a cross sectional view of the silicon carbide semiconductor device for illustrating the method for manufacturing the silicon carbide semiconductor device according to the first embodiment. FIG. 4 is a cross sectional view of the silicon carbide semiconductor device for illustrating the method for manufacturing the silicon carbide semiconductor device according to the first embodiment. FIG. 4 is a cross sectional view of the silicon carbide semiconductor device for illustrating the method for manufacturing the silicon carbide semiconductor device according to the first embodiment. FIG. 4 is a cross sectional view of the silicon carbide semiconductor device for illustrating the method for manufacturing the silicon carbide semiconductor device according to the first embodiment. It is a figure which shows the temperature profile of the thermal oxidation process for demonstrating the manufacturing method of the silicon carbide semiconductor device which concerns on Embodiment 1. FIG. FIG. 4 is a cross sectional view of the silicon carbide semiconductor device for illustrating the method for manufacturing the silicon carbide semiconductor device according to the first embodiment. FIG. 4 is a cross sectional view of the silicon carbide semiconductor device for illustrating the method for manufacturing the silicon carbide semiconductor device according to the first embodiment. FIG. 4 is a cross sectional view of the silicon carbide semiconductor device for illustrating the method for manufacturing the silicon carbide semiconductor device according to the first embodiment. It is a figure which shows the gate characteristic of the silicon carbide semiconductor device which concerns on Embodiment 1. FIG. It is a figure which shows the gate characteristic of the silicon carbide semiconductor device which concerns on Embodiment 1. FIG. FIG. 7 is a cross sectional view of a silicon carbide semiconductor device for illustrating the method for manufacturing the silicon carbide semiconductor device according to the second embodiment. FIG. 7 is a cross sectional view of a silicon carbide semiconductor device for illustrating the method for manufacturing the silicon carbide semiconductor device according to the second embodiment. FIG. 7 is a cross sectional view of a silicon carbide semiconductor device for illustrating the method for manufacturing the silicon carbide semiconductor device according to the second embodiment. FIG. 7 is a cross sectional view of a silicon carbide semiconductor device for illustrating the method for manufacturing the silicon carbide semiconductor device according to the second embodiment.

Explanation of symbols

  1 substrate, 2 first drift layer, 3 second drift layer, 4 base region, 5 source region, 6 gate insulating film, 7 gate electrode, 8 source electrode, 9 drain electrode, 10 second drift layer, 11 channel epi layer .

Claims (8)

A silicon carbide substrate;
A first nitrogen-containing silicon carbide layer formed on the silicon carbide substrate;
The nitrogen concentration formed on the first nitrogen-containing silicon carbide layer is higher than that of the first nitrogen-containing silicon carbide layer, and 5 × 10 ¹⁹ cm ^-3 1 × 10 ²¹ cm ^-3 A gate insulating film made of silicon dioxide containing nitrogen formed by thermally oxidizing the second nitrogen-containing silicon carbide layer, which is:
A silicon carbide semiconductor device comprising: 2. The silicon carbide semiconductor device according to claim 1, comprising the gate insulating film formed by thermally oxidizing all of the second nitrogen-containing silicon carbide layer on the first nitrogen-containing silicon carbide layer. 2. The silicon carbide semiconductor device according to claim 1, wherein the second nitrogen-containing silicon carbide layer that is not thermally oxidized is provided between the first nitrogen-containing silicon carbide layer and the gate insulating film. 4. The gate insulating film according to claim 1, wherein the gate insulating film includes an oxide film formed by thermally oxidizing one or more drift layers formed on the second nitrogen-containing silicon carbide layer. The silicon carbide semiconductor device according to item. The silicon carbide semiconductor device according to claim 1, wherein the gate insulating film has a thickness of 2 nm or more and 100 nm or less. The silicon carbide semiconductor device according to claim 1, wherein a film thickness of the second nitrogen-containing silicon carbide layer is 1 nm or more and 50 nm or less. Forming a first nitrogen-containing silicon carbide layer on the silicon carbide substrate;
The nitrogen concentration on the first nitrogen-containing silicon carbide layer is higher than that of the first nitrogen-containing silicon carbide layer, and 5 × 10 5 ¹⁹ cm ^-3 1 × 10 ²¹ cm ^-3 Forming the following second nitrogen-containing silicon carbide layer;
And a step of thermally oxidizing at least part of the second nitrogen-containing silicon carbide layer to form a gate insulating film. The method for manufacturing a silicon carbide semiconductor device according to claim 7, wherein the thermal oxidation treatment temperature is 950 ° C. or higher and 1150 ° C. or lower.

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