JP5197474B2 - Method for manufacturing silicon carbide semiconductor device - Google Patents

Description

  The present invention relates to a method for manufacturing a silicon carbide semiconductor device, and more particularly to a method for manufacturing a silicon carbide semiconductor device that reduces the interface state density at the silicon dioxide / silicon carbide interface.

Similar to silicon, silicon carbide (SiC) can form a silicon dioxide (SiO ₂ ) film by thermal oxidation. Silicon carbide has excellent physical properties and enables the realization of a power device with high breakdown voltage and low loss. However, there are many interface states close to the conduction band at the silicon carbide / silicon dioxide interface. Due to the interface state close to the conduction band, the channel mobility of a MOSFET (MOS field effect transistor) becomes extremely smaller than the electron mobility in the bulk, and the on-resistance value becomes higher than an ideal value.

Therefore, in order to inactivate the interface states, heat treatment in a nitrogen oxide gas atmosphere such as nitric oxide (NO) or dinitrogen monoxide (N ₂ O) or in an ammonia (NH ₃ ) gas atmosphere is performed. Of these, oxynitriding with nitrogen monoxide gas is effective.

  In this heat treatment method in a nitrogen monoxide gas atmosphere, after a silicon dioxide film is formed on a silicon carbide substrate, the generated carbon clusters are electrically inactivated by nitrogen atoms contained in the nitrogen monoxide gas. It diffuses out into the atmosphere.

However, nitric oxide gas is easily decomposed as the temperature rises, and oxygen generated by the reaction of 2NO → N ₂ + O ₂ may oxidize silicon carbide to newly generate an interface state. Further, it is conceivable that the interface defect is activated again when oxygen is combined with nitrogen contributing to the inactivation of the interface defect and diffuses out of the oxide film. In other words, during the oxynitriding process, it is considered that oxygen simultaneously prevents nitriding with nitrogen monoxide gas and reduces nitriding efficiency.

  In order to perform an efficient oxynitriding treatment, it is preferable to suppress decomposition of nitric oxide gas and to increase the ratio of nitric oxide to oxygen as much as possible. As means for increasing this ratio, Patent Document 1 discloses a method of performing heat treatment in a mixed gas atmosphere of an inert gas and nitric oxide gas. In this method, the amount of oxygen contained in the gas is reduced and the progress of oxidation by oxygen is reduced as compared with the case where the nitrogen monoxide gas is 100%.

JP 2005-109396 A

  As described above, in the conventional method for manufacturing a silicon carbide semiconductor device, it has been difficult to realize a significant reduction in interface states and formation of an interface with excellent reliability.

  The present invention has been made to solve the above-described problems. In a silicon carbide semiconductor device having a silicon dioxide layer, a silicon carbide substrate and silicon dioxide are produced using a practical process with excellent mass productivity. An object of the present invention is to provide a silicon carbide semiconductor device capable of greatly reducing the interface state between the film and having excellent device reliability and electrical characteristics.

A method for manufacturing a silicon carbide semiconductor device according to claim 1 of the present invention is a method for manufacturing a silicon carbide semiconductor device including a silicon carbide layer, wherein the step of forming a silicon dioxide film in contact with the silicon carbide layer (a And (b) forming an antioxidant insulating film having a higher energy required for oxygen diffusion in the film than in the silicon dioxide film, and forming the antioxidant insulating film on the silicon dioxide film. A step (c) of nitriding the interface between the silicon dioxide film and the silicon carbide layer by heat treatment in an atmosphere containing a nitrogen oxide gas; and the antioxidant insulating film after the step (c). In the step (b) , the antioxidant insulating film is selected from silicon oxynitride, silicon nitride, aluminum oxide, chromium oxide, titanium oxide, zirconium oxide, and tantalum oxide. Either It is constructed at the edge thereof.

According to the method for manufacturing a silicon carbide semiconductor device according to claim 1 of the present invention, an antioxidant insulating film having a higher energy required for diffusion of oxygen in the film than on the silicon dioxide film is formed on the silicon dioxide film. Since it is formed and heat-treated in an atmosphere containing nitrogen oxide gas, new oxidation during nitriding is suppressed and interface state density is further reduced compared to nitriding without an anti-oxidation insulating film can do. Further, since the step (d) for removing the anti-oxidation insulating film is provided after the step (c), the threshold voltage of the MOSFET and the gate withstand voltage due to the presence of the anti-oxidation insulating film on the silicon dioxide film are affected. Can be prevented.

It is sectional drawing which shows the structure of MOSFET formed with the manufacturing method of the silicon carbide semiconductor device of Embodiment 1 which concerns on this invention. It is sectional drawing explaining the manufacturing method of the silicon carbide semiconductor device of Embodiment 1 which concerns on this invention. It is sectional drawing explaining the manufacturing method of the silicon carbide semiconductor device of Embodiment 1 which concerns on this invention. It is sectional drawing explaining the manufacturing method of the silicon carbide semiconductor device of Embodiment 1 which concerns on this invention. It is sectional drawing explaining the manufacturing method of the silicon carbide semiconductor device of Embodiment 1 which concerns on this invention. It is sectional drawing explaining the manufacturing method of the silicon carbide semiconductor device of Embodiment 1 which concerns on this invention. It is sectional drawing explaining the manufacturing method of the silicon carbide semiconductor device of Embodiment 1 which concerns on this invention. It is a figure explaining the energy required for the diffusion of oxygen in a silicon oxynitride film and a silicon dioxide laminated film. It is sectional drawing explaining the manufacturing method of the silicon carbide semiconductor device of Embodiment 1 which concerns on this invention. It is sectional drawing explaining the manufacturing method of the silicon carbide semiconductor device of Embodiment 1 which concerns on this invention. It is sectional drawing explaining the manufacturing method of the silicon carbide semiconductor device of Embodiment 1 which concerns on this invention. It is sectional drawing explaining the manufacturing method of the silicon carbide semiconductor device of Embodiment 1 which concerns on this invention. It is sectional drawing explaining the manufacturing method of the silicon carbide semiconductor device of Embodiment 1 which concerns on this invention. It is sectional drawing explaining the manufacturing method of the silicon carbide semiconductor device of Embodiment 2 which concerns on this invention. It is sectional drawing explaining the manufacturing method of the silicon carbide semiconductor device of Embodiment 2 which concerns on this invention. It is sectional drawing explaining the manufacturing method of the silicon carbide semiconductor device of Embodiment 2 which concerns on this invention. It is sectional drawing explaining the manufacturing method of the silicon carbide semiconductor device of Embodiment 2 which concerns on this invention. It is sectional drawing explaining the manufacturing method of the silicon carbide semiconductor device of Embodiment 2 which concerns on this invention. It is sectional drawing explaining the manufacturing method of the silicon carbide semiconductor device of Embodiment 2 which concerns on this invention. It is sectional drawing explaining the manufacturing method of the silicon carbide semiconductor device of Embodiment 2 which concerns on this invention.

<Embodiment 1>
FIG. 1 is a diagram showing a cross-sectional structure of a MOSFET (MOS field effect transistor) 100 manufactured by the method for manufacturing a silicon carbide semiconductor device according to the first embodiment of the present invention.

  The term “MOS” has been used for a metal / oxide / semiconductor laminated structure in the past, and is an acronym for Metal-Oxide-Semiconductor. However, in particular, in a field effect transistor having a MOS structure (hereinafter, simply referred to as “MOS transistor”), materials for a gate insulating film and a gate electrode have been improved from the viewpoint of recent integration and improvement of a manufacturing process.

  For example, in a MOS transistor, polycrystalline silicon has been adopted instead of metal as a material of a gate electrode mainly from the viewpoint of forming a source / drain in a self-aligned manner. From the viewpoint of improving electrical characteristics, a material having a high dielectric constant is adopted as a material for the gate insulating film, but the material is not necessarily limited to an oxide.

  Therefore, the term “MOS” is not necessarily limited to the metal / oxide / semiconductor stacked structure, and is not presumed in this specification. That is, in view of the common general knowledge, “MOS” is not only an abbreviation derived from the word source, but also has a meaning including widely a laminated structure of a conductor / insulator / semiconductor.

  As shown in FIG. 1, MOSFET 100 includes a drift layer 2 (silicon carbide layer) composed of a first conductivity type silicon carbide epitaxial layer formed on a main surface of a first conductivity type silicon carbide substrate 1, and this Two base regions 3a of the second conductivity type formed in the upper layer portion of the drift layer 2 at a predetermined depth and spaced from each other, and in the respective surfaces of the two base regions 3a, than the base region 3a A shallow first-conductivity-type source region 4a, a gate oxide film 5 formed so as to straddle between the two source regions 4a, and in contact with the two source regions 4a, the base region 3a, and the drift layer 2; And an antioxidant insulating film 6 formed on the film 5. Here, silicon carbide substrate 1, drift layer 2, base region 3 a and source region 4 a are referred to as silicon carbide substrate 10.

  Further, the source electrode 8a is formed on the two source regions 4a, the gate electrode 7 is formed on the antioxidant insulating film 6, and the drift layer 2 of the silicon carbide substrate 1 is formed. A drain electrode 9 is formed on the main surface opposite to the main surface. Here, the gate electrode 7 covers the upper side of the two base regions 3a and the drift layer 2 on the antioxidant insulating film 6 and extends to the upper side of the respective edge portions of the two source regions 4a. Is formed.

  In the MOSFET 100 having such a configuration, when a predetermined voltage is applied to the gate electrode 7, an inversion channel layer is formed in the surface of the base region 3a immediately below the gate electrode 7, and the two source regions 4a and the drift are formed. A path through which charges flow is formed between the layer 2.

  When MOSFET 100 is an n-channel type, majority carriers are electrons, and electrons flowing from source region 4a to drift layer 2 are subjected to the action of an electric field formed by a voltage applied to drain electrode 9, and drift layer 2 and The drain electrode 9 is reached through the silicon carbide substrate 1. Therefore, by applying a voltage to the gate electrode 7 to form the inversion channel layer, a current flows from the drain electrode 9 to the source electrode 8a.

  On the other hand, when MOSFET 100 is a p-channel type, when majority carriers are holes, holes injected from drain electrode 9 reach base region 3a via drift layer 2, and then gate electrode 7 A predetermined voltage is applied to the source region 4a according to the potential of the source electrode 8a through the inversion channel layer formed in the surface of the base region 3a. As a result, a current flows from the drain electrode 9 to the source electrode 8a.

  Next, a method for manufacturing MOSFET 100 will be described with reference to FIGS.

  First, in the step shown in FIG. 2, a first conductivity type silicon carbide epitaxial layer is formed on a first conductivity type silicon carbide substrate 1 by epitaxial crystal growth using a chemical vapor deposition (CVD) method. The drift layer 2 is formed.

  As the plane orientation of silicon carbide substrate 1, (0001) plane, (000-1) plane, (11-20) plane, or the like can be used. As the polytype of silicon carbide substrate 1, any of 4H, 6H, and 3C can be used.

The thickness of the drift layer 2 may be about 5 to 50 μm, and the impurity concentration may be about 1 × 10 ¹⁵ to 1 × 10 ¹⁸ cm ⁻³ .

  By forming the drift layer 2 under the above conditions, a vertical high voltage MOSFET having a withstand voltage of several hundred V to 3 kV or more can be realized.

  Next, in the step shown in FIG. 3, a mask RM1 having an opening is formed on the drift layer 2 so as to expose a region that will later become the base region 3a by using a photoengraving technique. This mask RM1 is composed of a resist material, silicon dioxide and silicon nitride alone or in combination, and is used as an impurity implantation blocking mask.

  After the formation of the mask RM1, ions of a second conductivity type are ion-implanted from above the mask RM1, thereby forming a pair of base regions 3a.

  Here, when the MOSFET 100 is an n-channel type, boron (B) or aluminum (Al) can be used as the second conductivity type impurity introduced into the base region 3a, and the p-channel type is used. Can use phosphorus (P) or nitrogen (N) as the second conductivity type impurity.

  The depth of the base region 3a is required not to exceed the thickness of the drift layer 2, and the depth is, for example, 0.5 to 3 μm.

The impurity concentration of the second conductivity type in the base region 3a is set to a concentration exceeding the impurity concentration of the first conductivity type in the drift layer 2, for example, 1 × 10 ¹⁷ to 1 × 10 ¹⁹ cm ⁻³ .

  Next, after removing the mask RM1, in the step shown in FIG. 4, a mask RM2 having an opening is formed using a photoengraving technique so that a partial region of the base region 3a that will later become the source region 4a is exposed. To do. This mask RM2 is composed of a resist material, silicon dioxide and silicon nitride alone or in combination, and is used as an impurity implantation blocking mask.

  After the formation of mask RM2, impurities of the first conductivity type are ion-implanted from above mask RM2 to form source region 4a in the respective surfaces of two base regions 3a to obtain silicon carbide substrate 10.

  Here, when the MOSFET 100 is an n-channel type, phosphorus (P), nitrogen (N), or the like can be used as the first conductivity type impurity introduced into the source region 4a. In this case, boron (B), aluminum (Al), or the like can be used.

The depth of the source region 4a is set to be shallower than the depth of the base region 3a, and the impurity concentration of the first conductivity type of the source region 4a may be, for example, about 1 × 10 ¹⁸ to 1 × 10 ²¹ cm ^−3. .

  Next, after removing the mask RM2, the silicon substrate 10 is subjected to heat treatment under a high temperature condition of, for example, 1300 to 1900 ° C., for example, for about 30 seconds to 1 hour by using a heat treatment apparatus, thereby performing ion implantation. The activated impurities are electrically activated.

Next, in the step shown in FIG. 5, the surface of the silicon carbide substrate 10 is thermally oxidized by heating the silicon carbide substrate 10 in, for example, a water vapor atmosphere containing water (H ₂ O). Thereby, a silicon dioxide film 51 having an average thickness of about 40 nm is formed on the surface of silicon carbide substrate 10. The oxidation temperature during the thermal oxidation is 1000 ° C. or higher, preferably 1100 ° C. or higher and 1300 ° C. or lower. Note that the silicon dioxide film 51 may be formed by thermal oxidation in the air or in an oxygen gas atmosphere. By adopting these methods, the gate oxide film 5 having an excellent breakdown voltage can be obtained.

  Further, the silicon dioxide film 51 may be deposited using a CVD method. By adopting this method, the amount of carbon at the silicon carbide / silicon dioxide interface can be reduced.

After the formation of the silicon dioxide film 51, in the step shown in FIG. 6, the silicon carbide substrate 10 is introduced into a chemical vapor deposition furnace (CVD furnace), and silicon oxynitride (Si) is formed on the silicon dioxide film 51 by the CVD method. _x ON _y ) film 61 is formed.

The thickness of the silicon oxynitride film 61 is preferably sufficiently thick from the viewpoint of preventing oxidation. However, nitrogen monoxide does not reach the silicon dioxide film 51, and the threshold voltage of the MOSFET 100 is the thickness of the silicon oxynitride film 61 . In consideration of being affected by the thickness, the thickness is preferably 1 to 50 nm.

For the material gas used for forming the silicon oxynitride film 61 by the CVD method, for example, silane, dichlorosilane, silicon tetrachloride, or the like can be used as a silicon source. Further, as the nitrogen source, for example, nitrogen (N, N ₂ ) or ammonia can be used, and the material gas can be decomposed by a method such as thermal excitation, plasma excitation, or photoexcitation.

Further, instead of forming the silicon oxynitride film 61, silicon nitride (SiN), aluminum oxide (Al ₂ O ₃ ), chromium oxide (Cr ₂ O ₃ ), titanium oxide (TiO ₂ ), in which oxygen is less diffused than silicon dioxide. The insulating film may be formed of any one of zirconium oxide (ZrO ₂ ) and tantalum oxide (Ta ₂ O ₅ ).

  After the formation of the silicon oxynitride film 61, the temperature in the CVD furnace is lowered. After the temperature is lowered, the silicon carbide substrate 10 is taken out from the CVD furnace, and the silicon carbide substrate 10 on which the silicon oxynitride film 61 is deposited is introduced into the nitriding treatment reactor. Then, the temperature of the nitriding reaction furnace is raised, and when the inside of the furnace reaches a predetermined processing temperature, the inside of the furnace is replaced with a nitrogen monoxide gas or dinitrogen monoxide gas atmosphere. The nitriding treatment shown in FIG. 7 is performed by maintaining the processing temperature for a predetermined time (10 minutes to 10 hours depending on conditions).

  As a gas for nitriding treatment in the nitriding reactor, nitrogen monoxide gas or dinitrogen monoxide gas diluted with an inert gas such as nitrogen, argon, helium or krypton is used in addition to the above-described gas. Alternatively, a mixture of nitrogen monoxide gas and nitrous oxide gas may be used. By using these gases, nitriding can be efficiently advanced.

  The nitriding temperature is desirably 900 ° C. to 1450 ° C. This is because, at a low temperature of 900 ° C. or lower, the nitriding rate is very slow, and the inactivation of interface states by nitrogen atoms hardly proceeds. Further, under high temperature conditions of 1450 ° C. or higher, thermal oxidation by oxygen generated by decomposition in nitrogen monoxide or dinitrogen monoxide proceeds, and a new interface state increases.

  By this nitriding treatment, the interface state at the interface between silicon dioxide and silicon carbide can be reduced. This effect will be further described with reference to FIG. 8 showing details of the stacked portion “A” of the drift layer 2, the silicon dioxide film 51 and the silicon oxynitride film 61 in FIG. 7.

  As shown in FIG. 8, a silicon carbide / silicon dioxide interface SF is formed between drift layer 2 and silicon dioxide film 51.

  Here, in the silicon dioxide film 51, the activation energy required for oxygen diffusion is 1.24 eV, and the activation energy (Ea) required for nitridation for inactivating the interface state is 2.3 eV. is there.

  By obtaining this activation energy from thermal energy, oxygen can sufficiently diffuse through the silicon dioxide film 51, and new oxidation proceeds at the silicon dioxide / silicon carbide interface SF. On the other hand, the diffusion rate of oxygen is kept low in the silicon oxynitride film 61, and the activation energy required for the diffusion is 3.67 eV.

Thus, since the activation energy required for oxygen diffusion is large in the silicon oxynitride film 61, even if the activation energy (2.3 eV) necessary for nitriding the interface is ensured, the silicon dioxide / silicon carbide interface SF. Oxidation can be suppressed. That is, for example, when nitrogen monoxide gas decomposes into nitrogen (N ₂ ) and oxygen (O ₂ ) at a high temperature, oxygen easily diffuses in the silicon dioxide film 51 if the silicon oxynitride film 61 is not present. The oxygen generated by the decomposition reaches the drift layer 2 and oxidizes silicon carbide to newly generate an interface state. However, if the silicon dioxide film 51 is covered with the silicon oxynitride film 61, the interface is nitrided. Even when necessary activation energy is applied to nitrogen, oxygen cannot sufficiently diffuse in the silicon oxynitride film 61 with the energy. Therefore, oxygen generated by decomposition is prevented from passing through the silicon oxynitride film 61 and reaching the drift layer 2, so that oxidation at the silicon dioxide / silicon carbide interface SF can be suppressed.

  In addition, the activation energy required for diffusion of nitric oxide in the silicon oxynitride film 61 is 2.54 eV, which is almost the same as the activation energy (2.3 eV) required for nitriding the interface. Therefore, even when the silicon oxynitride film 61 is formed on the silicon dioxide film 51, the silicon oxynitride film 61 does not prevent the diffusion of nitrogen monoxide, and only the diffusion of oxygen is prevented. The nitriding efficiency at the silicon carbide interface SF can be improved. As the nitridation of the silicon dioxide / silicon carbide interface SF proceeds, the interface states are deactivated, the interface state density can be reduced, and the channel mobility can be increased.

The insulating film that suppresses oxygen diffusion during the nitriding treatment may be an insulating film that suppresses oxygen diffusion in the film as compared with the silicon dioxide film. For example, aluminum oxide (O _2: Ea = ˜ 6.5 eV), titanium oxide (O _2: Ea = ˜2.47 eV), zirconium oxide (O _2: Ea = 2.29 eV) can be used. Similar effects are expected for silicon nitride, chromium oxide, and tantalum oxide. By using these, nitridation of the silicon dioxide / silicon carbide interface SF proceeds, the interface state density can be reduced, and the channel mobility can be increased.

  After the nitriding treatment shown in FIG. 7, the atmosphere in the nitriding reaction furnace is switched to an inert gas atmosphere, and the temperature of the nitriding treatment is maintained for a predetermined time to completely switch the furnace atmosphere to an inert gas. . Thereafter, the temperature is lowered to a temperature at which silicon carbide substrate 10 can be taken out, and silicon carbide substrate 10 is taken out of the furnace. Thereby, the nitriding treatment step is completed.

  In the above description, an example is shown in which the thermal oxidation process of silicon carbide substrate 10, the chemical vapor deposition process of silicon oxynitride film 61, and the nitriding process are performed using separate apparatuses. However, the chemical vapor deposition process and the nitriding treatment may be performed continuously in the same apparatus. In this case, the temperature raising / lowering time associated with the movement of silicon carbide substrate 10 between devices can be reduced, the process time can be further shortened, and contamination of silicon carbide substrate 10 associated with the movement between devices can also be reduced.

  Next, in the step shown in FIG. 9, a gate electrode film 71 constituting a gate electrode is formed on the silicon oxynitride film 61, and then a mask for patterning the gate electrode on the gate electrode film 71 is formed. RM3 is formed using photoengraving techniques. This mask RM3 is patterned in accordance with the planar shape of the gate electrode, and as a cross-sectional shape, it covers the top of the two base regions 3a and the drift layer 2 and is located above the respective edge portions of the two source regions 4a. It is patterned to extend to

  The material of the gate electrode film 71 may be n-type or p-type polycrystalline silicon (polysilicon), n-type or p-type polycrystalline silicon carbide, and aluminum. Further, a low-resistance refractory metal such as titanium, molybdenum, tantalum, niobium, or tungsten may be used, and a nitride of a low-resistance refractory metal may be used.

  Next, in the step shown in FIG. 10, the gate electrode 7 is formed by removing unnecessary portions of the gate electrode film 71 by etching using the mask RM3 as an etching mask. This etching method is appropriately selected according to the material of the gate electrode film 71, but an etching method that can obtain an etching selection ratio with the silicon oxynitride film 61 as a base is used.

  Note that the gate electrode 7 is desirably formed so as to overlap with the pair of source regions 4a in a range of 10 nm to 5 μm, for example. This suppresses the influence of the fringe effect at the end of the gate electrode 7 (particularly in the gate length direction), uniformly applies a voltage to the surface of the base region 3a, and ensures that the inverted channel layer is formed within the surface of the base region 3a Can be formed.

  After patterning the gate electrode 7, in the step shown in FIG. 11, the mask RM 4 for patterning the silicon dioxide film 51 and the silicon oxynitride film 61 is photographed so as to completely cover the silicon oxynitride film 61. It is formed using plate making technology.

  The mask RM4 is formed to be longer than the length of the gate electrode 7 in the gate length direction, whereby the gate oxide film 5 and the antioxidant insulating film 6 formed in the next step have a length in the gate length direction. It is formed longer than 7.

  Then, unnecessary portions of the silicon oxynitride film 61 and the silicon dioxide film 51 are removed by wet etching or dry etching using the mask RM3 as an etching mask, so that the gate oxide film 5 is prevented from being oxidized as shown in FIG. A stacked body covered with the insulating film 6 and having the gate electrode 7 stacked on the antioxidant insulating film 6 is formed, and the surface of the source region 4a is exposed outside the two side surfaces in the gate length direction of the stacked body. The obtained configuration is obtained.

  As shown in FIG. 12, the gate oxide film 5 and the anti-oxidation insulating film 6 are formed longer in the gate length direction than the gate electrode 7, and the source electrode 8 a and the gate electrode 7 formed in the next process are formed. The gap can be reliably electrically separated.

  Next, in the step shown in FIG. 13, a mask RM5 is formed by photolithography so as to cover the antioxidant insulating film 6 and the gate electrode. The mask RM5 is patterned in accordance with the planar shape of the antioxidant insulating film 6, and is patterned so as not to cover the side surfaces of the gate oxide film 5 and the antioxidant insulating film 6. Thereafter, a conductive film is formed so as to cover the entire surface of the substrate including the mask RM5, and then the conductive film attached on the mask RM5 is removed by lift-off, whereby the source electrode 8a is formed on the exposed surface of the source region 4a. Form.

  As the material of the source electrode 8a, aluminum, nickel, titanium and gold, or a composite thereof can be used. As a formation method thereof, a sputtering method, an MOCVD method, or the like can be used.

  Thereafter, drain electrode 9 is formed on the back surface of silicon carbide substrate 1 (the main surface opposite to the side on which the MOSFET is formed), whereby the main part of MOSFET 100 shown in FIG. 1 is completed.

  Note that aluminum, nickel, titanium and gold, or a composite thereof can be used as the material of the drain electrode 9, and as a formation method thereof, a sputtering method, an MOCVD method, or the like can be used.

  Further, in order to obtain ohmic contact between the source region 4a and the back surface of the silicon carbide substrate 1, heat treatment at about 1000 ° C. may be performed after the source electrode 8a and the drain electrode 9 are formed.

  According to the method for manufacturing the silicon carbide semiconductor device according to the first embodiment described above, nitriding is performed with silicon oxynitride film 61 formed on silicon dioxide film 51 for forming gate oxide film 5. Therefore, oxidation at the silicon dioxide / silicon carbide interface SF is suppressed, the quality of the silicon dioxide / silicon carbide interface SF is improved, the on-resistance is reduced, the MOSFET characteristics are improved, and energy saving can be achieved. Moreover, since it is a silicon carbide semiconductor device, if it is the same electric power specification, size reduction is possible compared with a silicon semiconductor device.

<Embodiment 2>
In the method for manufacturing the silicon carbide semiconductor device of the first embodiment, nitriding is performed in a state where silicon oxynitride film 61 is formed on silicon dioxide film 51 for forming gate oxide film 5, and gate oxide film 5 is formed. Although the method of forming the gate electrode 7 with the oxidation-preventing insulating film 6 formed thereon is shown, in the method for manufacturing the silicon carbide semiconductor device according to the second embodiment, the silicon oxynitride film 61 is formed after the nitriding treatment. It is characterized by removing.

  Hereinafter, a method for manufacturing MOSFET 200 will be described with reference to FIGS. The configuration of MOSFET 200 is shown in FIG. 20 showing the final process. Note that the same components as those of the MOSFET 100 described with reference to FIGS. 1 to 13 are denoted by the same reference numerals and description thereof is omitted, and the same steps are referred to in the drawings, and description thereof is omitted.

  Through the steps described with reference to FIGS. 1 to 8, the silicon oxynitride film 61 (or insulation selected from any of silicon nitride, aluminum oxide, chromium oxide, titanium oxide, zirconium oxide, and tantalum oxide) is formed on the silicon dioxide film 51. As shown in FIG. 14, the silicon oxynitride film 61 is removed by wet etching, plasma etching, reactive ion etching, or a combination of these, after performing nitriding with the film formed. Then, the surface of the silicon dioxide film 51 is exposed again.

  Next, in a step shown in FIG. 15, a gate electrode film 71 constituting a gate electrode is formed on the silicon dioxide film 51, and then a mask RM11 for patterning the gate electrode on the gate electrode film 71 is formed. Is formed using a photoengraving technique. The mask RM11 is patterned in accordance with the planar shape of the gate electrode, and has a cross-sectional shape that covers the upper portions of the two base regions 3a and the drift layer 2 and is located above the respective edge portions of the two source regions 4a. It is patterned to extend to

  Next, in the step shown in FIG. 16, unnecessary portions of the gate electrode film 71 are removed by etching using the mask RM11 as an etching mask to form the gate electrode 7. This etching method is appropriately selected according to the material of the gate electrode film 71, but an etching method that can obtain an etching selectivity with respect to the silicon dioxide film 51 as a base is used.

  After the patterning of the gate electrode 7, in the step shown in FIG. 17, a mask RM12 for patterning the silicon dioxide film 51 is formed on the silicon dioxide film 51 by using a photoengraving technique so as to completely cover the gate electrode 7. .

  The mask RM12 is formed longer than the length of the gate electrode 7 in the gate length direction, whereby the gate oxide film 5 formed in the next step is formed longer than the gate electrode 7 in the gate length direction. The

  Next, unnecessary portions of the silicon dioxide film 51 are removed by wet etching or dry etching using the mask RM3 as an etching mask, whereby the gate electrode 7 is laminated on the gate oxide film 5 as shown in FIG. A stacked body is formed, and a structure is obtained in which the surface of the source region 4a is exposed outside the two side surfaces of the stacked body in the gate length direction.

  As shown in FIG. 18, the gate oxide film 5 is formed to have a length in the gate length direction longer than that of the gate electrode 7, and it is ensured that there is an electrical connection between the source electrode 8 a and the gate electrode 7 formed in the next step. Can be separated.

  Next, in the step shown in FIG. 19, a mask RM13 is formed using a photoengraving technique so as to cover the gate electrode. The mask RM13 is patterned in accordance with the planar shape of the gate oxide film 5, and is patterned so as not to cover the side surfaces of the gate oxide film 5. Thereafter, a conductive film is formed so as to cover the entire surface of the substrate including the mask RM13, and then the conductive film attached to the mask RM13 is removed by lift-off, whereby the source electrode 8a is formed on the exposed surface of the source region 4a. Form.

  Thereafter, drain electrode 9 is formed on the back surface of silicon carbide substrate 1 (the main surface opposite to the side where the MOSFET is formed), thereby completing the main part of MOSFET 200 as shown in FIG.

  According to the method for manufacturing the silicon carbide semiconductor device according to the first embodiment described above, any one of silicon oxynitride film 61 (or silicon nitride, aluminum oxide, chromium oxide, titanium oxide, zirconium oxide, tantalum oxide after nitriding treatment) Therefore, it is possible to prevent the threshold voltage of the MOSFET and the gate breakdown voltage from being affected by the presence of the anti-oxidation insulating film on the gate oxide film 5.

  In the above, the example in which the silicon oxynitride film 61 is completely removed has been shown. However, in order to give a predetermined threshold voltage and gate breakdown voltage to the MOSFET, the film thickness to be removed is controlled. The silicon oxynitride film 61 may be left on the silicon dioxide film 51.

  In the first and second embodiments, the MOSFET has been described as an example. However, the present invention is an insulated gate transistor element such as an IGBT having a silicon dioxide film formed on a silicon carbide substrate as a gate insulating film. It can also be applied to.

  This insulated gate transistor is also applicable to a lateral semiconductor element in which the source, gate and drain electrodes are formed on the same main surface. In this case, a power device having high mobility and operating at high speed is realized. be able to.

  The present invention can also be applied to reduction of the interface state at the interface between the element isolation insulating film and the silicon carbide layer by the shallow trench isolation (STI) method or the LOCOS (Local Oxide of Silicon) method.

  DESCRIPTION OF SYMBOLS 1 Silicon carbide substrate, 2 Drift layer, 5 Gate oxide film, 6 Antioxidation insulating film, 7 Gate electrode, 51 Silicon dioxide film, 61 Silicon oxynitride film

Claims (5)

A method for manufacturing a silicon carbide semiconductor device comprising a silicon carbide layer,
(a) forming a silicon dioxide film in contact with the silicon carbide layer;
(b) forming on the silicon dioxide film an antioxidant insulating film having a higher energy required for oxygen diffusion in the film than in the silicon dioxide film;
(c) nitriding the interface between the silicon dioxide film and the silicon carbide layer by forming a heat treatment in an atmosphere containing a nitrogen oxide gas after forming the antioxidant insulating film ;
(d) after the step (c), the step of removing the antioxidant insulating film ,
Wherein in the step (b),
The oxidation-preventing insulating film is composed of any insulator selected from silicon oxynitride, silicon nitride, aluminum oxide, chromium oxide, titanium oxide, zirconium oxide, and tantalum oxide, and a silicon carbide semiconductor Device manufacturing method. The step (a)
2. The silicon carbide semiconductor device according to claim 1, comprising a step of forming the silicon dioxide film by exposing the silicon carbide layer to any one of air, an oxygen gas atmosphere, and a water vapor atmosphere containing water to heat the silicon carbide layer. Production method. The step (a)
The method for manufacturing a silicon carbide semiconductor device according to claim 1, comprising a step of forming the silicon dioxide film by chemical vapor deposition. The step (c)
The heat treatment in an atmosphere containing at least one gas selected from nitrogen monoxide (NO) gas, dinitrogen monoxide (N ₂ O) gas, and nitrogen dioxide (NO ₂ ) gas as the nitrogen oxide gas The manufacturing method of the silicon carbide semiconductor device of Claim 1 including the process of performing. The silicon carbide semiconductor device includes a MOSFET,
The method for manufacturing a silicon carbide semiconductor device according to claim 1 , wherein the silicon dioxide film constitutes a gate oxide film of the MOSFET .

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