JP2011091186A - Method of fabricating silicon carbide semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of fabricating a silicon carbide semiconductor device, which achieves high reliability and insulation strength of an SiO<SB>2</SB>film formed on an SiC layer and can control the threshold voltage of the device. <P>SOLUTION: The method of fabricating a silicon carbide semiconductor device having an SiO<SB>2</SB>film formed on the surface of an SiC layer uses a CVD (Chemical Vapor Deposition) oxide film deposited as the SiO<SB>2</SB>film by a CVD method. After the CVD oxide film is deposited on the surface of the SiC layer, the CVD oxide film and the SiC layer are subjected to a nitriding treatment and a heat treatment under the oxygen atmosphere containing water vapor. <P>COPYRIGHT: (C)2011,JPO&amp;INPIT

Description

  The present invention relates to a method for manufacturing a silicon carbide semiconductor device, and more particularly, to a method for manufacturing a silicon carbide semiconductor device including a silicon dioxide film formed on a silicon carbide layer.

Silicon carbide (SiC) has attracted attention as a material that has an excellent physical property value and enables the realization of a power device with high breakdown voltage and low loss. Similar to silicon (Si), SiC can form a silicon dioxide (SiO ₂ ) film by thermally oxidizing the surface. However, many interface states exist at the SiC / SiO ₂ interface immediately after thermal oxidation. For example, in a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) having a SiO ₂ film (hereinafter referred to as “thermal oxide film”) formed by thermally oxidizing a SiC layer as a gate insulating film, the interface state close to this conduction band The channel mobility becomes extremely smaller than the electron mobility in the bulk, and the on-resistance value becomes higher than the ideal value.

It is considered that the generation of many interface states at the interface between the SiC layer and the thermal oxide film is caused by the deposition of carbon atoms in the thermal oxide film. In addition, since the dislocation defects contained in the SiC layer prevent uniform growth of SiO ₂ during the formation process of the thermal oxide film, the thermal oxide film formed on the SiC layer is more reliable than the thermal oxide film formed on the Si layer. Have been reported to be poor (Non-Patent Document 1).

In order to reduce the interface state density at the SiC / SiO ₂ interface, in a nitrogen oxidizing gas atmosphere such as nitrogen monoxide (NO) or dinitrogen monoxide (N ₂ O), or in an ammonia (NH 3) gas atmosphere It is preferable to perform a heat treatment (nitriding treatment) to nitride the SiC / SiO ₂ interface. Of these, oxynitriding with NO gas is effective. In this nitriding treatment, after an SiO ₂ film is formed on the SiC layer, an interface state generated at the interface between the SiC layer and the SiO ₂ film is electrically inactivated. However, this method involves a decrease in insulation strength because many hole traps are formed in the SiO ₂ film as the interface state decreases.

  For example, when nitriding is performed on a thermal oxide film that is a gate insulating film of a MOSFET, the on-resistance can be lowered. It has also been reported that the threshold voltage of the MOSFET decreases and approaches the theoretical value as the acceptor-type interface state decreases due to nitriding (Non-Patent Document 2).

  When using a SiC semiconductor device as a power device, securing high breakdown voltage characteristics is a top priority. In order to realize this, the threshold voltage needs to be large to some extent. When the above nitriding treatment is performed on a device having a relatively complicated structure such as a storage channel MOSFET, the on-resistance can be reduced, but the threshold voltage becomes too low, resulting in a fatal result as a power device. When it is bad, it becomes normally-on characteristics.

  Against this background, in the development of MOSFETs composed of SiC (SiC-MOSFETs), it is urgent to establish a technology that can appropriately control the threshold voltage as well as improving the channel mobility and the reliability of the gate insulating film. It has become.

Patent Document 1 below discloses an oxygen (O ₂ ) atmosphere containing water vapor (H ₂ O) as a method for increasing the threshold voltage of a SiC-MOSFET after nitriding the gate insulating film of a thermal oxide film. Discloses a method of performing a heat treatment. According to this, a temperature range of 800 ° C. or higher and lower than 1100 ° C. is particularly effective. For example, the threshold voltage is significantly increased to +8 V by heat treatment at 950 ° C. for 1 hour.

JP 2005-223003 A

K. Fujihira, N. Miura, K. Shiozawa, M. Imaizumi, K. Ohtsuka, and T. Takami, “Successful Enhancement of Lifetime for SiO2 on 4H-SiC by N2O Anneal,” Electron Device Lett., 25, 734- 736 (2004). GY Chung, JR Williams, CC Tin, K. McDonald, D. Farmer, RK Chanana, ST Pantelides, OW Holland, LC Feldman, “Interface state density and channel mobility for 4H-SiC MOSFETs with nitrogen passivation,” Applied Surface Science 184 , 399-403 (2001).

As described above, the SiO ₂ film (thermal oxide film) formed by thermally oxidizing the SiC layer has poor reliability due to the influence of dislocation defects. In addition, there are many interface states at the SiC / SiO ₂ interface, which hinders realization of device characteristics expected from the inherent physical properties of SiC, in particular, low channel mobility. One method for reducing the interface state is nitriding, but as the interface state is reduced, many hole traps are formed in the SiO ₂ film, resulting in a decrease in insulation strength. In addition, if it is performed on a SiC-MOSFET used as a power device, the threshold voltage is lowered, so that high breakdown voltage characteristics may not be maintained.

  The present invention has been made to solve the above-described problems, and can realize high reliability and high insulation strength in a silicon dioxide film formed on a silicon carbide layer, and control the threshold voltage of the device. An object of the present invention is to provide a method for manufacturing a silicon carbide semiconductor device.

A method of manufacturing a silicon carbide semiconductor device according to the present invention includes: (a) a step of depositing a SiO ₂ film on the surface of a SiC layer by a CVD method; and (b) nitriding the SiO ₂ film and the SiC layer. And (c) performing a heat treatment in an oxygen atmosphere containing water vapor on the SiO ₂ film and the SiC layer.

  By using the CVD oxide film, higher reliability than the thermal oxide film can be obtained. Further, carrier mobility can be improved by nitriding treatment. When the nitriding treatment is performed, the insulation strength of the CVD film is lowered, but the lowered insulation strength can be improved by heat treatment in an oxygen atmosphere containing water vapor. Nitriding works to lower the threshold voltage of the device, but heat treatment in an oxygen atmosphere containing water vapor also works to raise the threshold voltage, and the threshold voltage can be controlled by adjusting the pitch and time. Is possible.

1 is a schematic cross-sectional view of a MOSFET according to a first embodiment. FIG. 6 is a process diagram of the method for manufacturing the MOSFET according to the first embodiment. FIG. 6 is a process diagram of the method for manufacturing the MOSFET according to the first embodiment. FIG. 6 is a process diagram of the method for manufacturing the MOSFET according to the first embodiment. FIG. 6 is a process diagram of the method for manufacturing the MOSFET according to the first embodiment. FIG. 6 is a flowchart showing a step of forming a gate insulating film in the MOSFET manufacturing method according to the first embodiment. FIG. 6 is a process diagram of the method for manufacturing the MOSFET according to the first embodiment. FIG. 6 is a process diagram of the method for manufacturing the MOSFET according to the first embodiment. It is a figure which shows the influence which the nitridation process to the gate insulating film of MOSFET which concerns on Embodiment 1 has on a threshold voltage and channel mobility. It is a figure which shows the influence which the nitridation process to the gate insulating film of MOSFET which concerns on Embodiment 1 has on the insulation strength of the said gate insulating film. It is a figure which shows the relationship between the heat processing temperature of the gate insulating film of MOSFET which concerns on Embodiment 1, and a threshold voltage. It is a figure which shows the relationship between the heat processing temperature of the gate insulating film of MOSFET which concerns on Embodiment 1, and channel mobility. It is a figure which shows the relationship between the heat processing time of the gate insulating film of MOSFET which concerns on Embodiment 1, and a threshold voltage. It is a figure which shows the relationship between the heat processing time of the gate insulating film of MOSFET which concerns on Embodiment 1, and channel mobility. It is a figure which shows the insulation strength of the gate insulating film of MOSFET which concerns on Embodiment 1. FIG. 6 is a schematic cross-sectional view of a termination portion of a vertical MOSFET according to a second embodiment. FIG. 6 is a schematic cross-sectional view of a pn diode and an element isolation region according to a second embodiment. FIG.

In the present invention, an SiO ₂ film (hereinafter referred to as “CVD oxide film”) deposited by a chemical vapor deposition (CVD) method is used as the SiO ₂ film provided on the SiC layer instead of the thermal oxide film. . The CVD oxide film has a lower interface state density at the interface with the SiC layer than the thermal oxide film. Therefore, for example, if a CVD oxide film is used as the gate insulating film of the SiC-MOSFET, the channel mobility can be improved. In addition, since the CVD oxide film is not affected by dislocation defects included in the SiC layer, higher reliability than the thermal oxide film can be expected.

  However, even when a CVD oxide film is used as the gate insulating film of the SiC-MOSFET, the channel mobility cannot be said to be an ideal value, and since the CVD oxide film is porous, the breakdown voltage (insulation strength) is related. Remains a problem that is inferior to thermal oxide films.

Therefore, in the present invention, the CVD oxide film formed on the SiC layer is subjected to nitriding treatment and heat treatment in an oxygen (O ₂ ) atmosphere containing water vapor (H ₂ O), whereby the electrical characteristics of the CVD oxide film are obtained. In addition, the reliability is improved, thereby improving the performance of the SiC semiconductor device.

<Embodiment 1>
FIG. 1 is a schematic cross-sectional view of a SiC-MOSFET which is a SiC semiconductor device according to the first embodiment. Here, a lateral n-channel MOSFET is shown as an example of the MOSFET.

  The MOSFET is formed in a p-type SiC epitaxial layer 2 grown on an n-type SiC substrate 1. On the epitaxial layer 2, an n-type drain region 3 and a source region 4 are formed at an interval. A p-type well contact region 5 is formed in a portion adjacent to the source region 4.

  A gate insulating film 6 is formed on the upper surface of the epitaxial layer 2, and a gate electrode is formed on the gate insulating film 6 so as to straddle the drain region 3, the source region 4, and the epitaxial layer 2 (channel region) therebetween. 7 is formed. In the gate insulating film 6, openings are provided in a region on the drain region 3 and a region on the source region 4 and the well contact region 5. A drain electrode 8 electrically connected to the drain region 3 is formed in the opening above the drain region 3, and the source region 4 and the well contact region are formed in the opening above the source region 4 and the well contact region 5. A source electrode 9 electrically connected to 5 is formed.

  1 is turned on (conductive state) when a voltage equal to or higher than the threshold voltage is applied to the gate electrode 7. At this time, an inversion channel layer serving as a current path between the drain region 3 and the source region 4 is formed on the surface portion of the epitaxial layer 2 (channel region) below the gate electrode 7. Conducts between. In the case of an n-channel MOSFET, the majority carriers are electrons, and the electrons flowing from the source region 4 to the surface portion of the epitaxial growth layer 2 (the inversion channel layer) are generated by an electric field generated by the voltage between the drain electrode 8 and the source electrode 9. Accordingly, the drain region 3 is reached. Thereby, a current flows between the drain electrode 8 and the source electrode 9.

  When the voltage of the gate electrode 7 is lower than the threshold voltage, the inversion channel layer is not formed, so that the MOSFET is turned off (non-conducting state), and no current flows between the drain electrode 8 and the source electrode 9. .

  2 to 8 are views for explaining a method of manufacturing the MOSFET of FIG. A method for manufacturing the MOSFET of FIG. 1 will be described with reference to these drawings.

First, an epitaxial layer 2 made of p-type SiC is formed on an n-type SiC substrate 1 using an epitaxial crystal growth method (FIG. 2). The thickness of the epitaxial layer 2 may be about 1 to 50 μm and the impurity concentration may be about 1 × 10 ¹⁵ to 1 × 10 ¹⁸ cm ⁻³ . The SiC substrate 1 has a polytype such as 4H, 6H, or 3C, for example, and a surface orientation such as (0001), (000-1), or (11-20) can be used.

  Next, a mask (not shown) having an opening on the formation region of the drain region 3 and the source region 4 is formed on the epitaxial layer 2 using photolithography. By using the mask as an implantation blocking film and ion-implanting n-type impurities, the drain region 3 and the source region 4 are formed in the epitaxial layer 2, and the mask is removed (FIG. 3).

The drain region 3 and the source region 4 are formed shallower than the thickness of the epitaxial layer 2. Examples of the n-type impurity used for forming the drain region 3 and the source region 4 include phosphorus (P), nitrogen (N), and the like, and the implantation concentration is, for example, about 1 × 10 ¹⁸ to 1 × 10 ²¹ cm ^−3. It's okay.

  A mask (not shown) having an opening on the formation region of the well contact region 5 is formed on the epitaxial layer 2 this time using photolithography again. The well contact region 5 is formed by ion implantation of p-type impurities using the mask as an implantation blocking film, and the mask is removed (FIG. 4).

Examples of the p-type impurity used for forming the well contact region 5 include boron (B), aluminum (Al), and the like, and the implantation concentration thereof may be, for example, about 1 × 10 ¹⁸ to 1 × 10 ²¹ cm ^−3. . For example, resist, silicon dioxide, silicon nitride, or the like can be used for each of the masks.

  Here, using a heat treatment apparatus, the SiC substrate 1 is heat-treated at a high temperature of, for example, 1300 to 1900 ° C., for example, for about 30 seconds to 1 hour. Thereby, the impurity ions implanted for forming the drain region 3, the source region 4 and the well contact region 5 are electrically activated.

Subsequently, as shown in FIG. 5, a gate insulating film 6 is formed on the epitaxial layer 2. In this step, the process shown in the flowchart of FIG. 6 is performed. First, the SiC substrate 1 is moved into a CVD furnace, and a gate insulating film 6 that is a SiO ₂ film (CVD oxide film) is formed on the epitaxial layer 2 with a film thickness of about 50 nm by a CVD method (step S1).

In this embodiment, monosilane (SiH ₄ ) and N ₂ O or dichlorosilane (SiH ₂ Cl ₂ ) and N ₂ O are used as the gate insulating film 6 in a low pressure (LP) CVD furnace at about 800 ° C. to 900 ° C. And a SiO ₂ film called “HTO (High Temperature Oxide) film” deposited under a vacuum degree of 0.5 to 5 Torr.

  In the step of forming the gate insulating film 6, before the CVD oxide film to be the gate insulating film 6 is deposited, a pretreatment for pre-oxidizing the surface of the epitaxial layer 2 (SiC layer) in an atmosphere containing oxygen or a nitrogen oxidizing gas atmosphere May be performed.

Subsequently, in order to take out the SiC substrate 1 from the CVD furnace, the temperature is once lowered and then introduced into the nitriding furnace. Then, the SiC substrate 1 is subjected to heat treatment in a nitrogen oxidizing gas atmosphere such as nitrogen monoxide (NO), dinitrogen monoxide (N ₂ O), nitrogen dioxide (NO ₂ ), or in an ammonia (NH 3) gas atmosphere. By performing, the nitriding process of the gate insulating film 6 is performed (step S2).

In the present embodiment, the temperature in the nitriding furnace is raised, and when the predetermined processing temperature is reached, the atmosphere in the furnace is switched to a nitrogen oxidizing gas atmosphere, and the nitrogen oxidizing gas atmosphere and the processing temperature are maintained for a predetermined time. Thus, nitriding treatment of the gate insulating film 6 was performed. The nitrogen oxidizing gas atmosphere is not limited to an atmosphere of only NO gas, N ₂ O gas, or NO ₂ gas, and may be an atmosphere in which two or more of them are mixed, or nitrogen oxidizing gas may be an inert gas ( Nitrogen, argon, helium, krypton, etc.) may be used.

The treatment temperature in the nitriding treatment step is desirably 900 ° C. to 1450 ° C. At low temperatures below 900 ° C., the nitriding rate is very slow, and inactivation of interface states by nitrogen atoms hardly progresses, and at high temperatures above 1450 ° C., NO, N ₂ O, and N ₂ O are decomposed. This is because thermal oxidation of the SiC layer with oxygen proceeds, and a new interface state is generated. The nitriding time is preferably about 10 minutes to 10 hours.

By this nitriding treatment, the interface between the epitaxial layer 2 (SiC layer) and the gate insulating film 6 (CVD oxide film) is nitrided, and the interface state at the interface is electrically inactivated. However, at this stage, since many hole traps are formed in the SiO ₂ film as the interface state decreases, the insulation strength of the gate insulating film 6 decreases.

  After performing the nitriding process, the temperature of the nitriding process is maintained for a predetermined time while switching the inside of the nitriding furnace to an inert gas atmosphere. Then, when the temperature in the nitriding furnace is lowered and the temperature of the SiC substrate 1 is lowered to a predetermined temperature, the SiC substrate 1 is taken out from the nitriding furnace.

Subsequently, the SiC substrate 1 is moved to an oxidation furnace, and heat treatment is performed in an oxygen (O ₂ ) atmosphere containing water vapor (H ₂ O) (step S3). It is important that the temperature of this heat treatment is sufficiently lower than the temperature at which the surface of SiC substrate 1 is thermally oxidized, and is preferably 500 ° C. or higher and 1050 ° C. or lower.

By heat treatment in an O ₂ atmosphere containing H ₂ O, a large amount of OH groups are taken into the CVD oxide film (gate insulating film 6), and hole traps generated by the nitriding treatment are neutralized. Also, the heat treatment increases the density of the porous CVD oxide film. As a result, the insulation strength of the gate insulating film 6 which has been lowered in the nitriding process is improved.

  After each process is performed on the gate insulating film 6, a conductive film that is a material of the gate electrode 7 is formed on the gate insulating film 6, and the gate electrode 7 is formed by patterning using a photoengraving technique. (FIG. 7). The gate electrode 7 has a pattern in which both ends are located above the information of the drain region 3 and the source region 4 and straddle the drain region 3, the source region 4 and the epitaxial layer 2 therebetween.

  The material of the gate electrode 7 is n-type or p-type polycrystalline Si (polysilicon), n-type or p-type polycrystalline SiC, or low resistance and high melting point such as aluminum, titanium, molybdenum, tantalum, niobium, tungsten, etc. Examples thereof include metals and nitrides thereof.

  After the gate electrode 7 is formed, the gate insulating film 6 is patterned using a photoengraving technique to expose the upper surfaces of the drain region 3, the source region 4 and the well contact region 5 (FIG. 8). At this time, the gate insulating film 6 under the gate electrode 7 is patterned into a longer shape than the gate electrode 7. This reliably separates the gate electrode 7 from the drain electrode 8 and the source electrode 9 to be formed later.

  Then, a conductive film which is a material of the drain electrode 8 and the source electrode 9 is formed and patterned by using a photoengraving technique, thereby forming the drain electrode 8 on the exposed drain region 3 and exposing the exposed source. Source electrode 9 is formed on region 4 and well contact region 5. Thus, the configuration of the MOSFET shown in FIG. 1 is completed.

  As the material for the drain electrode 8 and the source electrode 9, aluminum, nickel, titanium, gold, and a composite thereof can be used. In addition, in order to obtain ohmic contact with the drain region 3, the source region 4, and the well contact region 5, a heat treatment at about 1000 ° C. may be performed after the drain electrode 8 and the source electrode 9 are formed.

In the above description, in the process of forming the gate insulating film 6, the process of forming the gate insulating film 6 by CVD (step S1 in FIG. 6), the nitriding process (step S2), and the O ₂ atmosphere containing H ₂ O. It is assumed that the heat treatment process (step S3) is performed by individual apparatuses, but these processes may be performed continuously or simultaneously in a single apparatus. In this case, since it is not necessary to move the SiC substrate 1 to another apparatus, it is not necessary to lower the temperature of the SiC substrate 1 once, the process time is shortened, and the SiC substrate 1 is contaminated during the movement. Can also be prevented.

  According to the present embodiment, since the CVD oxide film is used as the gate insulating film 6, the reliability of the gate insulating film 6 is high. In addition, since the interface state at the interface between the epitaxial layer 2 (SiC layer) and the gate insulating film 6 (CVD oxide film) is electrically inactivated by the nitriding treatment of the gate insulating film 6, the channel mobility is improved. Thus, the on-resistance of the MOSFET can be lowered.

  However, since many hole traps are formed in the CVD oxide film in the nitriding treatment, the insulation strength of the CVD oxide film having a lower insulation strength than the thermal oxide film is further reduced. In addition, the threshold voltage of the MOSFET tends to be lowered, and there remains a problem that the breakdown voltage characteristics of the MOSFET are deteriorated.

Therefore, in the present invention, the CVD oxide film (gate insulating film 6) subjected to nitriding is subjected to heat treatment in an O ₂ atmosphere containing H ₂ O. As a result, a large amount of OH groups are taken into the CVD oxide film, the hole traps generated by the nitriding treatment are neutralized, and the density of the porous CVD oxide film is increased. Therefore, the insulation strength of the gate insulating film 6 that has been lowered in the nitriding process is improved. In addition, the heat treatment has an effect of increasing the threshold voltage of the MOSFET, and the problem that the breakdown voltage characteristics of the MOSFET deteriorate due to the nitriding treatment can be solved. Note that the threshold voltage of the MOSFET can be controlled by adjusting the temperature and time of this heat treatment.

  The inventor conducted various experiments to support the effects of the present invention. The experimental results are shown below.

FIG. 9 is a diagram illustrating the influence of the nitriding treatment on the gate insulating film on the threshold voltage and the channel mobility. In this experiment, the gate insulating film was not heat-treated in an O ₂ atmosphere containing H ₂ O. When nitriding was performed on the gate insulating film of the CVD oxide film, it was confirmed that the channel mobility of the MOSFET was improved about 4 times. However, the threshold voltage decreased by about 11V.

FIG. 10 is a diagram showing the influence of the nitriding treatment on the gate insulating film on the insulating strength of the gate insulating film. Also in this experiment, heat treatment in an O ₂ atmosphere containing H ₂ O is not performed on the gate insulating film. It can be seen that when the nitriding treatment is performed on the gate insulating film of the CVD oxide film, the insulating strength of the gate insulating film is lower than before the nitriding treatment (immediately after the deposition of the CVD oxide film).

11 and 12 are diagrams showing the relationship between the temperature of the heat treatment in the O ₂ atmosphere containing H ₂ O for the gate insulating film, the threshold voltage, and the channel mobility. In this experiment, the heat treatment time was 30 minutes. The threshold voltage can be increased as the heat treatment temperature is increased (FIG. 11). However, it should be noted that the channel mobility decreases as the heat treatment temperature increases (FIG. 12). For example, when heat treatment at 650 ° C. was performed, the threshold voltage could be increased by about 2.3 V compared to the case where heat treatment was not performed (broken line). At this time, the channel mobility decreased by about 4 cm ² / Vs, but this is smaller than the increase due to the nitriding treatment (see FIG. 9), so that a higher channel mobility than the state immediately after the deposition of the CVD oxide film is secured. ing.

FIG. 13 and FIG. 14 are diagrams showing the relationship between the heat treatment time in the O ₂ atmosphere containing H ₂ O for the gate insulating film, the threshold voltage, and the channel mobility. In this experiment, the temperature of the heat treatment was 750 ° C. The threshold voltage can be increased as the heat treatment time is increased (FIG. 13). However, the channel mobility decreases as the heat treatment time increases (FIG. 14). For example, when the heat treatment is performed for 10 minutes, the threshold voltage can be increased by about 2.6 V compared to the case where the heat treatment is not performed. At this time, the channel mobility decreased by about 5 cm ² / Vs, but this is also smaller than the increase due to the nitriding treatment (see FIG. 9), so that a higher channel mobility than the state immediately after the deposition of the CVD oxide film is secured. ing.

FIG. 15 is a diagram showing the insulation strength of the gate insulating film of the MOSFET according to the present embodiment. For comparison, FIG. 15 shows a case where the gate insulating film of the thermal oxide film is subjected to nitriding treatment and a CVD oxide film. Also shown is an experimental result when only the nitriding treatment is applied to the gate electrode. It was confirmed that the gate electrode of this embodiment (a CVD oxide film subjected to both nitriding treatment and heat treatment in an O ₂ atmosphere containing H ₂ O) has the highest insulation strength. That is, it was confirmed that the insulation strength decreased by the nitriding treatment was improved by the heat treatment in the O ₂ atmosphere containing H ₂ O.

  As described above, according to the method for manufacturing a MOSFET according to the present embodiment, a SiC-MOSFET that can realize a gate insulating film with high reliability and high insulation strength and can appropriately control the threshold voltage of the device is obtained. .

<Embodiment 2>
Although the MOSFET is shown as an example of the SiC semiconductor device in the first embodiment, the present invention is widely applicable to semiconductor devices having a structure having an SiO ₂ film formed on the SiC layer. For example, the present invention can be applied not only to a gate electrode of an insulated gate transistor element such as an IGBT but also to termination structures and element isolation structures of various semiconductor elements. Some examples are shown below.

FIG. 16 is a schematic cross-sectional view of the termination portion of the vertical MOSFET. In FIG. 16, elements having the same functions as those shown in FIG. In the vertical MOSFET, the drain electrode 8 is disposed on the back surface of the SiC substrate 1. Also in the MOSFET having this structure, a CVD oxide film is used as the gate insulating film 6, and the gate insulating film 6 is subjected to nitriding treatment and heat treatment in an O ₂ atmosphere containing H ₂ O to obtain the same structure as in the first embodiment. Similar effects can be obtained.

Here, in the termination portion of the MOSFET shown in FIG. 16, termination region 11 which is a p-type impurity region is formed on SiC substrate 1, and field oxide film 12 which is a thermal oxide film is formed on SiC substrate 1. Has been. Since the nitriding treatment and the heat treatment in the O ₂ atmosphere containing H ₂ O are effective for the thermal oxide film, these treatments may be performed on the field oxide film 12 together with the gate insulating film 6. Thereby, it is possible to reduce the interface state density at the interface between the gate insulating film 6 and the SiC substrate 1 and to improve the insulating strength of the gate insulating film 6.

  FIG. 17 is a schematic cross-sectional view of a pn diode and an element isolation region. The pn diode includes a p-type region 21 formed on the top of the SiC substrate 1 and an anode electrode 23 connected thereto, and an n-type region 22 formed on the p-type region 21 and a cathode electrode 24 connected thereto. Composed.

Here, the pn diode shown in FIG. 17 is formed in a region defined by a shallow trench isolation (STI) element isolation structure. This element isolation structure is formed by isolating an isolation oxide film 25 which is a CVD oxide film in a trench formed in the upper part of the SiC substrate 1. The present invention can also be applied to the isolation oxide film 25. That is, by performing nitriding treatment and heat treatment in an O ₂ atmosphere containing H ₂ O on the isolation oxide film 25, the interface state density at the interface between the isolation oxide film 25 and the SiC substrate 1 is reduced, and the isolation oxide film The insulation strength of 25 can be improved.

In addition, the CVD oxide film according to the present invention that has been subjected to nitriding treatment and heat treatment in an O ₂ atmosphere containing H ₂ O can be used as a surface protective film of a power device because of its high insulation strength.

  1 SiC substrate, 2 epitaxial layer, 3 drain region, 4 source region, 5 well contact region, 6 gate insulating film, 7 gate electrode, 8 drain electrode, 9 source electrode, 11 termination region, 12 field oxide film, 21 p-type Region, 22 n-type region, 23 anode electrode, 24 cathode electrode, 25 separation oxide film.

Claims (7)

(A) depositing a SiO ₂ film on the surface of the SiC layer by a CVD method;
(B) nitriding the SiO ₂ film and the SiC layer;
(C) A method of manufacturing a silicon carbide semiconductor device, comprising: performing a heat treatment in an oxygen atmosphere containing water vapor on the SiO ₂ film and the SiC layer. The step (c)
The method for manufacturing a silicon carbide semiconductor device according to claim 1, further comprising a step of controlling a threshold voltage of the silicon carbide semiconductor device by adjusting at least one of the temperature and time of the heat treatment. The step (a)
3. The method for manufacturing a silicon carbide semiconductor device according to claim 1, further comprising a step of previously oxidizing the surface of the SiC layer in an atmosphere containing oxygen or a nitrogen oxidizing gas atmosphere before depositing the SiO ₂ film. The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein the nitriding treatment is a heat treatment in a nitrogen oxidizing gas atmosphere. The method for manufacturing a silicon carbide semiconductor device according to claim 4, wherein the nitrogen oxidizing gas includes one or more of NO gas, N ₂ O gas, and NO ₂ gas. The method for manufacturing a silicon carbide semiconductor device according to any one of claims 1 to 3, wherein the nitriding treatment is a heat treatment in an ammonia gas atmosphere. The method for manufacturing a silicon carbide semiconductor device according to any one of claims 1 to 6, wherein a temperature of the heat treatment in the step (c) is between 500C and 1050C.

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