JP4843129B2 - 半導体装置およびその製造方法 - Google Patents

半導体装置およびその製造方法 Download PDF

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Publication number
JP4843129B2
JP4843129B2 JP2000197552A JP2000197552A JP4843129B2 JP 4843129 B2 JP4843129 B2 JP 4843129B2 JP 2000197552 A JP2000197552 A JP 2000197552A JP 2000197552 A JP2000197552 A JP 2000197552A JP 4843129 B2 JP4843129 B2 JP 4843129B2
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Japan
Prior art keywords
dummy pattern
region
separation region
semiconductor device
trench
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Expired - Fee Related
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JP2000197552A
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English (en)
Japanese (ja)
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JP2002016131A5 (enExample
JP2002016131A (ja
Inventor
裕通 小林
孝典 佐々木
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Renesas Electronics Corp
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Renesas Electronics Corp
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Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2000197552A priority Critical patent/JP4843129B2/ja
Priority to US09/754,117 priority patent/US6545336B2/en
Publication of JP2002016131A publication Critical patent/JP2002016131A/ja
Publication of JP2002016131A5 publication Critical patent/JP2002016131A5/ja
Application granted granted Critical
Publication of JP4843129B2 publication Critical patent/JP4843129B2/ja
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Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76229—Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP2000197552A 2000-06-30 2000-06-30 半導体装置およびその製造方法 Expired - Fee Related JP4843129B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2000197552A JP4843129B2 (ja) 2000-06-30 2000-06-30 半導体装置およびその製造方法
US09/754,117 US6545336B2 (en) 2000-06-30 2001-01-05 Semiconductor device, and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000197552A JP4843129B2 (ja) 2000-06-30 2000-06-30 半導体装置およびその製造方法

Publications (3)

Publication Number Publication Date
JP2002016131A JP2002016131A (ja) 2002-01-18
JP2002016131A5 JP2002016131A5 (enExample) 2007-07-26
JP4843129B2 true JP4843129B2 (ja) 2011-12-21

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JP2000197552A Expired - Fee Related JP4843129B2 (ja) 2000-06-30 2000-06-30 半導体装置およびその製造方法

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US (1) US6545336B2 (enExample)
JP (1) JP4843129B2 (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7057299B2 (en) * 2000-02-03 2006-06-06 Taiwan Semiconductor Manufacturing Co., Ltd. Alignment mark configuration
US6358816B1 (en) * 2000-09-05 2002-03-19 Motorola, Inc. Method for uniform polish in microelectronic device
US6614062B2 (en) * 2001-01-17 2003-09-02 Motorola, Inc. Semiconductor tiling structure and method of formation
JP4504633B2 (ja) * 2003-05-29 2010-07-14 パナソニック株式会社 半導体集積回路装置
DE50308795D1 (de) * 2003-07-23 2008-01-24 Gretag Macbeth Ag Digitaldrucker
JP2008098286A (ja) * 2006-10-10 2008-04-24 Rohm Co Ltd 半導体装置
JP4977052B2 (ja) * 2008-01-31 2012-07-18 旭化成エレクトロニクス株式会社 半導体装置
US8368136B2 (en) * 2008-07-03 2013-02-05 Taiwan Semiconductor Manufacturing Company, Ltd. Integrating a capacitor in a metal gate last process
JP5356742B2 (ja) * 2008-07-10 2013-12-04 ラピスセミコンダクタ株式会社 半導体装置、半導体装置の製造方法および半導体パッケージの製造方法
WO2021091534A1 (en) * 2019-11-05 2021-05-14 Hewlett-Packard Development Company, L.P. Printer colour deviation detection

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5665633A (en) * 1995-04-06 1997-09-09 Motorola, Inc. Process for forming a semiconductor device having field isolation
KR0155874B1 (ko) * 1995-08-31 1998-12-01 김광호 반도체장치의 평탄화방법 및 이를 이용한 소자분리방법
JP3128205B2 (ja) * 1996-03-14 2001-01-29 松下電器産業株式会社 平坦化パターンの生成方法、平坦化パターンの生成装置及び半導体集積回路装置
JP4187808B2 (ja) * 1997-08-25 2008-11-26 株式会社ルネサステクノロジ 半導体装置の製造方法
US6020616A (en) * 1998-03-31 2000-02-01 Vlsi Technology, Inc. Automated design of on-chip capacitive structures for suppressing inductive noise
JPH11330223A (ja) 1998-05-15 1999-11-30 Rohm Co Ltd 半導体装置および半導体装置の製造方法
JP2000124305A (ja) * 1998-10-15 2000-04-28 Mitsubishi Electric Corp 半導体装置
US6396158B1 (en) * 1999-06-29 2002-05-28 Motorola Inc. Semiconductor device and a process for designing a mask
JP3539549B2 (ja) * 1999-09-20 2004-07-07 シャープ株式会社 半導体装置
JP4307664B2 (ja) * 1999-12-03 2009-08-05 株式会社ルネサステクノロジ 半導体装置
JP3906005B2 (ja) * 2000-03-27 2007-04-18 株式会社東芝 半導体装置の製造方法

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Publication number Publication date
US20020000632A1 (en) 2002-01-03
JP2002016131A (ja) 2002-01-18
US6545336B2 (en) 2003-04-08

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