JP4812461B2 - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
- Publication number
- JP4812461B2 JP4812461B2 JP2006049977A JP2006049977A JP4812461B2 JP 4812461 B2 JP4812461 B2 JP 4812461B2 JP 2006049977 A JP2006049977 A JP 2006049977A JP 2006049977 A JP2006049977 A JP 2006049977A JP 4812461 B2 JP4812461 B2 JP 4812461B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- wire
- internal lead
- mark
- lead terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Description
10 アイランド
11 半導体チップ
12 内部リード端子
13 ワイヤ
14 マーク
15 封止樹脂
16 バンプ
17 外部リード端子
Claims (6)
- 半導体チップと内部リード端子とを有する半導体装置であって、
前記半導体チップと前記内部リード端子とを接続するワイヤと、
前記内部リード端子上に記され、前記ワイヤと同一の材料からなり、当該半導体装置に関する情報を示すマークと、
を備えることを特徴とする半導体装置。 - 請求項1に記載の半導体装置において、
前記マークは、複数のドットで構成されており、
前記各ドットは、前記ワイヤと同一の材料からなるバンプである半導体装置。 - 請求項1または2に記載の半導体装置において、
前記半導体チップ、前記内部リード端子および前記ワイヤを覆う不透明な封止樹脂を備える半導体装置。 - 請求項1乃至3いずれかに記載の半導体装置において、
前記マークが示す前記情報は、暗号化されている半導体装置。 - 半導体チップと内部リード端子とを有する半導体装置を製造する方法であって、
前記半導体チップと前記内部リード端子とをワイヤにより接続する工程と、
前記内部リード端子上に、前記ワイヤと同一の材料からなり、当該半導体装置に関する情報を示すマークを記す工程と、
を含むことを特徴とする半導体装置の製造方法。 - 請求項5に記載の半導体装置の製造方法において、
前記マークを記す工程においては、前記マークをワイヤボンダにて形成する半導体装置の製造方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006049977A JP4812461B2 (ja) | 2006-02-27 | 2006-02-27 | 半導体装置およびその製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006049977A JP4812461B2 (ja) | 2006-02-27 | 2006-02-27 | 半導体装置およびその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2007227842A JP2007227842A (ja) | 2007-09-06 |
JP4812461B2 true JP4812461B2 (ja) | 2011-11-09 |
Family
ID=38549318
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006049977A Expired - Fee Related JP4812461B2 (ja) | 2006-02-27 | 2006-02-27 | 半導体装置およびその製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4812461B2 (ja) |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05283544A (ja) * | 1992-03-30 | 1993-10-29 | Mitsubishi Electric Corp | 半導体パッケージ |
JPH05304177A (ja) * | 1992-04-28 | 1993-11-16 | Nec Yamagata Ltd | 半導体装置の組立システム |
JP2003124365A (ja) * | 2001-10-18 | 2003-04-25 | Oki Electric Ind Co Ltd | 半導体集積回路チップ管理情報付与方法、半導体集積回路チップ管理情報管理方法、半導体集積回路チップ管理情報付与装置および管理情報を有する半導体集積回路チップ |
JP2004087947A (ja) * | 2002-08-28 | 2004-03-18 | Mitsui High Tec Inc | リードフレームおよびリードフレームの刻印方法 |
-
2006
- 2006-02-27 JP JP2006049977A patent/JP4812461B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2007227842A (ja) | 2007-09-06 |
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