JP4806403B2 - コンフィグラブルな機能選択機構 - Google Patents
コンフィグラブルな機能選択機構 Download PDFInfo
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- JP4806403B2 JP4806403B2 JP2007515707A JP2007515707A JP4806403B2 JP 4806403 B2 JP4806403 B2 JP 4806403B2 JP 2007515707 A JP2007515707 A JP 2007515707A JP 2007515707 A JP2007515707 A JP 2007515707A JP 4806403 B2 JP4806403 B2 JP 4806403B2
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- 230000007246 mechanism Effects 0.000 title description 16
- 230000006870 function Effects 0.000 claims description 180
- 238000000034 method Methods 0.000 claims description 31
- 238000010586 diagram Methods 0.000 description 6
- 238000002438 flame photometric detection Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/10—Protecting distributed programs or content, e.g. vending or licensing of copyrighted material ; Digital rights management [DRM]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/78—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/82—Protecting input, output or interconnection devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2221/00—Indexing scheme relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F2221/21—Indexing scheme relating to G06F21/00 and subgroups addressing additional information or applications relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F2221/2101—Auditing as a secondary aspect
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Computer Security & Cryptography (AREA)
- Mathematical Physics (AREA)
- Multimedia (AREA)
- Technology Law (AREA)
- Storage Device Security (AREA)
- Logic Circuits (AREA)
- Collating Specific Patterns (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Financial Or Insurance-Related Operations Such As Payment And Settlement (AREA)
- Image Analysis (AREA)
Description
Claims (12)
- 方法であって
デバイスの機能カウント指定子レジスタに、前記デバイスで同時にイネーブルできる機能の最大数である最大許容機能数を指定する段階と、
前記デバイスの機能のイネーブルが許可されているかどうかを表す2進値を格納する前記デバイスの機能許可レジスタをチェックして、前記デバイスの機能のイネーブルが許可されているか判定する段階と、
前記デバイスの各機能をクレジット値と対応付ける段階と、
イネーブルされた全ての機能にそれぞれ対応付けられた前記クレジット値を加算する段階と、
前記デバイス上でイネーブルされた機能の総数が前記デバイスの前記指定された最大許容機能数を超えているか、前記イネーブルされた全ての機能にそれぞれ対応付けられた前記クレジット値の加算値が前記指定された最大許容機能数を超えている場合、1以上のデバイス機能をディセーブルする段階と
を含み、
前記デバイスの機能のうち少なくともいずれかの機能は、他の機能に対応付けられた前記クレジット値とは異なるクレジット値が対応づけられ、
前記デバイスの最大許容機能数は、前記デバイスの機能カウント指定子レジスタにプログラミングされた値であり、
前記機能許可レジスタおよび前記機能カウント指定子レジスタは、1度に限ってプログラミング可能であり、プログラミングされた後はそれぞれの値にすべく永久的に配線接続される
方法。 - 前記デバイス上でイネーブルされた機能の総数が前記デバイスの前記指定された最大許容機能数を超えている場合、すべてのデバイス機能をディセーブルする段階
をさらに含む請求項1に記載の方法。 - 前記最大許容機能数を示す情報を前記デバイスのレジスタに格納する段階
をさらに含む請求項1または2に記載の方法。 - 前記デバイスはI/Oコントローラハブをさらに備える
請求項1から3のいずれか一項に記載の方法。 - 前記デバイスはメモリコントローラハブをさらに備える
請求項1から4のいずれか一項に記載の方法。 - 前記デバイスは中央演算処理装置をさらに備える
請求項1から5のいずれか一項に記載の方法。 - 方法であって、
デバイス上で1以上の機能のイネーブルが許可されているかどうか指定するべく、前記デバイスの機能のイネーブルが許可されているかどうかを表す2進値を格納する前記デバイスの1以上の機能許可レジスタに、各デバイス機能と対応付けられている値をプログラミングする段階と、
前記デバイスで同時にイネーブルできる機能の最大数である最大許容機能数を指定するべく、前記デバイス上の機能カウンタレジスタに値をプログラミングする段階と、
各デバイス機能に対応付けられた前記機能許可レジスタの値によって当該機能のイネーブルが許可されている場合に、デバイス初期化における当該機能のイネーブルを可能にする段階と、
各デバイス機能をクレジット値と対応付ける段階と、
イネーブルされた全ての機能にそれぞれ対応付けられた前記クレジット値を加算する段階と、
デバイス初期化によってイネーブルされたデバイス機能の総数を計数する段階と、
前記デバイスでイネーブルされた機能の総数が前記デバイス上の前記最大許容機能数を超えているか、前記イネーブルされた全ての機能にそれぞれ対応付けられた前記クレジット値の加算値が前記最大許容機能数を超えている場合、すべてのデバイス機能をディセーブルする段階と
を含む方法。 - デバイス初期化は前記デバイスの起動シーケンスをさらに含む
請求項7に記載の方法。 - 前記デバイスはI/Oコントローラハブをさらに備える
請求項7または8に記載の方法。 - 前記デバイスはメモリコントローラハブをさらに備える
請求項7から9のいずれか一項に記載の方法。 - 前記デバイスは中央演算処理装置をさらに備える
請求項7から10のいずれか一項に記載の方法。 - 前記デバイスの各機能は、機能イネーブルレジスタの1以上のビットに対応付けられ、
前記機能イネーブルレジスタの値は、前記デバイスの各機能をイネーブルまたはディセーブルするべくシステムの初期化中に変更され、
前記デバイスの各機能に対応付けられた前記クレジット値は、各機能に対応付けられた前記機能イネーブルレジスタのビットの数によって定められる
請求項1から11のいずれか一項に記載の方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/883,518 US7636795B2 (en) | 2004-06-30 | 2004-06-30 | Configurable feature selection mechanism |
US10/883,518 | 2004-06-30 | ||
PCT/US2005/023540 WO2006005006A2 (en) | 2004-06-30 | 2005-06-28 | Configurable feature selection mechanism |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2008502057A JP2008502057A (ja) | 2008-01-24 |
JP2008502057A5 JP2008502057A5 (ja) | 2011-03-10 |
JP4806403B2 true JP4806403B2 (ja) | 2011-11-02 |
Family
ID=34982526
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007515707A Expired - Fee Related JP4806403B2 (ja) | 2004-06-30 | 2005-06-28 | コンフィグラブルな機能選択機構 |
Country Status (8)
Country | Link |
---|---|
US (1) | US7636795B2 (ja) |
JP (1) | JP4806403B2 (ja) |
KR (1) | KR100870291B1 (ja) |
CN (1) | CN1977228B (ja) |
DE (1) | DE112005001532B4 (ja) |
GB (1) | GB2429810B (ja) |
TW (1) | TWI299451B (ja) |
WO (1) | WO2006005006A2 (ja) |
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US7755582B2 (en) | 2005-02-23 | 2010-07-13 | Pixtronix, Incorporated | Display methods and apparatus |
US7405852B2 (en) * | 2005-02-23 | 2008-07-29 | Pixtronix, Inc. | Display apparatus and methods for manufacture thereof |
US9158106B2 (en) | 2005-02-23 | 2015-10-13 | Pixtronix, Inc. | Display methods and apparatus |
US7616368B2 (en) * | 2005-02-23 | 2009-11-10 | Pixtronix, Inc. | Light concentrating reflective display methods and apparatus |
US8519945B2 (en) | 2006-01-06 | 2013-08-27 | Pixtronix, Inc. | Circuits for controlling display apparatus |
US7675665B2 (en) | 2005-02-23 | 2010-03-09 | Pixtronix, Incorporated | Methods and apparatus for actuating displays |
US8310442B2 (en) | 2005-02-23 | 2012-11-13 | Pixtronix, Inc. | Circuits for controlling display apparatus |
US20070205969A1 (en) | 2005-02-23 | 2007-09-06 | Pixtronix, Incorporated | Direct-view MEMS display devices and methods for generating images thereon |
US7304786B2 (en) * | 2005-02-23 | 2007-12-04 | Pixtronix, Inc. | Methods and apparatus for bi-stable actuation of displays |
US7742016B2 (en) * | 2005-02-23 | 2010-06-22 | Pixtronix, Incorporated | Display methods and apparatus |
US8159428B2 (en) * | 2005-02-23 | 2012-04-17 | Pixtronix, Inc. | Display methods and apparatus |
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-
2004
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-
2005
- 2005-06-28 GB GB0621455A patent/GB2429810B/en not_active Expired - Fee Related
- 2005-06-28 KR KR1020067027820A patent/KR100870291B1/ko not_active IP Right Cessation
- 2005-06-28 JP JP2007515707A patent/JP4806403B2/ja not_active Expired - Fee Related
- 2005-06-28 WO PCT/US2005/023540 patent/WO2006005006A2/en active Application Filing
- 2005-06-28 DE DE112005001532T patent/DE112005001532B4/de not_active Expired - Fee Related
- 2005-06-28 CN CN2005800212875A patent/CN1977228B/zh not_active Expired - Fee Related
- 2005-06-29 TW TW094121836A patent/TWI299451B/zh not_active IP Right Cessation
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JPH0816471A (ja) * | 1994-06-30 | 1996-01-19 | Mitsubishi Electric Corp | メモリ装置及びキャッシュメモリ装置 |
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Also Published As
Publication number | Publication date |
---|---|
KR100870291B1 (ko) | 2008-11-25 |
TWI299451B (en) | 2008-08-01 |
CN1977228A (zh) | 2007-06-06 |
US7636795B2 (en) | 2009-12-22 |
JP2008502057A (ja) | 2008-01-24 |
WO2006005006A3 (en) | 2006-04-13 |
KR20070024677A (ko) | 2007-03-02 |
US20060004928A1 (en) | 2006-01-05 |
GB2429810B (en) | 2007-11-28 |
DE112005001532B4 (de) | 2010-05-20 |
WO2006005006A2 (en) | 2006-01-12 |
GB2429810A (en) | 2007-03-07 |
GB0621455D0 (en) | 2006-12-13 |
CN1977228B (zh) | 2011-06-08 |
TW200608262A (en) | 2006-03-01 |
DE112005001532T5 (de) | 2007-05-10 |
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