JP4763716B2 - 回路評価のための方法、システム及びプログラム - Google Patents

回路評価のための方法、システム及びプログラム Download PDF

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Publication number
JP4763716B2
JP4763716B2 JP2007544553A JP2007544553A JP4763716B2 JP 4763716 B2 JP4763716 B2 JP 4763716B2 JP 2007544553 A JP2007544553 A JP 2007544553A JP 2007544553 A JP2007544553 A JP 2007544553A JP 4763716 B2 JP4763716 B2 JP 4763716B2
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Prior art keywords
design data
adjustment
circuit
window
sample
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Japanese (ja)
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JP2008523470A5 (enExample
JP2008523470A (ja
Inventor
クック、ミシェル、ケー
アーチャンボールト、ブルース、アール
ゲイツ、チャールズ、アール
スコット、デリック、ディー
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International Business Machines Corp
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International Business Machines Corp
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
JP2007544553A 2004-12-07 2005-12-05 回路評価のための方法、システム及びプログラム Expired - Fee Related JP4763716B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/904,950 2004-12-07
US10/904,950 US7240310B2 (en) 2004-12-07 2004-12-07 Method, system and program product for evaluating a circuit
PCT/US2005/043690 WO2006062827A2 (en) 2004-12-07 2005-12-05 Method, system and program product for evaluating a circuit

Publications (3)

Publication Number Publication Date
JP2008523470A JP2008523470A (ja) 2008-07-03
JP2008523470A5 JP2008523470A5 (enExample) 2008-10-09
JP4763716B2 true JP4763716B2 (ja) 2011-08-31

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JP2007544553A Expired - Fee Related JP4763716B2 (ja) 2004-12-07 2005-12-05 回路評価のための方法、システム及びプログラム

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Country Link
US (1) US7240310B2 (enExample)
JP (1) JP4763716B2 (enExample)
CN (1) CN101375282B (enExample)
TW (1) TW200632701A (enExample)
WO (1) WO2006062827A2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8949102B2 (en) 2011-02-24 2015-02-03 Cadence Design Systems, Inc. Method and system for power delivery network analysis

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8630917B2 (en) * 2005-06-09 2014-01-14 At&T Intellectual Property Ii, L.P. Arrangement for guiding user design of comprehensive product solution using on-the-fly data validation
CN101122622B (zh) * 2006-08-09 2011-05-04 鸿富锦精密工业（深圳）有限公司 信号线分支线段长度检查系统及方法
US8032338B2 (en) 2008-06-13 2011-10-04 Power Integrations, Inc. Method and apparatus for design of a power supply
US8689169B2 (en) 2010-07-24 2014-04-01 Cadence Design Systems, Inc. Method, apparatus, and article of manufacture for providing in situ, customizable information in designing electronic circuits with electrical awareness
US8782577B2 (en) * 2010-07-24 2014-07-15 Cadence Design Systems, Inc. Method, apparatus, and article of manufacture for providing in situ, customizable information in designing electronic circuits with electrical awareness
CN102651038B (zh) * 2011-02-24 2015-06-17 益华公司 用于电力输送网络分析的方法和系统
JP5182973B1 (ja) * 2011-10-19 2013-04-17 三菱航空機株式会社 配線の接続確認システム
DE102015108244A1 (de) * 2014-06-06 2015-12-10 Synopsys, Inc. Verfahren und system zum generieren eines schaltungsentwurfs, verfahren zum kalibrieren einer inspektionsvorrichtung, und verfahren zur prozesssteuerung und zum ertragsmanagement
CN112084294B (zh) * 2020-09-14 2022-07-26 重庆长安新能源汽车科技有限公司 一种基于人工智能的整车电磁兼容分级管理方法
WO2022183490A1 (en) * 2021-03-05 2022-09-09 Paypal, Inc. Software process modification platform for compliance

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JPH11120215A (ja) * 1997-10-14 1999-04-30 Mitsubishi Electric Corp 最適解探索支援装置
JP2002259481A (ja) * 2000-05-11 2002-09-13 Fujitsu Ltd ノイズ対策決定方法及び装置、記憶媒体並びにコンピュータプログラム

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EP0186874B1 (en) 1984-12-26 1994-06-08 Hitachi, Ltd. Method of and apparatus for checking geometry of multi-layer patterns for IC structures
US5062054A (en) 1988-03-10 1991-10-29 Matsushita Electric Industrial Co., Ltd. Layout pattern generation and geometric processing system for LSI circuits
US5051938A (en) 1989-06-23 1991-09-24 Hyduke Stanley M Simulation of selected logic circuit designs
DE69427417T2 (de) 1993-03-08 2002-05-29 Koninklijke Philips Electronics N.V., Eindhoven PCB-Simulation auf der Basis von reduzierten Ersatzschaltungen
US5774367A (en) * 1995-07-24 1998-06-30 Motorola, Inc. Method of selecting device threshold voltages for high speed and low power
JP2874628B2 (ja) * 1996-01-30 1999-03-24 日本電気株式会社 論理回路の最適化装置及びその方法
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JP2000029920A (ja) 1998-07-13 2000-01-28 Mitsubishi Electric Corp シミュレーション装置、シミュレーション方法およびシミュレーションプログラムを記録した媒体
US6321186B1 (en) * 1999-05-03 2001-11-20 Motorola, Inc. Method and apparatus for integrated circuit design verification
AU7091600A (en) 1999-08-31 2001-03-26 Sun Microsystems, Inc. A system and method for analyzing simultaneous switching noise
US6651228B1 (en) * 2000-05-08 2003-11-18 Real Intent, Inc. Intent-driven functional verification of digital designs
US6425113B1 (en) * 2000-06-13 2002-07-23 Leigh C. Anderson Integrated verification and manufacturability tool
US6834380B2 (en) * 2000-08-03 2004-12-21 Qualcomm, Incorporated Automated EMC-driven layout and floor planning of electronic devices and systems
JP2002073719A (ja) * 2000-08-31 2002-03-12 Hitachi Ltd 回路動作モデル記述の生成方法および論理設計検証装置
JP2002108960A (ja) 2000-10-03 2002-04-12 Fujitsu Ltd 配置・配線処理システム
US6915501B2 (en) 2001-01-19 2005-07-05 Cadence Design Systems, Inc. LP method and apparatus for identifying routes
JP4499938B2 (ja) 2001-02-19 2010-07-14 富士通株式会社 素子モデル自動修正プログラム、素子モデル自動修正装置および素子モデル自動修正方法
JP2002259478A (ja) * 2001-02-28 2002-09-13 Nec Corp 統合デジタル回路設計システム及び設計方法
CN1258729C (zh) * 2003-11-14 2006-06-07 清华大学 基于虚拟模块的大规模混合模式布图方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11120215A (ja) * 1997-10-14 1999-04-30 Mitsubishi Electric Corp 最適解探索支援装置
JP2002259481A (ja) * 2000-05-11 2002-09-13 Fujitsu Ltd ノイズ対策決定方法及び装置、記憶媒体並びにコンピュータプログラム

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8949102B2 (en) 2011-02-24 2015-02-03 Cadence Design Systems, Inc. Method and system for power delivery network analysis

Also Published As

Publication number Publication date
TW200632701A (en) 2006-09-16
US20060123364A1 (en) 2006-06-08
WO2006062827A2 (en) 2006-06-15
CN101375282A (zh) 2009-02-25
JP2008523470A (ja) 2008-07-03
CN101375282B (zh) 2010-12-01
US7240310B2 (en) 2007-07-03
WO2006062827A3 (en) 2008-10-16

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