TW200632701A - Method, system and program product for evaluating a circuit - Google Patents

Method, system and program product for evaluating a circuit

Info

Publication number
TW200632701A
TW200632701A TW094141587A TW94141587A TW200632701A TW 200632701 A TW200632701 A TW 200632701A TW 094141587 A TW094141587 A TW 094141587A TW 94141587 A TW94141587 A TW 94141587A TW 200632701 A TW200632701 A TW 200632701A
Authority
TW
Taiwan
Prior art keywords
circuit
design data
evaluating
program product
user
Prior art date
Application number
TW094141587A
Other languages
English (en)
Chinese (zh)
Inventor
Bruce R Archambeault
Michelle K Cook
Charles R Gates
Derrick D Scott
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of TW200632701A publication Critical patent/TW200632701A/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
TW094141587A 2004-12-07 2005-11-25 Method, system and program product for evaluating a circuit TW200632701A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/904,950 US7240310B2 (en) 2004-12-07 2004-12-07 Method, system and program product for evaluating a circuit

Publications (1)

Publication Number Publication Date
TW200632701A true TW200632701A (en) 2006-09-16

Family

ID=36575834

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094141587A TW200632701A (en) 2004-12-07 2005-11-25 Method, system and program product for evaluating a circuit

Country Status (5)

Country Link
US (1) US7240310B2 (enExample)
JP (1) JP4763716B2 (enExample)
CN (1) CN101375282B (enExample)
TW (1) TW200632701A (enExample)
WO (1) WO2006062827A2 (enExample)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8630917B2 (en) * 2005-06-09 2014-01-14 At&T Intellectual Property Ii, L.P. Arrangement for guiding user design of comprehensive product solution using on-the-fly data validation
CN101122622B (zh) * 2006-08-09 2011-05-04 鸿富锦精密工业（深圳）有限公司 信号线分支线段长度检查系统及方法
US8032338B2 (en) 2008-06-13 2011-10-04 Power Integrations, Inc. Method and apparatus for design of a power supply
US8694950B2 (en) 2010-07-24 2014-04-08 Cadence Design Systems, Inc. Methods, systems, and articles of manufacture for implementing electronic circuit designs with electrical awareness
US8782577B2 (en) * 2010-07-24 2014-07-15 Cadence Design Systems, Inc. Method, apparatus, and article of manufacture for providing in situ, customizable information in designing electronic circuits with electrical awareness
US8539422B2 (en) 2011-02-24 2013-09-17 Cadence Design Systems, Inc. Method and system for power delivery network analysis
CN102651038B (zh) * 2011-02-24 2015-06-17 益华公司 用于电力输送网络分析的方法和系统
JP5182973B1 (ja) * 2011-10-19 2013-04-17 三菱航空機株式会社 配線の接続確認システム
DE102015108244A1 (de) * 2014-06-06 2015-12-10 Synopsys, Inc. Verfahren und system zum generieren eines schaltungsentwurfs, verfahren zum kalibrieren einer inspektionsvorrichtung, und verfahren zur prozesssteuerung und zum ertragsmanagement
CN112084294B (zh) * 2020-09-14 2022-07-26 重庆长安新能源汽车科技有限公司 一种基于人工智能的整车电磁兼容分级管理方法
WO2022183490A1 (en) * 2021-03-05 2022-09-09 Paypal, Inc. Software process modification platform for compliance

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US4488354A (en) 1981-11-16 1984-12-18 Ncr Corporation Method for simulating and testing an integrated circuit chip
EP0186874B1 (en) 1984-12-26 1994-06-08 Hitachi, Ltd. Method of and apparatus for checking geometry of multi-layer patterns for IC structures
US5062054A (en) 1988-03-10 1991-10-29 Matsushita Electric Industrial Co., Ltd. Layout pattern generation and geometric processing system for LSI circuits
US5051938A (en) 1989-06-23 1991-09-24 Hyduke Stanley M Simulation of selected logic circuit designs
DE69427417T2 (de) 1993-03-08 2002-05-29 Koninklijke Philips Electronics N.V., Eindhoven PCB-Simulation auf der Basis von reduzierten Ersatzschaltungen
US5774367A (en) * 1995-07-24 1998-06-30 Motorola, Inc. Method of selecting device threshold voltages for high speed and low power
JP2874628B2 (ja) * 1996-01-30 1999-03-24 日本電気株式会社 論理回路の最適化装置及びその方法
US6090151A (en) * 1997-07-01 2000-07-18 Motorola, Inc. Electronic device parameter estimator and method therefor
JPH11120215A (ja) * 1997-10-14 1999-04-30 Mitsubishi Electric Corp 最適解探索支援装置
US6212490B1 (en) 1998-06-24 2001-04-03 S3 Incorporated Hybrid circuit model simulator for accurate timing and noise analysis
JP2000029920A (ja) 1998-07-13 2000-01-28 Mitsubishi Electric Corp シミュレーション装置、シミュレーション方法およびシミュレーションプログラムを記録した媒体
US6321186B1 (en) * 1999-05-03 2001-11-20 Motorola, Inc. Method and apparatus for integrated circuit design verification
WO2001017111A1 (en) 1999-08-31 2001-03-08 Sun Microsystems, Inc. A system and method for analyzing simultaneous switching noise
US6651228B1 (en) * 2000-05-08 2003-11-18 Real Intent, Inc. Intent-driven functional verification of digital designs
JP2002259481A (ja) * 2000-05-11 2002-09-13 Fujitsu Ltd ノイズ対策決定方法及び装置、記憶媒体並びにコンピュータプログラム
US6425113B1 (en) * 2000-06-13 2002-07-23 Leigh C. Anderson Integrated verification and manufacturability tool
US6834380B2 (en) * 2000-08-03 2004-12-21 Qualcomm, Incorporated Automated EMC-driven layout and floor planning of electronic devices and systems
JP2002073719A (ja) * 2000-08-31 2002-03-12 Hitachi Ltd 回路動作モデル記述の生成方法および論理設計検証装置
JP2002108960A (ja) 2000-10-03 2002-04-12 Fujitsu Ltd 配置・配線処理システム
US6915501B2 (en) 2001-01-19 2005-07-05 Cadence Design Systems, Inc. LP method and apparatus for identifying routes
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JP2002259478A (ja) * 2001-02-28 2002-09-13 Nec Corp 統合デジタル回路設計システム及び設計方法
CN1258729C (zh) * 2003-11-14 2006-06-07 清华大学 基于虚拟模块的大规模混合模式布图方法

Also Published As

Publication number Publication date
WO2006062827A3 (en) 2008-10-16
CN101375282B (zh) 2010-12-01
CN101375282A (zh) 2009-02-25
JP2008523470A (ja) 2008-07-03
WO2006062827A2 (en) 2006-06-15
JP4763716B2 (ja) 2011-08-31
US20060123364A1 (en) 2006-06-08
US7240310B2 (en) 2007-07-03

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