JP4736997B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP4736997B2 JP4736997B2 JP2006208058A JP2006208058A JP4736997B2 JP 4736997 B2 JP4736997 B2 JP 4736997B2 JP 2006208058 A JP2006208058 A JP 2006208058A JP 2006208058 A JP2006208058 A JP 2006208058A JP 4736997 B2 JP4736997 B2 JP 4736997B2
- Authority
- JP
- Japan
- Prior art keywords
- insulating substrate
- semiconductor element
- solder layer
- detection unit
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Description
Claims (2)
- 絶縁基板と、
前記絶縁基板上で第1の半田層により固着された半導体素子と、
前記絶縁基板上に前記半導体素子と離間して設けられ、前記第1の半田層に発生するクラックの状態をモニタするための検知部とを有し、
前記検知部は、線膨張係数の異なる複数層の抵抗部材と、これらの抵抗部材間を固着した第2の半田層とを含み、
前記半導体素子の通電開始後に前記検知部の両端の抵抗値が検出され、前記検知部の前記第2の半田層に発生するクラックの状態に応じて、前記第1の半田層に発生するクラックの状態がモニタされることを特徴とする半導体装置。 - 前記絶縁基板は放熱板上に設けられ、
前記放熱板および前記絶縁基板は、第3の半田層により固着されていることを特徴とする請求項1に記載の半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006208058A JP4736997B2 (ja) | 2006-07-31 | 2006-07-31 | 半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006208058A JP4736997B2 (ja) | 2006-07-31 | 2006-07-31 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2008034707A JP2008034707A (ja) | 2008-02-14 |
JP4736997B2 true JP4736997B2 (ja) | 2011-07-27 |
Family
ID=39123807
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006208058A Expired - Fee Related JP4736997B2 (ja) | 2006-07-31 | 2006-07-31 | 半導体装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4736997B2 (ja) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4703702B2 (ja) * | 2008-09-17 | 2011-06-15 | 株式会社東芝 | 損傷指標予測システムおよび損傷指標予測方法 |
JP5355149B2 (ja) * | 2009-03-02 | 2013-11-27 | 株式会社東芝 | 電子機器および、電子機器を用いた電子部品の接続不良検出方法 |
JP2011252842A (ja) * | 2010-06-03 | 2011-12-15 | Hitachi Ltd | 素子寿命予測方法及び素子寿命予測機能を備えた回路基板 |
JP5696628B2 (ja) * | 2011-09-16 | 2015-04-08 | 富士電機株式会社 | 高圧モジュール |
EP3226014B1 (en) * | 2016-03-30 | 2024-01-10 | Mitsubishi Electric R&D Centre Europe B.V. | Method for estimating a level of damage or a lifetime expectation of a power semiconductor module comprising at least one die |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3799792B2 (ja) * | 1998-01-27 | 2006-07-19 | 三菱電機株式会社 | 半導体装置 |
-
2006
- 2006-07-31 JP JP2006208058A patent/JP4736997B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2008034707A (ja) | 2008-02-14 |
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