JP4732596B2 - 連想メモリ装置 - Google Patents
連想メモリ装置 Download PDFInfo
- Publication number
- JP4732596B2 JP4732596B2 JP2001011005A JP2001011005A JP4732596B2 JP 4732596 B2 JP4732596 B2 JP 4732596B2 JP 2001011005 A JP2001011005 A JP 2001011005A JP 2001011005 A JP2001011005 A JP 2001011005A JP 4732596 B2 JP4732596 B2 JP 4732596B2
- Authority
- JP
- Japan
- Prior art keywords
- line
- match
- search
- potential
- bit line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
- G11C15/04—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
Landscapes
- Static Random-Access Memory (AREA)
- Dram (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001011005A JP4732596B2 (ja) | 2000-03-03 | 2001-01-19 | 連想メモリ装置 |
| US09/795,139 US6400594B2 (en) | 2000-03-03 | 2001-03-01 | Content addressable memory with potentials of search bit line and/or match line set as intermediate potential between power source potential and ground potential |
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000058569 | 2000-03-03 | ||
| JP2000-58569 | 2000-03-03 | ||
| JP2000058569 | 2000-03-03 | ||
| JP2001011005A JP4732596B2 (ja) | 2000-03-03 | 2001-01-19 | 連想メモリ装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2001319481A JP2001319481A (ja) | 2001-11-16 |
| JP2001319481A5 JP2001319481A5 (enExample) | 2008-02-28 |
| JP4732596B2 true JP4732596B2 (ja) | 2011-07-27 |
Family
ID=26586715
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001011005A Expired - Fee Related JP4732596B2 (ja) | 2000-03-03 | 2001-01-19 | 連想メモリ装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6400594B2 (enExample) |
| JP (1) | JP4732596B2 (enExample) |
Families Citing this family (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CA2277717C (en) * | 1999-07-12 | 2006-12-05 | Mosaid Technologies Incorporated | Circuit and method for multiple match detection in content addressable memories |
| CA2307240C (en) | 2000-05-01 | 2011-04-12 | Mosaid Technologies Incorporated | Matchline sense circuit and method |
| JP2001357678A (ja) * | 2000-06-16 | 2001-12-26 | Hitachi Ltd | 半導体集積回路装置 |
| CA2313275C (en) * | 2000-06-30 | 2006-10-17 | Mosaid Technologies Incorporated | Searchline control circuit and power reduction method |
| US6822886B2 (en) * | 2001-09-24 | 2004-11-23 | Micron Technology, Inc. | Reducing signal swing in a match detection circuit |
| KR100406924B1 (ko) * | 2001-10-12 | 2003-11-21 | 삼성전자주식회사 | 내용 주소화 메모리 셀 |
| US6584003B1 (en) * | 2001-12-28 | 2003-06-24 | Mosaid Technologies Incorporated | Low power content addressable memory architecture |
| JP2003242784A (ja) * | 2002-02-15 | 2003-08-29 | Kawasaki Microelectronics Kk | 連想メモリ装置 |
| US6760241B1 (en) * | 2002-10-18 | 2004-07-06 | Netlogic Microsystems, Inc. | Dynamic random access memory (DRAM) based content addressable memory (CAM) cell |
| US7006368B2 (en) * | 2002-11-07 | 2006-02-28 | Mosaid Technologies Incorporated | Mismatch-dependent power allocation technique for match-line sensing in content-addressable memories |
| JP2004355760A (ja) * | 2003-05-30 | 2004-12-16 | Renesas Technology Corp | データ記憶回路 |
| US7126834B1 (en) * | 2003-09-12 | 2006-10-24 | Netlogic Microsystems, Inc. | Sense amplifier architecture for content addressable memory device |
| JPWO2005050663A1 (ja) | 2003-11-21 | 2007-08-23 | 株式会社日立製作所 | 半導体集積回路装置 |
| JP4901288B2 (ja) * | 2006-04-25 | 2012-03-21 | ルネサスエレクトロニクス株式会社 | 内容参照メモリ |
| US20070247885A1 (en) | 2006-04-25 | 2007-10-25 | Renesas Technology Corp. | Content addressable memory |
| US7586771B2 (en) * | 2006-09-11 | 2009-09-08 | Jinn-Shyan Wang | Tree-style and-type match circuit device applied to content addressable memory |
| US8358524B1 (en) | 2007-06-29 | 2013-01-22 | Netlogic Microsystems, Inc. | Methods and circuits for limiting bit line leakage current in a content addressable memory (CAM) device |
| JP5064171B2 (ja) * | 2007-10-31 | 2012-10-31 | ルネサスエレクトロニクス株式会社 | 連想記憶装置 |
| JP5477621B2 (ja) * | 2009-08-03 | 2014-04-23 | ルネサスエレクトロニクス株式会社 | 連想メモリ |
| US8130579B2 (en) * | 2009-12-21 | 2012-03-06 | Stmicroelectronics Pvt. Ltd. | Memory device and method of operation thereof |
| US9564183B2 (en) * | 2014-11-26 | 2017-02-07 | Invecas, Inc. | Sense amplifier having a timing circuit for a presearch and a main search |
| US9640250B1 (en) * | 2016-05-16 | 2017-05-02 | Qualcomm Incorporated | Efficient compare operation |
| US10910056B2 (en) * | 2018-02-22 | 2021-02-02 | Renesas Electronics Corporation | Semiconductor device |
| CN112259147B (zh) * | 2020-10-21 | 2021-09-10 | 海光信息技术股份有限公司 | 内容可寻址存储器、阵列及处理器系统 |
| US12399622B2 (en) * | 2023-10-11 | 2025-08-26 | Macronix International Co., Ltd. | High-level architecture for 3D-NAND based in-memory search |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR0135699B1 (ko) * | 1994-07-11 | 1998-04-24 | 김주용 | 셀프-리프레쉬 가능한 듀얼포트 동적 캠셀 및 리프레쉬장치 |
| JP3117375B2 (ja) * | 1994-11-28 | 2000-12-11 | インターナショナル・ビジネス・マシーンズ・コーポレ−ション | 連想メモリの制御回路及び連想メモリ装置 |
| US5659697A (en) * | 1994-12-14 | 1997-08-19 | International Business Machines Corporation | Translation lookaside buffer for faster processing in response to availability of a first virtual address portion before a second virtual address portion |
| JPH08212791A (ja) * | 1995-02-03 | 1996-08-20 | Kawasaki Steel Corp | 連想メモリ装置 |
| JP3769784B2 (ja) * | 1995-09-05 | 2006-04-26 | 株式会社ルネサステクノロジ | 半導体メモリ装置とそれを用いたマイクロコンピュータ |
| JPH09198878A (ja) * | 1996-01-16 | 1997-07-31 | Mitsubishi Electric Corp | 半導体記憶装置 |
| US5752260A (en) * | 1996-04-29 | 1998-05-12 | International Business Machines Corporation | High-speed, multiple-port, interleaved cache with arbitration of multiple access addresses |
| US5852569A (en) * | 1997-05-20 | 1998-12-22 | Quality Semiconductor, Inc. | Content addressable memory multiple match detection circuit |
| JPH11283378A (ja) * | 1997-11-26 | 1999-10-15 | Texas Instr Inc <Ti> | 内容アドレス・メモリ |
| CA2266062C (en) * | 1999-03-31 | 2004-03-30 | Peter Gillingham | Dynamic content addressable memory cell |
| CA2277717C (en) * | 1999-07-12 | 2006-12-05 | Mosaid Technologies Incorporated | Circuit and method for multiple match detection in content addressable memories |
-
2001
- 2001-01-19 JP JP2001011005A patent/JP4732596B2/ja not_active Expired - Fee Related
- 2001-03-01 US US09/795,139 patent/US6400594B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2001319481A (ja) | 2001-11-16 |
| US6400594B2 (en) | 2002-06-04 |
| US20010026464A1 (en) | 2001-10-04 |
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