JP4697315B2 - プラズマ処理方法 - Google Patents

プラズマ処理方法 Download PDF

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Publication number
JP4697315B2
JP4697315B2 JP2009033349A JP2009033349A JP4697315B2 JP 4697315 B2 JP4697315 B2 JP 4697315B2 JP 2009033349 A JP2009033349 A JP 2009033349A JP 2009033349 A JP2009033349 A JP 2009033349A JP 4697315 B2 JP4697315 B2 JP 4697315B2
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JP
Japan
Prior art keywords
substrate
processed
plasma processing
plasma
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2009033349A
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English (en)
Japanese (ja)
Other versions
JP2009105468A (ja
JP2009105468A5 (enExample
Inventor
義弘 柳
一郎 中山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP2009033349A priority Critical patent/JP4697315B2/ja
Publication of JP2009105468A publication Critical patent/JP2009105468A/ja
Publication of JP2009105468A5 publication Critical patent/JP2009105468A5/ja
Application granted granted Critical
Publication of JP4697315B2 publication Critical patent/JP4697315B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31127Etching organic layers
    • H01L21/31133Etching organic layers by chemical means
    • H01L21/31138Etching organic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)
JP2009033349A 2003-03-18 2009-02-17 プラズマ処理方法 Expired - Fee Related JP4697315B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009033349A JP4697315B2 (ja) 2003-03-18 2009-02-17 プラズマ処理方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2003073861 2003-03-18
JP2003073861 2003-03-18
JP2009033349A JP4697315B2 (ja) 2003-03-18 2009-02-17 プラズマ処理方法

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2004069155A Division JP4598416B2 (ja) 2003-03-18 2004-03-11 プラズマ処理方法

Publications (3)

Publication Number Publication Date
JP2009105468A JP2009105468A (ja) 2009-05-14
JP2009105468A5 JP2009105468A5 (enExample) 2010-11-18
JP4697315B2 true JP4697315B2 (ja) 2011-06-08

Family

ID=34131323

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009033349A Expired - Fee Related JP4697315B2 (ja) 2003-03-18 2009-02-17 プラズマ処理方法

Country Status (2)

Country Link
US (1) US7205250B2 (enExample)
JP (1) JP4697315B2 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050287814A1 (en) * 2004-06-29 2005-12-29 Taiwan Semiconductor Manufacturing Co., Ltd. H2O plasma for simultaneous resist removal and charge releasing
US20060199393A1 (en) * 2004-06-29 2006-09-07 Taiwan Semiconductor Manufacturing Co., Ltd. H20 plasma and h20 vapor methods for releasing charges
US20060175290A1 (en) * 2005-02-09 2006-08-10 Taiwan Semiconductor Manufacturing Company, Ltd. Photo resist stripping and de-charge method for metal post etching to prevent metal corrosion
US20080129302A1 (en) * 2006-11-30 2008-06-05 Cyrus Shafai Microelectromechanical Electric Potential Sensor
JP6333302B2 (ja) * 2016-03-30 2018-05-30 株式会社日立国際電気 半導体装置の製造方法、基板処理装置およびプログラム

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05226292A (ja) * 1992-02-13 1993-09-03 Tokyo Electron Yamanashi Kk プラズマ処理開始方法
JP3170849B2 (ja) 1992-03-31 2001-05-28 松下電器産業株式会社 ドライエッチング方法
JP3227812B2 (ja) 1992-07-28 2001-11-12 松下電器産業株式会社 ドライエッチング方法
JPH06216060A (ja) * 1993-01-12 1994-08-05 Tokyo Electron Ltd 真空処理方法
JP3173691B2 (ja) 1993-10-04 2001-06-04 東京エレクトロン株式会社 プラズマ処理装置
JPH11274138A (ja) * 1998-03-19 1999-10-08 Hitachi Ltd 試料処理方法
JP2001135618A (ja) * 1999-11-04 2001-05-18 Sharp Corp ドライエッチング装置
JP2001351905A (ja) * 2000-06-09 2001-12-21 Denso Corp ドライエッチング方法及びこの方法に用いるドライエッチング装置
US7247252B2 (en) * 2002-06-20 2007-07-24 Taiwan Semiconductor Manufacturing Co., Ltd. Method of avoiding plasma arcing during RIE etching
JP4322484B2 (ja) * 2002-08-30 2009-09-02 東京エレクトロン株式会社 プラズマ処理方法及びプラズマ処理装置
US6703317B1 (en) * 2003-01-30 2004-03-09 Taiwan Semiconductor Manufacturing Co., Ltd Method to neutralize charge imbalance following a wafer cleaning process

Also Published As

Publication number Publication date
JP2009105468A (ja) 2009-05-14
US20050037629A1 (en) 2005-02-17
US7205250B2 (en) 2007-04-17

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