JP4689150B2 - Semiconductor circuit and manufacturing method thereof - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor element formed using a semiconductor film having a crystal structure (also referred to as a crystalline semiconductor film), a manufacturing method thereof, a semiconductor integrated circuit including a circuit in which the semiconductor element is integrated, and a manufacturing method thereof. About. The present invention also relates to a semiconductor device including a plurality of semiconductor integrated circuits. In particular, the present invention relates to a thin film transistor in which a channel formation region is formed using a crystalline semiconductor film formed over an insulating surface as a semiconductor element.
[0002]
[Prior art]
A technique for forming a semiconductor element such as a thin film transistor using a crystalline semiconductor film formed on an insulating substrate such as glass has been developed. A thin film transistor manufactured using a crystalline semiconductor film is applied to a semiconductor integrated circuit, and the semiconductor integrated circuit is used for a flat display device (flat panel display) represented by a liquid crystal display device and an EL (electroluminescence) display device. Has been.
[0003]
There is a current mirror circuit as a basic circuit of a semiconductor integrated circuit having the thin film transistor. The current mirror circuit is premised on having two thin film transistors having the same electrical characteristics, and examples of such a circuit configuration include an operational amplifier and a differential amplifier circuit.
[0004]
As a method for forming a crystalline semiconductor film on an insulating substrate, a technique for crystallizing an amorphous semiconductor film by irradiating a laser beam has been developed. In a semiconductor manufacturing process such as a technique for crystallizing an amorphous semiconductor film by irradiating this laser light, a laser light source is a gas laser represented by an excimer laser or a solid laser represented by a YAG laser. Is usually used. An example of crystallization of an amorphous semiconductor film by laser light irradiation is that the scanning speed of the laser light is set to a beam spot diameter x 5000 / second or more without causing the amorphous semiconductor film to be in a completely molten state by high-speed scanning. Some are polycrystallized (see Patent Document 1). In addition, a technique is disclosed in which a single crystal region is substantially formed by irradiating an extended laser beam onto an island-shaped semiconductor film (see Patent Document 2). Or the method of processing and irradiating a beam linearly with an optical system like a laser processing apparatus is known (refer patent document 3).
[0005]
Further, as disclosed in Nd: YVO _Four Using a solid-state laser oscillation device such as a laser, the amorphous semiconductor film is irradiated with laser light, which is the second harmonic, to form a crystalline semiconductor film having a larger crystal grain size than before, and a transistor is manufactured. A technique is disclosed (see Patent Document 4).
[0006]
[Patent Document 1]
JP 62-104117 A
[Patent Document 2]
US Patent 4,330,363 Specification
[Patent Document 3]
JP-A-8-195357
[Patent Document 4]
JP 2001-144027 A
[0007]
[Problems to be solved by the invention]
However, when an amorphous semiconductor film is crystallized by irradiating it with laser light, the crystal becomes polycrystalline, and it is difficult to obtain a crystal with uniform crystallinity and orientation by arbitrarily forming defects such as grain boundaries. Met. As a result, even when a semiconductor element of the same size is manufactured and a similar voltage is applied to the semiconductor element, the current value or the like may vary.
[0008]
In addition, crystal defects are included in the crystal grain boundaries, which become carrier traps and cause a decrease in electron or hole mobility. In addition, a semiconductor film free from strain or crystal defects could not be formed due to volume shrinkage of the semiconductor film accompanying crystallization, thermal stress with the base, or lattice mismatch. This distortion and crystal defect not only cause variations in the electrical characteristics of the semiconductor element, but also cause inferior electrical characteristics of the semiconductor element.
[0009]
In particular, when a crystalline semiconductor film is formed using laser light on an alkali-free glass substrate that is widely used in industry, the focus of the laser light varies due to the influence of the undulation of the alkali-free glass substrate itself. However, there is a problem that the crystallinity varies. Furthermore, in order to avoid contamination by alkali metals, non-alkali glass substrates need to be provided with a protective film such as an insulating film as a base film, on which a crystalline semiconductor film from which crystal grain boundaries and crystal defects are eliminated is formed. It was almost impossible to do.
[0010]
Since a semiconductor integrated circuit or the like forms a transistor by forming a semiconductor film on an inexpensive glass substrate, it is almost impossible to dispose the transistor so as to avoid an arbitrarily formed crystal grain boundary. In other words, the crystallinity of the channel formation region of the transistor is strictly controlled, and crystal grain boundaries and crystal defects that are unintentionally included cannot be excluded, which causes variations in electrical characteristics of semiconductor elements. Oops. For this reason, it has been difficult to form a circuit (for example, a current mirror circuit) that requires high matching.
[0011]
The present invention has been made in view of the above problems, and an object of the present invention is to provide a method for forming a channel formation region from a crystalline semiconductor film with uniform crystallinity.
[0012]
Also, a semiconductor integrated circuit having high characteristics can be provided by forming a plurality of semiconductor elements that require consistency from a crystalline semiconductor film with uniform crystallinity, providing a semiconductor circuit with little variation between the semiconductor elements. Is an issue.
[0013]
It is another object of the present invention to provide a semiconductor circuit with small variation among a plurality of analog circuits (for example, analog switch circuits).
[0014]
In addition, a semiconductor element or a semiconductor element group having a high current drive capability capable of high-speed operation is formed by designating a region where the channel formation region is formed and forming a crystalline semiconductor region in which no crystal grain boundary exists. It is an object of the present invention to provide a semiconductor integrated circuit constituted by:
[0015]
[Means for Solving the Problems]
In order to solve the above problems, the present invention forms an insulating film provided with concave portions and convex portions formed as a linear stripe pattern (stripe shape) on a substrate having an insulating surface, and the insulating film An amorphous semiconductor film is formed thereon, and a stripe-shaped crystalline semiconductor film obtained by melting and crystallizing a semiconductor film in a portion corresponding to a recess (hereinafter simply referred to as a recess) of the insulating film is obtained. To do. The striped crystalline semiconductor film of the same line is patterned to form an island-shaped semiconductor film including a channel formation region made of a striped crystalline semiconductor film.
[0016]
Further, the present invention relates to a crystalline semiconductor having a channel forming region in the same line in a part or all of thin film transistors constituting an analog circuit such as a current mirror circuit, a differential amplifier circuit, or an operational amplifier circuit that requires high consistency in a semiconductor element. It has a film. The high matching here is a thin film transistor with reduced variation, that is, the thin film transistor has good matching.
[0017]
The present invention also relates to a channel formation region of at least a thin film transistor having the same polarity among thin film transistors constituting an analog circuit, or a thin film transistor sharing at least a gate electrode among thin film transistors constituting an analog circuit (that is, electrically connected to the same gate electrode). Channel forming regions of thin film transistors connected to the same line are formed on the same line. According to the present invention, in an analog circuit to which a plurality of input signals are applied, channel forming regions of thin-film transistors having the same polarity having gate electrodes to which the input signals are applied are formed on the same line.
[0018]
Further, the invention is characterized in that a plurality of adjacent analog circuits are formed from an island-shaped semiconductor film obtained by patterning a crystalline semiconductor film on the same line. That is, the present invention is characterized in that, in an analog switch or a source follower which is a specific analog circuit, channel forming regions of thin film transistors of adjacent circuits are formed from crystalline semiconductor films on the same line.
[0019]
For example, in the case where a plurality of analog switches each including an n-channel thin film transistor and a p-channel thin film transistor are provided, a channel forming region of the n-channel thin film transistor constituting each analog switch is formed from a crystalline semiconductor film on the same line, and a p-channel A channel formation region of the thin film transistor is formed from a crystalline semiconductor film on the same line.
[0020]
Thus, the analog circuit of the present invention having the crystalline semiconductor film of the same line as the channel formation region of the thin film transistor can be expected to have high characteristics.
[0021]
As means for crystallizing the semiconductor film of the present invention, pulsed oscillation or continuous oscillation laser light using a gas laser oscillation device or a solid laser oscillation device as a light source is applied. The laser light to be irradiated is focused linearly by the optical system, and its intensity distribution has a uniform region in the longitudinal direction and may have a distribution in the lateral direction. As the laser oscillator to be used, a rectangular beam solid-state laser oscillator is applied, and a slab laser oscillator is particularly preferably applied. Alternatively, it is a solid-state laser oscillation device using a rod doped with Nd, Tm, and Ho, especially YAG, YVO _Four , YLF, YA 10 _Three A slab structure amplifier may be combined with a solid-state laser oscillating device using a crystal doped with Nd, Tm, or Ho. Crystals such as Nd: YAG, Nd: GGG (gadolinium / gallium / garnet), Nd: GsGG (gadolinium / scandium / gallium / garnet) are used as the slab material. A slab laser travels in a zigzag optical path through this plate-shaped laser medium while repeating total reflection.
[0022]
Moreover, you may irradiate the strong light according to the said laser. For example, light having a high energy density obtained by condensing light emitted from a halogen lamp, xenon lamp, high-pressure mercury lamp, metal halide lamp, or excimer lamp by a reflecting mirror or a lens may be used.
[0023]
The laser beam or the intense light that is focused in a line and extended in the longitudinal direction is irradiated on the semiconductor film while relatively moving the irradiation position of the laser beam and the substrate on which the crystalline semiconductor film is formed. The semiconductor film is melted by scanning a part or the entire surface of the light, and crystallization or recrystallization is performed through that state. The scanning direction of the laser light is performed along the longitudinal direction of the recess formed in the insulating film and extending in a linear stripe pattern or the channel length direction of the transistor. As a result, the crystal grows along the scanning direction of the laser beam, and the crystal grain boundary can be prevented from crossing the channel length direction.
[0024]
For the above-described recess, a thick silicon oxide, silicon nitride, or silicon oxynitride film may be provided, and the recess may be formed by etching. The recess is preferably formed in accordance with the arrangement of the semiconductor element, particularly the island-shaped semiconductor film including the channel formation region of the transistor, and is preferably formed so as to match at least the channel formation region. Further, the recess is provided so as to extend in the channel length direction, and its width (channel width direction in the case of forming a channel formation region) is 0.01 μm or more and 2 μm or less (preferably 0.1 to 1 μm). The depth is preferably 0.01 μm or more and 3 μm or less (preferably 0.1 μm or more and 2 μm or less).
[0025]
The width of the channel formation region of the island-shaped semiconductor film patterned so as to have a plurality of stripe-shaped crystalline semiconductor films is considered to be the sum of the widths of the plurality of stripe-shaped crystalline semiconductor films.
[0026]
By setting the depth of the recesses to be equal to or greater than the thickness of the semiconductor film, the semiconductor film melted by irradiation with laser light or strong light aggregates and solidifies in the recesses due to surface tension. As a result, the thickness of the semiconductor film on the convex portion of the insulating film is reduced, and stress strain can be concentrated there. The side surface of the recess has the effect of defining the crystal orientation to some extent.
[0027]
In the insulating film provided with the concave portion and the convex portion of the present invention, the angle formed between the side surface and the bottom surface of the concave portion (the side surface of the concave portion and the substrate) is described as being a right angle, but it may deviate from the right angle depending on the formation conditions. . However, as described above, the side surface of the recess has the effect of defining the crystal orientation to some extent, and conversely, it may be formed by using a shift so that the angle formed by the side surface of the recess and the substrate is tapered. Absent.
[0028]
As described above, the semiconductor film is melted using means such as a laser, aggregated in a recess formed on the insulating surface by surface tension, and crystal growth is caused by crystal growth from the side surface of the recess, thereby causing distortion caused by crystallization. It can concentrate on areas other than a crevice. That is, the crystalline semiconductor region (first crystalline semiconductor region) formed so as to be filled in the concave portion can be released from strain. In addition, among the insulating film provided with a portion corresponding to the concave portion or the convex portion, a crystalline semiconductor region (second second) including a crystal grain boundary or a crystal defect is formed on a portion corresponding to the convex portion (hereinafter simply referred to as a convex portion). A crystalline semiconductor region) is formed.
[0029]
That is, since the crystallinity of the crystalline semiconductor film formed on the convex portion is inferior to that of the crystalline semiconductor film formed on the concave portion, it is preferable to avoid using it as a channel formation region. However, the crystalline semiconductor film formed over the convex portion may be positively used as an electrode (in the case of a thin film transistor, it corresponds to a source electrode or a drain electrode) or a wiring. When used as a wiring, since the degree of freedom in designing the occupied area is high, it is possible to adjust the length of the wiring and use it as a resistor, or to have a function as a protection circuit as a bent shape.
[0030]
The semiconductor film formed over the insulating film and over the concave portion is an amorphous semiconductor film, a polycrystalline semiconductor film (including a deposited film and a solid-phase grown film) or a microcrystal formed by a known method. A semiconductor film is applied. Typically, an amorphous silicon film is applied, and in addition, an amorphous silicon germanium film, an amorphous silicon carbide film, or the like can also be applied. In silicon germanium, the composition ratio of Ge to Si is preferably 0.01 to 2 atomic%.
[0031]
Then, a gate insulating film in contact with the island-shaped semiconductor film is formed, and further a gate electrode is formed. In this patterning, it is preferable to provide a taper at the end of the island-shaped semiconductor film. Thereafter, a field effect transistor can be formed by a known method.
[0032]
According to the present invention, by forming a channel formation region from a striped crystalline semiconductor film on the same line on an insulating surface, particularly on an insulating surface using a cheap glass substrate as a supporting base, a plurality of semiconductor elements can be formed. The variation can be reduced, and further the variation can be reduced between semiconductor circuits (analog circuits), so that a high-performance semiconductor integrated circuit can be provided. Note that two or more semiconductor circuits are gathered to form a semiconductor integrated circuit, and the semiconductor circuit includes a semiconductor element formed of a thin film transistor that requires at least matching.
[0033]
In addition, it is possible to designate a region where a channel formation region of the thin film transistor is formed and to form a crystalline semiconductor region in which no crystal grain boundary exists in the region, so that high speed operation is possible and current driving capability is high. A semiconductor integrated circuit including a semiconductor element or a semiconductor element group can be provided. Furthermore, a liquid crystal display device having the semiconductor integrated circuit of the present invention and a flat display device (flat panel display) represented by an EL (electroluminescence) display device can be provided.
[0034]
DETAILED DESCRIPTION OF THE INVENTION
(Embodiment 1)
In this embodiment mode, a mode for manufacturing a thin film transistor by implementing the present invention will be described. 3 to 6 illustrate that there are two thin film transistors in the same stripe shape, the number of thin film transistors to be manufactured may be determined as appropriate by the practitioner, and any of the drawings to be used is the present invention. It does not give any restrictions.
[0035]
First, FIG. 1 will be described. 1A is a top view, and FIG. 1B is a cross-sectional view corresponding to AA ′. A state is shown in which a first insulating film 102 and a second insulating film 103 formed in a linear stripe pattern are formed on a substrate 101. In this specification, the concave portion indicates a portion indicated by 103a, and the convex portion indicates a portion indicated by 103b.
[0036]
As the substrate 101, a commercially available non-alkali glass substrate, quartz substrate, sapphire substrate, a substrate in which the surface of a single crystal or polycrystalline semiconductor substrate is coated with an insulating film, or a substrate in which the surface of a metal substrate is coated with an insulating film can be applied. .
[0037]
In order to form a linear stripe pattern with a sub-micron design rule, the height difference of the substrate surface caused by unevenness of the substrate surface, waviness or twisting of the substrate should be kept below the focal depth of the exposure apparatus (especially stepper). desirable. Specifically, it is desirable that the height difference of the substrate surface caused by the undulation or twisting of the substrate is 1 μm or less, preferably 0.5 μm or less in one exposure irradiation region. In this regard, care must be taken particularly when an alkali-free glass is used as the support substrate.
[0038]
The width (W1) of the second insulating film 103 formed in a linear stripe pattern is 0.1 to 10 μm (preferably 0.5 to 1 μm), and the distance between adjacent second insulating films (W2). Is 0.01 to 2 μm (preferably 0.1 to 1 μm), and the thickness (d) of the second insulating film is preferably 0.01 to 3 μm (preferably 0.1 to 2 μm). The step shape need not be a regular periodic pattern, and may be arranged at different intervals in accordance with the width of the island-shaped semiconductor film. The length of the substrate is not particularly limited, and can be long so as to extend from one end to the other end of the substrate as shown in FIG. 1, and as described later in Embodiment 2, the channel formation region of the transistor It is also possible to make it long enough to form.
[0039]
The first insulating film 102 may be any material that can secure a selection ratio in etching with the second insulating film to be formed later, but typically, silicon nitride, silicon oxide, silicon oxynitride (SiOxNy and ), Silicon nitride oxide (shown as SiNxOy), aluminum nitride (shown as AlxNy), aluminum oxynitride (shown as AlOxNy), aluminum nitride oxide (shown as AlNxOy), and aluminum oxide Thus, it is formed with a thickness of 30 to 300 nm. In particular, since an aluminum oxide film can be expected to have a blocking effect on sodium (Na), it is effective as a countermeasure against contamination from a glass substrate.
[0040]
As the silicon oxynitride (SiOxNy) film, a film containing Si at 25 to 35 atomic%, oxygen at 55 to 65 atomic%, nitrogen at 1 to 20 atomic%, and hydrogen at 0.1 to 10 atomic%. Use it. Further, as a silicon oxynitride (SiNxOy) film, a film containing Si of 25 to 35 atomic%, oxygen of 15 to 30 atomic%, nitrogen of 20 to 35 atomic%, and hydrogen of 15 to 25 atomic% may be used. good. As the aluminum oxynitride (AlOxNy) film, a film containing Al at 30 to 40 atomic%, oxygen at 50 to 70 atomic%, and nitrogen at 1 to 20 atomic% may be used. In addition, as the aluminum oxynitride (AlNxOy) film, a film containing Al in an amount of 30 to 50 atomic%, oxygen in an amount of 0.01 to 20 atomic%, and nitrogen in an amount of 30 to 50 atomic% may be used.
[0041]
The second insulating film 103 may be formed using silicon oxide or silicon oxynitride having a thickness of 10 to 3000 nm, preferably 100 to 2000 nm. Silicon oxide is composed of tetraethyl orthosilicate (TEOS) and O ₂ And can be formed by a plasma CVD method. Silicon nitride oxide film is SiH _Four , NH _Three , N ₂ O or SiH _Four , N ₂ It can be formed by plasma CVD using O as a raw material.
[0042]
Note that the second insulating film 103 is formed using an insulating film formed by a CVD method (typically, a plasma CVD method or a thermal CVD method) or a PVD method (typically, a sputtering method or an evaporation method). Is preferred. This is because, when crystallizing an amorphous semiconductor film, the softness that can relieve the stress associated with crystallization is considered to play an important role in obtaining good crystallinity. is there.
[0043]
As shown in FIG. 1, in the case of forming a linear stripe pattern with two insulating films, it is necessary to provide a selection ratio between the first insulating film 102 and the second insulating film 103 in the etching process. There is. Actually, it is desirable to appropriately adjust the material and film formation conditions so that the etching rate of the second insulating film 103 is relatively higher than that of the first insulating film 102. As an etching method, a mask is provided in a region to be a convex portion of the second insulating film, and etching using buffered hydrofluoric acid or CHF is performed. _Three Performed by dry etching using
[0044]
The thickness of the channel formation region of the semiconductor film is approximately equal to or less than the depth of the recess formed in the second insulating film 103 (corresponding to the step d in FIG. 1B). Is desirable.
[0045]
Next, the relationship between the step d of the second insulating film 103 and the thickness of the semiconductor film in the recess 103a will be described.
[0046]
FIG. 7 is a conceptual diagram showing the knowledge of crystallization obtained from the experimental results by the present inventors. FIGS. 7A to 7E schematically show the relationship between the depth, distance, step d and crystal growth of the recesses 103a of the first insulating film 102 and the second insulating film.
[0047]
In addition, regarding the reference numerals regarding the length shown in FIG. 7, a1: the thickness of the amorphous semiconductor film 710 on the second insulating film (on the convex portion), a2: the thickness of the amorphous semiconductor film 710 in the concave portion, p1: thickness of the crystalline semiconductor film 711 on the second insulating film (on the convex portion), p2: thickness of the crystalline semiconductor film 711 in the concave portion, d: thickness of the second insulating film (depth of the concave portion) W1, the width of the second insulating film (width of the convex portion), and W2: the width of the concave portion (interval between adjacent convex portions). 7 shows the first insulating film 102 and the second insulating film 103 as in FIG.
[0048]
FIG. 7A shows a case where d <a2, W1, and W2 are approximately equal to or less than 1 μm, that is, when the depth of the recess is smaller than the thickness of the amorphous semiconductor film 710 in the recess. Even after the formation process, the surface of the crystalline semiconductor film 711 is not sufficiently planarized. That is, the surface state of the crystalline semiconductor film 711 reflects the uneven shape of the base (particularly the second insulating film).
[0049]
FIG. 7B shows a case where d ≧ a2, W1 and W2 are approximately equal to or smaller than 1 μm, that is, when the depth of the recess is substantially equal to or greater than the thickness of the amorphous semiconductor film 710 in the recess. The surface tension works and the semiconductor film collects in the recess. In the state of solidifying while gathering in the recesses, the surface becomes almost flat as shown in FIG. In this case, p <b> 1 <p <b> 2, and stress concentrates on the portion 720 where the semiconductor film on the second insulating film 103 is thin, strain is accumulated therein, and crystal grain boundaries concentrate on 720.
[0050]
FIG. 7C shows a case where d> a2, W1, and W2 are approximately equal to or less than 1 μm, and the crystalline semiconductor film 711 is formed so as to fill the recess, and is formed on the second insulating film 103. It is also possible that almost no semiconductor film remains.
[0051]
FIG. 7D shows a case where d ≧ a2, W1 and W2 are approximately the same as or slightly larger than 1 μm. When the width (W2) of the concave portion is widened, the crystalline semiconductor film 711 fills the concave portion, and the effect of planarization However, a crystal grain boundary is likely to occur near the center 721 of the recess. Similarly, stress is concentrated on the second insulating film, strain is accumulated in 720, and a crystal grain boundary is formed. This is presumed to be because the effect of stress relaxation is reduced by increasing the interval.
[0052]
FIG. 7E shows a case where d ≧ a2, W1 and W2 are larger than 1 μm, and the state of FIG.
[0053]
As described above with reference to FIGS. 7A and 7B, the form of FIG. 7B is considered most suitable when a semiconductor element is formed, particularly when a channel formation region in a transistor is formed. In addition, although the example in which the uneven shape of the base for forming the crystalline semiconductor film is formed using the first insulating film and the second insulating film is shown here, it is not limited to the form shown here and has a similar shape. Anything can be substituted. For example, the concave surface may be formed directly by etching the surface of the quartz substrate to provide an uneven shape.
[0054]
Next, laser irradiation will be described with reference to FIG. 2A is a top view, FIG. 2B is a cross-sectional view corresponding to AA ′, and FIG. 2C is a cross-sectional view corresponding to BB ′. An amorphous semiconductor film 105 is formed so as to cover the second insulating film 103 and is crystallized by continuous wave linear laser light.
[0055]
First, an insulating film (hereinafter referred to as a buffer film) 104 functioning as a buffer is formed so as to cover the surface composed of the first insulating film 102 and the second insulating film 103 and the concave portion 103a, and then, without releasing to the atmosphere. The amorphous semiconductor film 105 is continuously formed to a thickness of 0.01 to 3 μm (preferably 0.1 to 1 μm). The buffer film 104 aims to eliminate the influence of chemical contamination such as boron adhering to the surfaces of the first insulating film 102 and the second insulating film 103 and to improve the adhesion, and even a thin film is sufficiently effective. is there. Typically, the thickness may be 5 to 50 nm (20 nm or more is preferable for enhancing the chemical contamination blocking effect).
[0056]
Then, the amorphous semiconductor film 105 is instantaneously melted and crystallized. This crystallization is performed by irradiating laser light condensed to an energy density enough to melt the semiconductor film in the optical system or radiation light from a lamp light source. In this step, it is particularly preferable to apply laser light using a continuous wave laser oscillation device as a light source. The applied laser beam is focused in a linear shape by an optical system and expanded in the long direction, and it is desirable that the intensity distribution has a uniform region in the long direction. Moreover, you may have a certain amount of distribution in the short direction.
[0057]
For example, as an example of the crystallization condition, YVO in continuous oscillation mode _Four Using a laser oscillator, the output of 5 to 10 W of the second harmonic (wavelength 532 nm) is condensed into linear laser light having a ratio of the longitudinal direction to the transverse direction of 10 or more in the optical system, and the longitudinal direction. Are condensed so as to have a uniform energy density distribution, and are crystallized by scanning at a speed of 5 to 200 cm / sec. The uniform energy density distribution does not exclude anything other than a completely constant one, and the allowable range in the energy density distribution is within a range of ± 10%.
[0058]
Further, the crystallization by the laser beam condensed linearly may be completed by only one scan (that is, one direction), or may be reciprocated to improve the crystallinity. If necessary, the laser beam condensed linearly may be scanned zigzag. Furthermore, after crystallizing with laser light, the surface of the silicon film is treated with an alkali solution such as oxide removal with hydrofluoric acid or ammonia hydrogen peroxide solution treatment, and the poor quality part with high etching rate is selectively used. It may be removed and the same crystallization treatment (recrystallization) may be performed again. In this way, crystallinity can be increased.
[0059]
As the laser oscillation device, a rectangular beam solid state laser oscillation device is applied, and a slab laser oscillation device is particularly preferably applied. As the slab material, crystals such as Nd: YAG, Nd: GGG (gadolinium / gallium / garnet), Nd: GsGG (gadolinium / scandium / gallium / garnet) are used. A slab laser travels in a zigzag optical path through this plate-like laser medium while repeating total reflection. Alternatively, it is a solid state laser oscillation device using a rod doped with Nd, Tm, and Ho, especially YAG, YVO. _Four , YLF, YAlO _Three A slab structure amplifier may be combined with a solid-state laser oscillation device using a crystal doped with Nd, Tm, or Ho.
[0060]
Then, as indicated by arrows in FIG. 2, the longitudinal direction (X-axis direction in the drawing) of the irradiation region 106 of the linear laser beam is a linear stripe pattern of the second insulating film 103. A linear laser beam or strong light is scanned so as to intersect with each other. Here, the term “linear” refers to the ratio of the length in the long direction (X-axis direction in the drawing) to the length in the short length direction (Y-axis direction in the drawing). Say with 10 or more. Although only a part is shown in FIG. 2, the end of the irradiation region 106 of the linear laser beam may be a rectangular shape or a curved shape.
[0061]
The wavelength of the continuous wave laser beam is preferably 400 to 700 nm in consideration of the light absorption coefficient of the amorphous semiconductor film. Light in such a wavelength band is obtained by taking out the second harmonic and the third harmonic of the fundamental wave using a wavelength conversion element. As wavelength conversion element, ADP (ammonium dihydrogen phosphate), Ba ₂ NaNb _Five O ₁₅ (Sodium barium niobate), CdSe (selenium cadmium), KDP (potassium dihydrogen phosphate), LiNbO _Three (Lithium niobate), Se, Te, LBO, BBO, KB5 and the like are applied. It is particularly desirable to use LBO. A typical example is Nd: YVO _Four The second harmonic (532 nm) of the laser oscillation device (fundamental wave 1064 nm) is used. The laser oscillation mode is TEM ₀₀ Apply single mode.
[0062]
In the case of silicon selected as a suitable material, the absorption coefficient is 10 ^Three -10 ^Four cm ^-1 The region which is is almost in the visible light region. When crystallizing an amorphous semiconductor film containing silicon formed with a thickness of 30 to 200 nm on a substrate having high visible light transmittance such as glass, light in the visible light range of 400 to 700 nm is irradiated. Thus, crystallization can be performed without selectively damaging the base insulating film by selectively heating the semiconductor film. Specifically, the penetration depth of light with a wavelength of 532 nm is approximately 100 nm to 1000 nm with respect to the amorphous silicon film, and can sufficiently reach the inside of the amorphous semiconductor film 105 formed with a film thickness of 30 nm to 200 nm. it can. That is, it is possible to heat from the inside of the semiconductor film, and almost the entire semiconductor film in the laser light irradiation region can be heated uniformly.
[0063]
The laser beam is scanned in a direction parallel to the direction in which the linear stripe pattern extends, and the melted semiconductor flows into the concave portion due to surface tension and solidifies. In the solidified state, the surface becomes almost flat as shown in FIG. This is because once the semiconductor is melted, the interface between the melted semiconductor and the gas phase reaches an equilibrium state, whether on the convex portion or the concave portion, and a flat interface is formed. Further, the crystal growth edge and the crystal grain boundary are formed on the second insulating film (on the convex portion). Thus, the crystalline semiconductor film 107 is formed. Reference numeral 107a denotes a semiconductor region with high crystallinity (first crystalline semiconductor region) formed in the concave portion, and reference numeral 107b denotes a crystalline semiconductor region with low crystallinity (second crystalline semiconductor formed in the convex portion). Area).
[0064]
Note that when the second insulating film is a soft insulating film (insulating film with low density) in the crystallization step, an effect of relaxing stress due to shrinkage of the semiconductor film during crystallization can be expected. On the other hand, if a hard insulating film (insulating film with high density) is used, stress is generated against the semiconductor film that is about to shrink or expand, so that it is easy to leave stress strain or the like in the semiconductor film after crystallization. It may also cause For example, in the known graphoepitaxy technology (“MWGeis, DCFlanders, HISmith: Appl. Phys. Lett. 35 (1979) pp71”), the irregularities on the substrate are directly formed on hard quartz. The thermal shrinkage and stress generation accompanying the conversion cannot be alleviated, and the generation of defects due to distortion or dislocation due to the stress may occur.
[0065]
However, in consideration of those points, the present applicant uses a soft insulating film formed by a CVD method or a PVD method in forming concave and convex portions on an inexpensive glass substrate. Since the second insulating film is made of a material softer than quartz glass, the present invention is basically different from the above-mentioned known graphoepitaxy technique in that the purpose is to alleviate stress generation during crystallization.
[0066]
Note that an insulating film softer than quartz glass means, for example, an insulating film having an etching rate faster than quartz glass (quartz glass industrially used as a substrate) under the same measurement conditions, or an insulation with low hardness under the same measurement conditions. It means film. Note that the etching rate and hardness may be a relative comparison with quartz glass to the last, so the absolute value of the etching rate is not a problem and does not depend on the etching rate measurement conditions or the hardness measurement conditions.
[0067]
For example, if a silicon oxynitride film is used as the second insulating film, SiH _Four Gas, N ₂ A silicon oxynitride film formed by a plasma CVD method using O gas as a raw material is preferable. The silicon oxynitride film is made of ammonium hydrogen fluoride (NH _Four HF ₂ ) 7.13% and ammonium fluoride (NH _Four The etching rate at 20 ° C. of the mixed aqueous solution containing 15.4% of F) is 110 to 130 nm / min (500 ° C., 1 hour + 550 ° C., after 4 hours of heat treatment, 90 to 100 nm / min).
[0068]
If a silicon oxynitride film is used as the second insulating film, SiH _Four Gas, NH _Three Gas, N ₂ A silicon oxynitride film formed by a plasma CVD method using O gas as a raw material is preferable. The silicon nitride oxide film is made of ammonium hydrogen fluoride (NH _Four HF ₂ ) 7.13% and ammonium fluoride (NH _Four The etching rate at 20 ° C. of the mixed aqueous solution containing 15.4% of F) is 60 to 70 nm / min (40 to 50 nm / min after heat treatment at 500 ° C., 1 hour + 550 ° C. for 4 hours).
[0069]
As described above, a linear stripe pattern having recesses and projections is formed by an insulating film, an amorphous semiconductor film is deposited thereon, and crystallized through a molten state by irradiation with laser light, thereby forming recesses. Then, the semiconductor film is poured and solidified, so that strain or stress accompanying crystallization can be concentrated in a region other than the concave portion, and a region having poor crystallinity such as a crystal grain boundary can be selectively formed. A feature of the present invention is that a semiconductor region with good crystallinity is used as a region where carrier movement is performed, such as a channel formation region of a thin film transistor.
[0070]
After that, heat treatment is preferably performed at 500 to 600 ° C. to remove distortion accumulated in the crystalline semiconductor film. This distortion occurs due to semiconductor volume shrinkage caused by crystallization, thermal stress with the base, or lattice mismatch. This heat treatment may be performed using a normal heat treatment apparatus. For example, a gas heating rapid thermal annealing (RTA) method may be used for 1 to 10 minutes. Note that this step is not an essential requirement in the present invention, and may be selected as appropriate.
[0071]
Next, FIG. 3 will be described. 3A is a top view, FIG. 3B is a cross-sectional view corresponding to AA ′, and FIG. 3C is a cross-sectional view corresponding to CC ′. A state in which patterning for defining an island-shaped semiconductor film of a thin film transistor is performed on the crystalline semiconductor film 107 is shown.
[0072]
In FIG. 3A, the resist masks 108 (a) and 108 (b) are provided across the concave and convex portions of the second insulating film 103. This is because even if the crystalline semiconductor film having poor crystallinity formed on the convex portion of the second insulating film 103 is not used as a channel formation region, there is no problem in using it as an electrode. It is. That is, by actively utilizing the thin film transistor as a source region or a drain region, a design margin for a contact portion between the source region or the drain region and an electrode (source electrode or drain electrode) connected to each region can be secured. . The shape of the resist mask may be designed as appropriate. In this embodiment, examples of 108 (a) and 108 (b) are shown.
[0073]
In consideration of shift of the resist mask, a first resist mask is provided in the source region and the drain region, and then the surface of the crystalline semiconductor film 107 is removed by etching, and a second resist mask as shown in FIG. 3 is used. An island-shaped semiconductor film may be formed. This will be described in Embodiment 3.
[0074]
Next, FIG. 4 will be described. 4A is a top view, FIG. 4B is a cross-sectional view corresponding to AA ′, and FIG. 4C is a cross-sectional view corresponding to CC ′. This shows a state in which after the crystalline semiconductor film 107 is patterned, dry etching or wet etching is performed to form island-shaped semiconductor films (also referred to as active layers) 109 (a) and 109 (b) of the thin film transistor.
[0075]
The crystalline semiconductor film 107 can be selectively etched with the buffer film 104 by using a fluorine-based gas and oxygen as etching gases. Of course, even if the buffer film 104 is etched, there is no problem as long as the selectivity with respect to the first insulating film 102 thereunder can be ensured. As an etching gas, CF _Four And O ₂ Mixed gas and NF _Three A plasma etching method using a gas may be used, or ClF. _Three Plasmaless gas etching using a gas such as a halogen fluoride gas without being excited may be performed. Plasmaless gas etching is an effective technique for suppressing crystal defects because it does not cause plasma damage to the crystalline semiconductor film.
[0076]
In addition, when the island-shaped semiconductor films 109 (a) and 109 (b) are formed, it is preferable to provide a taper at an end portion (edge) of the island-shaped semiconductor film. The taper angle may be 20 to 85 ° (preferably 45 to 60 °). Accordingly, coverage (coverage) of a gate insulating film to be formed later can be improved, and disconnection or short circuit of the gate electrode can be prevented.
[0077]
The crystalline semiconductor film obtained by practicing the present invention has no crystal grain boundaries or defects that are clarified by Secco etching, in other words, substantially does not exist. Seco-etching is a seco liquid (HF: H) that is generally known in order to reveal the crystal grain boundary on the surface of the crystalline semiconductor film. ₂ O = 2: 1 K as additive ₂ Cr ₂ O ₇ This is an etching method using a chemical solution prepared using In this specification, as the secco solution, potassium dichromate (K ₂ Cr ₂ O ₇ ) Dissolve 2.2 g in 50 cc of water to prepare a 0.15 mol / l solution, add 100 cc of hydrofluoric acid solution to the solution, and further dilute 5 times with water. Means performing an etching treatment for 75 seconds at room temperature (10 to 30 ° C.) using the above-mentioned secco solution.
[0078]
Although crystal grain boundaries that are clarified by Secco etching have not been identified at present, it is a well-known fact that stacking faults and crystal grain boundaries are preferentially etched by Secco etching. Of course, since it is not a single crystal, there may naturally be grain boundaries and defects that do not appear by Secco etching. However, such grain boundaries and defects do not affect the electrical characteristics when semiconductor devices are manufactured. It is considered electrically inactive. Usually, an electrically inactive grain boundary is called a planar grain boundary (low-order or higher-order twin or a corresponding grain boundary), and a grain boundary that does not appear by Secco etching is a plane. Presumed to be a grain boundary. From this point of view, the fact that there are substantially no crystal grain boundaries or defects can be said to mean that there are no crystal grain boundaries other than planar grain boundaries.
[0079]
Next, FIG. 5 will be described. 5A is a top view, FIG. 5B is a cross-sectional view corresponding to AA ′, FIG. 5C is a cross-sectional view corresponding to BB ′, and FIG. It is sectional drawing corresponding to -C '. The state where the gate insulating film 110 and the gate electrodes 111 (a) and 111 (b) are formed after the island-shaped semiconductor films 109 (a) and 109 (b) are formed is shown.
[0080]
As the gate insulating film 110, any of the above-described silicon oxide film, silicon nitride film, silicon oxynitride film, silicon nitride oxide film, aluminum nitride film, aluminum nitride oxide film, aluminum oxynitride film, and aluminum oxide film may be used. And it is good also as a laminated film which combined these suitably. In order to improve the coverage of the gate insulating film, a silicon oxide film using TEOS is preferable for a silicon oxide film, and an aluminum nitride oxide film formed by RF sputtering is used for an aluminum nitride oxide film, or the nitride A stacked film of an aluminum oxide film and a silicon oxide film (a silicon oxide film may be obtained by oxidizing a semiconductor film serving as an active layer with hydrogen peroxide) may be used.
[0081]
The gate electrode 111 may be formed using tungsten, an alloy containing tungsten, tantalum, an alloy containing tantalum, aluminum, an aluminum alloy, or the like.
[0082]
Next, the source regions 112 (a) and 112 (b) and the drain regions 113 (a) and 113 (b) are formed in a self-aligned manner using the gate electrodes 111 (a) and 111 (b) as a mask. Shows the state. In addition, channel forming regions 114 (a) and 114 (b) are defined by this step.
[0083]
In this embodiment mode, an element belonging to Group 13 of the periodic table (typically, in order to impart p-type to the source regions 112 (a) and 112 (b) and the drain regions 113 (a) and 113 (b) (typically , Boron is used), but an element belonging to group 15 of the periodic table (typically using phosphorus or arsenic) may be added in order to impart n-type. The addition method may be a known method. Further, a low concentration drain region (generally called an LDD region) may be provided as necessary.
[0084]
After the source regions 112 (a) and 112 (b) and the drain regions 113 (a) and 113 (b) are formed, the source regions 112 (a) and 112 (a) are formed by furnace annealing, laser annealing, or RTA (rapid thermal annealing). 112 (b) and drain regions 113 (a) and 113 (b) are activated. Note that RTA may be annealing with infrared light or ultraviolet light using a lamp light source, or may be annealing with heating gas.
[0085]
Next, FIG. 6 will be described. 6A is a top view, FIG. 6B is a cross-sectional view corresponding to AA ′, FIG. 6C is a cross-sectional view corresponding to BB ′, and FIG. It is sectional drawing corresponding to -C '. The source wirings 117 (a) and 117 (b) and the drain wirings 118 (a) and 118 (b) are formed, and a p-channel thin film transistor is completed.
[0086]
After the activation step is completed, a protective film (passivation film) 115 is formed so as to cover the gate electrode 111 and the like. As the protective film 115, an insulating film with a high nitrogen content such as a silicon nitride film, a silicon nitride oxide film, an aluminum nitride film, or an aluminum nitride oxide film is preferably used. This is to eliminate the influence of alkali metals and moisture.
[0087]
Note that in this embodiment, a silicon nitride oxide (SiNxOy) film is used as the protective film 115, and heat treatment is performed at 400 to 450 ° C. after the film formation. Since the protective film 115 contains 15 to 25 atomic% of hydrogen, hydrogen can be effectively terminated even if there is a dangling bond in the channel formation regions 114a and 114b due to heat treatment.
[0088]
After the protective film 115 is formed, a silicon oxide film, a silicon nitride film, a silicon nitride oxide film, a silicon oxynitride film, or a stacked film thereof is formed as an interlayer film (interlayer insulating film) 116. Of course, a resin film may be used if heat resistance permits. The film thickness is not particularly limited, but a film thickness that can sufficiently planarize the surface of the interlayer film 116 is preferable. Note that planarization may be performed by a known means such as CMP (Chemical Mechanical Polishing) after the formation of the interlayer film 116.
[0089]
Then, contact holes are formed in the interlayer film 116 and the like, and source wirings 117 (a), 117 (b) and drain wirings 118 (a), 118 (b) are formed of an aluminum film or a laminated film of an aluminum film and another metal film. ). Of course, copper or other low resistance conductors may be used instead of aluminum. Note that 119 (a) and 119 (b) are regions where the source regions 112 (a) and 112 (b) are connected to the source wirings 117 (a) and 117 (b), respectively, and are called source contacts. 120 (a) and 120 (b) are regions where the drain regions 113 (a) and 113 (b) are connected to the drain wirings 118 (a) and 118 (b), respectively, and are called drain contacts. In this embodiment mode, since the source region and the drain region are formed across the concave portion and the convex portion formed of the second insulating film, the source contact 119 (a), 119 (b) and the drain contact 120 ( A design margin for forming a) and 120 (b) can be widened.
[0090]
Note that the left p-channel transistor illustrated in FIG. 6D includes a plurality of channel formation regions (in this embodiment, two channel formation regions are arranged in parallel and a pair of impurity regions (this embodiment In this embodiment, the transistor is connected to the source region 112 (a) and the drain region 113 (a)), that is, a multi-channel transistor, and the channel formation region of the left p-channel thin film transistor. Is considered to be the sum of the widths of the two channel formation regions.
[0091]
FIG. 18 shows the result of obtaining the orientation of the crystalline semiconductor film formed in the concave portion by a reflected electron diffraction pattern (EBSP). EBSP provides a scanning electron microscope (SEM) with a dedicated detector, which irradiates the crystal plane with an electron beam and causes the computer to recognize the crystal orientation from the Kikuchi line. The crystallinity is measured not only on the surface orientation but also in all directions of the crystal (hereinafter, this method is referred to as EBSP method for convenience).
[0092]
The data in FIG. 18 indicates that the crystal grows in a direction parallel to the scanning direction (laser scanning direction) of the laser beam condensed linearly in the concave portion. From FIG. 18, it is confirmed that the growth plane orientation is almost uniform in the same stripe (recess). In FIG. 18, three plane orientations are shown, and a plurality of recesses are present where the step pattern exists, and the stripes of the same color indicate that the plane orientations are aligned.
[0093]
As described above, according to the present invention, the crystallinity of the crystalline semiconductor film formed in the stripe shape of the same line on the insulating surface, that is, the plane direction of crystal growth can be aligned. The present invention can reduce variation in characteristics between thin film transistors having a crystalline semiconductor film on the same line as a channel formation region.
[0094]
(Embodiment 2)
In the formation of the crystalline semiconductor film of the present invention, in addition to the method of crystallizing the amorphous semiconductor film by irradiating the amorphous semiconductor film as shown in Embodiment Mode 1, the laser light is further crystallized after crystallization by solid phase growth. May be melted and recrystallized.
[0095]
For example, after the amorphous semiconductor film 105 is formed in FIG. 2, the crystallization is promoted by lowering the crystallization temperature of the amorphous semiconductor film (eg, amorphous silicon film) and improving the orientation. Ni is added as a catalytic metal element.
[0096]
This technique is described in Japanese Patent Application Laid-Open No. 11-354442 by the present applicant. The crystalline semiconductor film obtained by combining the technique of Embodiment 1 with the Ni-added technique also has a characteristic of uniform crystallinity, and such a crystalline semiconductor film is used for a channel formation region of a thin film transistor. In addition, both the electron mobility and the hole mobility are significantly improved, and the field effect mobility of the n-channel transistor and the p-channel transistor is greatly improved.
[0097]
Further, there is no limitation on the Ni addition method, and a spin coating method, a vapor deposition method, a sputtering method, or the like can be applied. In the case of the spin coating method, an aqueous solution containing 5 ppm of nickel acetate is applied to form a metal element-containing layer. Of course, the catalyst element is not limited to Ni, and other known materials may be used.
[0098]
After the amorphous semiconductor film 105 is formed, the amorphous semiconductor film 105 is crystallized by a heat treatment at 580 ° C. for 4 hours, and the crystallized semiconductor film is irradiated with laser light or a strong light equivalent thereto. To melt and recrystallize. In this manner, a crystalline semiconductor film having a substantially flat surface as in FIG. 2 can be obtained.
[0099]
The advantage of using a crystallized semiconductor film as an object to be irradiated with laser light is the fluctuation rate of the light absorption coefficient of the semiconductor film. Even if the crystallized semiconductor film is melted by irradiation with laser light, the light absorption coefficient is Almost no change. Therefore, a wide margin of laser irradiation conditions can be taken.
[0100]
A metal element remains in the crystalline semiconductor film thus formed, but can be removed by gettering treatment. For details of this technique, refer to Japanese Patent Application No. 2001-019367 (or Japanese Patent Application No. 2002-020801). Further, the heat treatment accompanying the gettering treatment has an effect of alleviating distortion of the crystalline semiconductor film.
[0101]
After that, similarly to Embodiment Mode 1, a thin film transistor is formed using the recessed crystalline semiconductor film as a channel formation region and the protruding crystalline semiconductor film as a source region or a drain region. According to the present invention as described above, the crystallinity of the crystalline semiconductor film formed in the stripe shape of the same line on the insulating surface, that is, the plane direction of crystal growth can be made uniform. The present invention can reduce variation among thin film transistors having a crystalline semiconductor film on the same line as a channel formation region.
[0102]
(Embodiment 3)
Next, an example in which the stripe pattern is long enough to form a channel formation region of a transistor will be described with reference to FIGS.
[0103]
8A is a top view, FIG. 8B is a cross-sectional view corresponding to AA ′, and FIG. 8C is a cross-sectional view corresponding to CC ′. A state is shown in which a first insulating film 802 and a second insulating film 803 in which a linear stripe pattern is formed are formed over a substrate 801. Note that a portion indicated by 803a indicates a concave portion, and a portion indicated by 803b indicates a convex portion.
[0104]
The feature of this embodiment is that the length of the linear stripe pattern is such that a channel formation region of a transistor can be formed. In other words, the second insulating film 803 is not provided in the cross-sectional view taken along the line AA ′, and the second insulating film 803 is provided in a stripe shape in the cross-sectional view taken along the line CC ′. The first insulating film and the second insulating film may be formed using a material similar to that in Embodiment 1 and a similar manufacturing method.
[0105]
As in the first embodiment, the width (W1) of the second insulating film 803 formed in a linear stripe pattern is 0.1 to 10 μm (preferably 0.5 to 1 μm), and the adjacent second film The distance (W2) from the insulating film is 0.01 to 2 μm (preferably 0.1 to 1 μm), and the thickness (d) of the second insulating film is 0.01 to 3 μm (preferably 0.1). ~ 2 μm) is preferred.
[0106]
After that, as in the first embodiment, an insulating film (hereinafter referred to as a buffer film) 804 that functions as a buffer is formed so as to cover the surface including the first insulating film 802 and the second insulating film 803 and the concave portion 803a. Thereafter, an amorphous semiconductor film was continuously formed to a thickness of 0.01 to 3 μm (preferably 0.1 to 1 μm) without being exposed to the atmosphere.
[0107]
Next, FIG. 9 will be described. FIG. 9 shows a crystalline semiconductor film 807 that is crystallized by irradiating an amorphous semiconductor film with continuous-wave linear laser light. 9A is a top view, FIG. 9B is a cross-sectional view corresponding to AA ′, and FIG. 9C is a cross-sectional view corresponding to CC ′.
[0108]
After that, the crystalline semiconductor film 807 is etched by a dry etching method or a wet etching method to expose the second insulating film 803 (or the buffer film 804 thereon). Through this step, the crystalline semiconductor film 807 can be selectively left only in the concave portion (FIG. 9C). At this time, since the second insulating film does not exist in the source region and the drain region, it is not necessary to provide a resist mask for leaving the crystalline semiconductor film for the source wiring and the drain wiring. Therefore, the number of masks can be reduced by etching the shape of the second insulating film 803 and the crystalline semiconductor film 807 in this embodiment.
[0109]
Note that the etching step may use not only a dry etching method or a wet etching method but also a mechanical polishing method such as CMP (Chemical Mechanical Polishing). Moreover, you may use a chemical method and a mechanical method together.
[0110]
Next, resist masks 808 (a) and 808 (b) are formed as shown in FIG. 10A is a top view, FIG. 10B is a cross-sectional view corresponding to AA ′, FIG. 10C is a cross-sectional view corresponding to BB ′, and FIG. It is sectional drawing corresponding to CC '. The crystalline semiconductor film is patterned using the resist masks 808 (a) and 808 (b) as masks to obtain island-shaped semiconductor films.
[0111]
Regarding the subsequent steps, the steps described in Embodiment Mode 1 may be referred to, and thus the description in this embodiment mode is omitted.
[0112]
This embodiment is characterized in that the insulating film 803 is not provided in the source region and the drain region of the island-shaped semiconductor film to be formed. Since the insulating film 803 is not provided in the source region and the drain region in this manner, the possibility of disconnection of the source wiring and the drain wiring is reduced, contact defects are further reduced, and the degree of freedom in circuit design of the semiconductor element is increased.
[0113]
Further, according to this embodiment mode, since the channel formation region can be formed in a self-aligned manner by the second insulating film 803, the convex portion of the second insulating film is caused by a pattern shift when the channel formation region is formed. Thus, it is possible to prevent the channel formation region from being erroneously formed, to reduce a situation in which a crystal grain boundary is included in the channel formation region, and to improve the yield.
[0114]
Note that the steps of etching the crystalline semiconductor film 807 by the dry etching method or the wet etching method of this embodiment to expose the second insulating film 803 (or the buffer film 804 thereon) are described in Embodiments 1 and 2. Can be combined.
[0115]
(Embodiment 4)
In this embodiment, an example in which the second insulating film 103 is removed after the island-like semiconductor film 109 is formed in Embodiment 1 is described. Note that FIG. 11A is a top view of a thin film transistor in the case where this embodiment mode is implemented. FIGS. 11B to 11D are cross-sectional views taken along lines AA ′ and BB in FIG. It is sectional drawing cut | disconnected by ', CC'. Further, the reference numerals of the drawings used in Embodiment 1 may be referred to for the reference numerals of the drawings.
[0116]
Since the second insulating film 103 is removed in a region other than under the island-shaped semiconductor films 109 (a) and 109 (b) of this embodiment mode, an island-shaped semiconductor film as illustrated in FIG. Since the gate electrode covers up to the side surfaces 109 (a) and 109 (b), the width of the effective channel formation region increases, and the driving capability of the thin film transistor increases. In addition, an unnecessary step on the substrate surface is reduced by this embodiment, and the number of routing wirings such as a gate wiring, a source wiring, and a drain wiring overcoming the level difference due to the second insulating film 103 can be reduced. Therefore, it is possible to prevent defects such as disconnection due to overcoming defects.
[0117]
Note that this embodiment can be freely combined with any of Embodiments 1 to 3.
[0118]
(Embodiment 5)
In this embodiment mode, a structure of a laser irradiation apparatus used for carrying out the present invention will be described with reference to FIG. In FIG. 12, two laser oscillation devices are used, but the number of laser oscillation devices is not limited to this number, and may be three, four, or more.
[0119]
The laser oscillator 11 uses a chiller 12 to keep the temperature constant. The chiller 12 is not necessarily provided. However, by keeping the temperature of the laser oscillation device 11 constant, it is possible to suppress the energy of the output laser light from varying depending on the temperature.
[0120]
Further, the optical system 14 can focus the laser beam by changing the optical path output from the laser oscillation device 11 or processing the shape of the laser beam. Furthermore, in the laser irradiation apparatus of FIG. 12, the laser beams of the laser beams output from the plurality of laser oscillation apparatuses 11 can be combined by the optical system 14 by superimposing a part thereof.
[0121]
Note that an AO modulator 13 that can primarily and completely shield the laser light may be provided in the optical path between the substrate 16 that is the object to be processed and the laser oscillation device 11. Further, instead of the AO modulator, an attenuator (light quantity adjustment filter) may be provided to adjust the energy density of the laser light.
[0122]
Further, a means (energy density measuring means) 20 for measuring the energy density of the laser beam output from the laser oscillation device 11 is provided in the optical path between the substrate 16 that is the object to be processed and the laser oscillation device 11 for measurement. The computer 10 may monitor the change in energy density over time. In this case, the output from the laser oscillation device 10 may be increased so as to compensate for the attenuation of the energy density of the laser beam.
[0123]
The combined laser beam is applied to the substrate 16 as the object to be processed through the slit 15. The slit 15 is preferably formed of a material that can block the laser beam and that is not deformed or damaged by the laser beam. The slit 15 has a variable slit width, and the width of the laser beam can be changed according to the width of the slit. Note that the slit is not necessarily provided.
[0124]
When the slit 15 is not provided, the shape of the laser beam on the substrate 16 of the laser light oscillated from the laser oscillation device 11 differs depending on the type of laser, and can be formed by an optical system.
[0125]
The substrate 16 is placed on the stage 17. In FIG. 12, the position control means 18 and 19 are means for controlling the position of the laser beam on the workpiece, and the position of the stage 17 is controlled by the position control means 18 and 19. In FIG. 12, the position control means 18 controls the position of the stage 17 in the X direction, and the position control means 19 controls the position of the stage 17 in the Y direction.
[0126]
In FIG. 12, the position of the laser beam is controlled by moving the substrate, but it may be moved using an optical system such as a galvanometer mirror, or both.
[0127]
Further, the laser irradiation apparatus of FIG. 12 has a computer 10 having both storage means such as a memory and a central processing unit. The computer 10 controls the position control means 18 and 19 so as to control the oscillation of the laser oscillating device 11 to determine the scanning path of the laser beam and to scan the laser beam of the laser beam according to the determined scanning path. The substrate can be moved to a predetermined position.
[0128]
Further, in FIG. 12, the width of the slit 15 described above can be controlled by the computer 10, and the width of the laser beam can be changed according to the mask pattern information.
[0129]
Further, the laser irradiation apparatus may include a means for adjusting the temperature of the object to be processed. Further, since the laser light is light having high directivity and energy density, a damper may be provided to prevent the reflected light from being irradiated to an inappropriate place. The damper desirably has a property of absorbing reflected light, and cooling water may be circulated in the damper to prevent the temperature of the partition wall from rising due to absorption of the reflected light. Further, a means for heating the substrate (substrate heating means) may be provided on the stage 17.
[0130]
In the case where a marker used as a guide for mask alignment is formed by a laser, a laser oscillation device for the marker may be provided. In this case, the computer 10 may control the oscillation of the marker laser oscillator. Further, in the case where a marker laser oscillation device is provided, an optical system for condensing the laser beam output from the marker laser oscillation device is separately provided. The laser used for forming the marker is typically a YAG laser or CO. ₂ A laser or the like can be mentioned, but it is of course possible to form using other lasers.
[0131]
Further, one CCD camera 21 may be provided for positioning using the marker, and in some cases, several CCD cameras 21 may be provided. The CCD camera means a camera using a CCD (charge coupled device) as an image sensor. Further, the substrate may be aligned by recognizing the pattern of the insulating film or the semiconductor film by the CCD camera 21 without providing the marker. In this case, the positional information of the substrate is grasped by comparing the pattern information of the insulating film or semiconductor film by the mask inputted to the computer 10 with the actual pattern information of the insulating film or semiconductor film collected by the CCD camera 21. can do. In this case, it is not necessary to provide a marker separately.
[0132]
In addition, the laser light incident on the substrate is reflected by the surface of the substrate and returns to the same optical path as the incident light, which is so-called return light, but the return light is a change in laser output and frequency, rod breakage, etc. Adverse effects. Therefore, an isolator may be installed to remove the return light and stabilize the oscillation of the laser.
[0133]
Note that FIG. 12 shows the configuration of the laser irradiation apparatus provided with a plurality of laser oscillation apparatuses, but there is an advantage that the optical system can be easily designed by doing so. In the present invention, it is preferable to use a linear laser beam particularly from the viewpoint of improving throughput when the semiconductor film is melted. However, since the optical design becomes very precise when the length of the laser beam is long (X-axis direction in FIG. 2), the optical design burden is reduced by using a plurality of linear laser beams in a superimposed manner. Can be reduced.
[0134]
For example, it is possible to optically combine a plurality of laser beams oscillated from a plurality of laser oscillation devices to form one linear laser beam. FIG. 13A shows an irradiation cross section of each laser beam. Here, a case where the laser light irradiation area has an elliptical shape is taken as an example, but there is no difference depending on the shape.
[0135]
The shape of the laser light varies depending on the type of laser, and can also be shaped by an optical system. For example, the shape of the laser beam emitted from the XeCl excimer laser device (wavelength 308 nm, pulse width 30 ns) L3308 manufactured by Lambda is a rectangular shape of 10 mm × 30 mm (both half-value width in the beam profile). The shape of the laser light emitted from the YAG laser device is circular when the rod shape is cylindrical, and is rectangular when the rod shape is slab type. By further shaping such laser light with an optical system, laser light of a desired size can be produced.
[0136]
FIG. 13B shows the energy density distribution of the laser light in the long axis (longitudinal) direction (X-axis direction) of the laser light shown in FIG. The laser beam shown in FIG. 13A is 1 / e of the peak value of the energy density in FIG. ² This corresponds to a region satisfying the energy density of. The distribution of the energy density of the laser beam having an elliptical laser beam becomes higher toward the center O of the ellipse. As described above, in the laser light illustrated in FIG. 13A, the energy density in the central axis direction follows a Gaussian distribution, and a region where it can be determined that the energy density is uniform becomes narrow.
[0137]
Next, FIG. 13C shows an irradiation cross-sectional shape of the linear laser light when the two laser lights shown in FIG. Note that FIG. 13C illustrates the case where one linear laser beam is formed by superimposing two laser beams, but the number of laser beams to be superimposed is not limited thereto.
[0138]
As shown in FIG. 13C, the respective laser beams are synthesized by matching the major axes of the respective ellipses and overlapping a part of the laser beams to form one linear laser beam. Hereinafter, a straight line obtained by connecting the centers O of the ellipses will be referred to as a central axis of the laser beam.
[0139]
FIG. 13D shows a distribution of energy density in the direction of the central axis x of the combined linear laser light shown in FIG. Note that the laser light illustrated in FIG. 13C is 1 / e of the peak value of the energy density in FIG. ² This corresponds to a region satisfying the energy density of. The energy density is added at the portion where the laser beams before synthesis overlap. For example, as shown in the figure, when the energy densities L1 and L2 of the overlapping laser beams are added, the energy density peak value L3 of each laser beam is approximately equal, and the energy density is flattened between the centers O of the ellipses. .
[0140]
Note that, when L1 and L2 are added, it is ideal to be equal to L3, but in reality, it is not necessarily equal. The allowable range of deviation between the value obtained by adding L1 and L2 and the value L3 can be set as appropriate by the designer.
[0141]
When the laser beam is used alone, the energy density follows a Gaussian distribution, so that it is difficult to irradiate the entire semiconductor film in contact with the flat portion of the insulating film with a uniform energy density. However, as can be seen from FIG. 13D, by superimposing a plurality of laser beams and complementing each other with a low energy density, energy can be obtained rather than using a plurality of laser beams without overlapping. The region having a uniform density is enlarged, and the crystallinity of the semiconductor film can be increased efficiently.
[0142]
In addition, the distribution of energy density in BB ′ and CC ′ is slightly smaller than that in CC ′, but it can be regarded as almost the same size. 1 / e of the peak value of the laser beam ² The shape of the synthesized linear laser beam in the region satisfying the energy density of can be said to be linear.
[0143]
Note that a region having a low energy density exists in the vicinity of the outer edge of the irradiation region of the synthesized linear laser light. If the region is used, there is a possibility that the crystallinity may be lost. Therefore, it is preferable that the outer edge of the linear laser beam is not used as in the case of using the slit 15 in FIG.
[0144]
The laser irradiation apparatus described in the present embodiment can be used when performing laser light irradiation of the present invention, and can be used when any of Embodiments 1 to 4 is performed. In addition, although there is a merit to obtain a linear laser beam by synthesis, the cost of the optical system and the laser oscillation device increases. Therefore, a desired linear laser beam can be obtained with one laser oscillation device and one optical system. If it can be obtained, there is no problem in using such a laser irradiation apparatus in the practice of the present invention.
[0145]
【Example】
Example 1
[0146]
In this embodiment, a current mirror circuit and a differential amplifier circuit which are analog circuits formed using the present invention will be described.
[0147]
14A-1 and 14A-2 show an equivalent circuit diagram of the current mirror circuit and a top view of a layout example. Note that an example in which the polarities of the thin film transistors 1510 and 1511 included in the current mirror circuit are p-channel type will be described.
[0148]
14A-1, the power supply line Vdd and the drain electrodes of the thin film transistors 1510 and 1511 are connected, the gate electrode of the thin film transistor 1510, the gate electrode and the source electrode of the thin film transistor 1511 are connected, and the source of the thin film transistor 1511 is connected. The electrode is connected to Vss via a current source. Thin film transistors that require consistency are thin film transistors 1510 and 1511 surrounded by a dotted line.
[0149]
In FIG. 14A-2, a gate electrode is provided over an island-shaped semiconductor film formed between insulating films, and then a source wiring or a drain wiring is provided. The source wiring and the drain wiring are connected to the impurity regions (source region and drain region) of the island-like semiconductor film through contact holes. The channel formation regions of the thin film transistors 1510 and 1511 are formed from crystalline semiconductor films on the same line.
[0150]
That is, channel forming regions of at least the thin film transistors having the same polarity among the thin film transistors constituting the current mirror circuit which is an analog circuit are formed on the same line. Of the thin film transistors constituting the current mirror circuit which is an analog circuit, the channel forming region of the thin film transistor sharing at least the gate electrode (that is, the thin film transistor electrically connected to the same gate electrode) is formed on the same line. .
[0151]
This island-shaped semiconductor film may be formed by any of the methods in Embodiment Modes 1 to 5.
Needless to say, the polarity of the thin film transistor included in the current mirror circuit may be an n-channel type.
[0152]
14B-1 and 14B-2 are an equivalent circuit diagram of a differential amplifier circuit and a top view of a layout example. Note that an example in which the thin film transistors 1512 and 1513 included in the differential amplifier circuit are p-channel types and the polarities of the thin film transistors 1514, 1515, and 1600 are n-channel types will be described.
[0153]
In FIG. 14B-1, the power supply line Vdd and the drain electrodes of the thin film transistors 1512 and 1513 are connected. In addition, the gate electrode of the thin film transistor 1510 is connected to the gate electrode and the source electrode of the thin film transistor 1511. In addition, the source electrode of the thin film transistor 1512 and the source electrode of the thin film transistor 1514 are connected. In addition, the source electrode of the thin film transistor 1513 and the source electrode of the thin film transistor 1515 are connected. In addition, the drain electrode of the thin film transistor 1514 and the drain electrode of the thin film transistor 1515 are connected to Vss through the thin film transistor 1600. Thin film transistors that require consistency are thin film transistors 1512 and 1513 and thin film transistors 1514 and 1515 surrounded by dotted lines, respectively.
[0154]
In FIG. 14B-2, a gate electrode is provided over an island-shaped semiconductor film formed between insulating films, and then a source wiring or a drain wiring is provided. The source wiring and the drain wiring are respectively connected to the impurity regions (source region and drain region) of the island-like semiconductor film through contact holes. The channel formation regions of the thin film transistors 1512 and 1513 which are required to be aligned surrounded by a dotted line are formed of the same crystalline semiconductor film, and the thin film transistors 1514 and 1515 which are required to be aligned surrounded by another dotted line. It can be seen that the channel forming regions are formed of crystalline semiconductor films on the same line.
[0155]
That is, among the thin film transistors constituting the differential amplifier circuit which is an analog circuit, at least the channel forming regions of the thin film transistors having the same polarity are formed on the same line. In addition, among thin film transistors constituting a differential amplifier circuit which is an analog circuit, a channel forming region of a thin film transistor sharing at least a gate electrode (that is, a thin film transistor electrically connected to the same gate electrode) is formed on the same line. Yes. Further, in a differential amplifier circuit which is an analog circuit, in an analog circuit to which a plurality of input signals are applied, a channel forming region of a thin film transistor of the same polarity having a gate electrode to which the same input signal is applied is formed on the same line. Yes.
[0156]
In FIG. 14, the number of island-shaped semiconductor films functioning as channel formation regions of p-channel thin film transistors is three, and the number of island-shaped semiconductor films functioning as channel formation regions of n-channel thin film transistors is two. Although the example which is a book is described, this invention is not limited to this. The designer may design appropriately from the field effect mobility of the thin film transistor and the characteristics required for the circuit. Note that the lengths in the channel width direction of the island-shaped semiconductor films constituting the channel formation regions of the p-channel thin film transistor and the n-channel thin film transistor may be different. However, in order to ensure a margin for the crystallization process and uniform crystallinity, it is preferable that they are common.
[0157]
As described above, since the crystallinity of the island-like semiconductor film of the thin film transistor in which the matching required by the current mirror circuit or the differential amplifier circuit is uniform, the present invention has a small variation and high matching between the thin film transistors. The provided current mirror circuit and differential amplifier circuit can be obtained. In addition, it is possible to designate a region where a channel formation region is formed and to form a crystalline semiconductor region in which no crystal grain boundary exists in the region, so that a current mirror capable of high-speed operation and high current driving capability A circuit and a differential amplifier circuit can be obtained.
[0158]
The pixel portion of the light emitting display device having the current mirror circuit formed according to the present invention and the current source (constant current source) of the signal line driver circuit can obtain high matching, and the performance of the light emitting display device can be improved. it can.
[0159]
(Example 2)
This embodiment describes a circuit of an analog switch formed by using the present invention.
[0160]
FIG. 15 shows an equivalent circuit diagram (A) and a top view (B) of a layout example of two adjacent analog switches SW1 and SW2 (analog switches surrounded by broken lines). Note that an example in which the thin film transistors 1516 and 1518 included in the two analog switches are p-channel type and the polarity of the thin film transistors 1517 and 1519 is an n-channel type will be described.
[0161]
Thin film transistors 1516 and 1518 or thin film transistors 1517 and 1519 are required to have consistency in the analog switch of this embodiment. In the present embodiment, an example in which two thin film transistors that require matching of the analog switch are described will be described. However, it is needless to say that the present invention is not limited to two thin film transistors.
[0162]
15A, a wiring to which an input signal (Signal) is input, a gate electrode of the thin film transistor 1517 of SW1, and a gate electrode of the thin film transistor 1519 of SW2 are connected. A wiring to which an inversion signal (Signalb) is input is connected to the gate electrode of the thin film transistor 1516 of SW1 and the gate electrode of the thin film transistor 1518 of SW2. SW1 and SW2 are input signals V _IN Is input and the output signal V _OUT Is output.
[0163]
15B, a gate electrode is provided over the island-shaped semiconductor film formed between the insulating films, and then a source wiring or a drain wiring is provided. The source wiring and the drain wiring are connected to the impurity regions (source region and drain region) of the island-like semiconductor film through contact holes. The channel formation regions of the thin film transistors 1516 and 1518 that require one consistency are formed from the crystalline semiconductor film on the same line, and the channel formation regions of the thin film transistors 1517 and 1519 that require the other alignment are on the same line. It can be seen that the film is formed from a crystalline semiconductor film.
[0164]
In FIG. 15, the number of island-shaped semiconductor films functioning as channel formation regions of p-channel thin film transistors is three, and the number of island-shaped semiconductor films functioning as channel formation regions of n-channel thin film transistors is two. Although the example which is a book is described, this invention is not limited to this. The designer may design appropriately from the field effect mobility of the thin film transistor and the characteristics required for the circuit. Note that the lengths in the channel width direction of the island-shaped semiconductor films constituting the channel formation regions of the p-channel thin film transistor and the n-channel thin film transistor may be different. However, in order to ensure a margin for the crystallization process and uniform crystallinity, it is preferable that they are common.
[0165]
As described above, according to the present invention, since the channel formation region of the thin film transistor in which the consistency of the plurality of analog switches is required is formed from the crystalline semiconductor film of the same line having the same crystallinity, there is no variation between the plurality of circuits. A small analog switch with uniform characteristics can be obtained.
[0166]
Since the pixel portion of the light emitting display device having an analog switch formed according to the present invention has the characteristics of the analog switch by the same current signal, the performance of the light emitting display device can be improved.
[0167]
(Example 3)
The present invention can be applied to various semiconductor devices. A display panel manufactured based on Embodiment Modes 1 to 5 and Embodiments 1 and 2 will be described. Note that specific examples of the display panel described in this embodiment include a display panel using a transistor as a semiconductor element, such as a liquid crystal display panel, an EL (electroluminescence) display panel, or a display panel for FED (field emission display). . Of course, these display panels include those distributed in the market as modules.
[0168]
In FIG. 16, a substrate 900 includes a pixel portion 902, gate signal side driver circuits 901a and 901b, a data signal side driver circuit 901c, an input / output terminal portion 908, and a wiring or a wiring group 917.
[0169]
The seal pattern 940 is a pattern for creating a sealed space between the counter substrate 920 and the substrate 900. The liquid crystal display panel encloses liquid crystal, and the EL panel protects the EL material (especially organic EL material) from the outside air. Play a role. The gate signal side driver circuits 901a and 901b, the data signal side driver circuit 901c, and a wiring or a wiring group 917 that connects the driver circuit portion and the input terminal may partially overlap. In this way, the area of the frame region (the peripheral region of the pixel portion) of the display panel can be reduced. An FPC (flexible printed circuit) 936 is fixed to the external input terminal portion.
[0170]
Furthermore, a chip on which various logic circuits, high-frequency circuits, memories, microprocessors, media processors / DSPs (Digital Signal Processors), graphics LSIs, cryptographic LSIs, amplifiers, and the like are formed using transistors obtained by implementing the present invention. 950 is implemented. These functional circuits are formed with design rules different from those of the pixel portion 902, the gate signal side drive circuits 901a and 901b, and the data signal side drive circuit 901c. Specifically, a design rule of 1 μm or less is applied. The Note that the external input terminal portion and the chip 950 are preferably protected by a resin (Mole resin or the like) 937. The mounting method is not limited, and a method using a TAB tape, a COG (chip on glass) method, or the like can be applied.
[0171]
For example, the semiconductor integrated circuit of the present invention can be applied as a switching element of the pixel portion 902 and further as an active element constituting the gate signal side driver circuits 901a and 901b and the data signal side driver circuit 901c. Of course, this embodiment shows an example of a display panel obtained by carrying out the present invention, and is not limited to the configuration of FIG.
[0172]
Example 4
Various electronic devices can be completed using the present invention. Examples thereof include portable information terminals (electronic notebooks, mobile computers, mobile phones, etc.), video cameras, digital cameras, personal computers, television receivers, mobile phones, and the like. An example of them is shown in FIG. Note that the electronic device shown here is just an example, and the present invention is not limited to these applications.
[0173]
FIG. 17A illustrates an example of completing a television receiver by applying the present invention, which includes a housing 3001, a support base 3002, a display portion 3003, and the like. By using a transistor manufactured according to the present invention for an integrated circuit such as a driver circuit of a display portion, a memory, and various other logic circuits, a high-performance integrated circuit with little variation can be formed and incorporated on glass. According to the present invention, a television receiver can be completed.
[0174]
FIG. 17B shows an example in which the present invention is applied to complete a video camera, which includes a main body 3011, a display portion 3012, an audio input portion 3013, an operation switch 3014, a battery 3015, an image receiving portion 3016, and the like. . By using a transistor manufactured according to the present invention for an integrated circuit such as a driver circuit of a display portion, a memory, and various other logic circuits, a high-performance integrated circuit with little variation can be formed and incorporated on glass. A video camera can be completed by the present invention.
[0175]
FIG. 17C illustrates an example in which a laptop personal computer is completed by applying the present invention, which includes a main body 3021, a housing 3022, a display portion 3023, a keyboard 3024, and the like. By using a transistor manufactured according to the present invention for an integrated circuit such as a driver circuit of a display portion, a memory, and various other logic circuits, a high-performance integrated circuit with little variation can be formed and incorporated on glass. The personal computer can be completed by the present invention.
[0176]
FIG. 17D is an example in which a PDA (Personal Digital Assistant) is completed by applying the present invention, and includes a main body 3031, a stylus 3032, a display portion 3033, operation buttons 3034, an external interface 3035, and the like. By using a transistor manufactured according to the present invention for an integrated circuit such as a driver circuit of a display portion, a memory, and various other logic circuits, a high-performance integrated circuit with little variation can be formed and incorporated on glass. A PDA can be completed by the present invention.
[0177]
FIG. 17E is an example in which a sound reproducing device is completed by applying the present invention, specifically, an in-vehicle audio device, which includes a main body 3041, a display portion 3042, operation switches 3043, 3044, and the like. Has been. By using a transistor manufactured according to the present invention for an integrated circuit such as a driver circuit of a display portion, a memory, and various other logic circuits, a high-performance integrated circuit with little variation can be formed and incorporated on glass. According to the present invention, an audio device can be completed.
[0178]
FIG. 17F illustrates an example in which the present invention is applied to complete a digital camera. A main body 3051, a display portion (A) 3052, an eyepiece portion 3053, an operation switch 3054, a display portion (B) 3055, a battery 3056. Etc. By using a transistor manufactured according to the present invention for an integrated circuit such as a driver circuit of a display portion, a memory, and various other logic circuits, a high-performance integrated circuit with little variation can be formed and incorporated on glass. According to the present invention, a digital camera can be completed.
[0179]
FIG. 17G illustrates an example in which a cellular phone is completed by applying the present invention, which includes a main body 3061, an audio output portion 3062, an audio input portion 3063, a display portion 3064, operation switches 3065, an antenna 3066, and the like. Yes. By using a transistor manufactured according to the present invention for an integrated circuit such as a driver circuit of a display portion, a memory, and various other logic circuits, a high-performance integrated circuit with little variation can be formed and incorporated on glass. According to the present invention, a mobile phone can be completed.
[0180]
【The invention's effect】
According to the present invention, a channel formation region can be manufactured from a crystalline semiconductor film of the same line with uniform crystallinity.
[0181]
In addition, the present invention can form a plurality of semiconductor elements that require consistency from crystalline semiconductor films on the same line with uniform crystallinity, and can provide a semiconductor circuit with little variation between the semiconductor elements. A semiconductor integrated circuit can be provided.
[0182]
Furthermore, the present invention can provide a semiconductor circuit having a small variation between analog switches in a plurality of analog circuits (for example, between analog switch circuits).
[0183]
The present invention also provides a semiconductor element or a semiconductor device having a high current driving capability that can operate at high speed by designating a region in which the channel formation region is formed and forming a crystalline semiconductor region in which no crystal grain boundary exists. A semiconductor integrated circuit including a semiconductor element group can be provided.
[0184]
In addition, the reliability of a flat display device (flat panel display) represented by a liquid crystal display device and an EL (electroluminescence) display device having the semiconductor integrated circuit of the present invention can be improved.
[Brief description of the drawings]
FIGS. 1A and 1B are a top view and a vertical cross-sectional view illustrating a manufacturing process of a transistor of the present invention. FIGS.
FIGS. 2A and 2B are a top view and a vertical cross-sectional view illustrating a manufacturing process of a transistor of the present invention. FIGS.
FIGS. 3A and 3B are a top view and a vertical cross-sectional view illustrating a manufacturing process of a transistor of the present invention. FIGS.
4A to 4C are a top view and a vertical cross-sectional view illustrating a manufacturing process of a transistor of the present invention.
FIGS. 5A and 5B are a top view and a vertical cross-sectional view illustrating a manufacturing process of a transistor of the present invention. FIGS.
FIGS. 6A and 6B are a top view and a vertical cross-sectional view illustrating a manufacturing process of a transistor of the present invention. FIGS.
FIG. 7 is a vertical cross-sectional view illustrating details of the relationship between the shape of the opening in crystallization and the form of the crystalline semiconductor film.
FIGS. 8A and 8B are a top view and a vertical cross-sectional view illustrating a manufacturing process of a transistor of the present invention. FIGS.
FIGS. 9A and 9B are a top view and a vertical cross-sectional view illustrating a manufacturing process of a transistor of the present invention. FIGS.
FIGS. 10A and 10B are a top view and a vertical cross-sectional view illustrating a manufacturing process of a transistor of the present invention. FIGS.
FIGS. 11A and 11B are a top view and a vertical cross-sectional view illustrating a manufacturing process of a transistor of the present invention. FIGS.
FIG. 12 is a diagram showing a laser irradiation apparatus used for carrying out the present invention.
FIG. 13 is a diagram showing a configuration of a laser beam used for carrying out the present invention.
14A and 14B are a top view and a circuit diagram illustrating an example in which a transistor of the present invention is applied to a circuit.
FIGS. 15A and 15B are a top view and a circuit diagram illustrating an example in which a transistor of the present invention is applied to a circuit. FIGS.
FIG 16 illustrates an example of an external view of a semiconductor device of the present invention;
FIG. 17 is a diagram showing a specific example of an electronic device of the invention.
FIG 18 shows crystallinity of a transistor of the present invention.

Claims (19)

A semiconductor circuit including a first thin film transistor and a second thin film transistor,
The first thin film transistor includes a first channel formation region and a first impurity region on an insulating surface, and a first gate provided on the first channel formation region via a gate insulating film,
The second thin film transistor includes a second channel formation region and a second impurity region on the insulating surface, a second gate provided on the second channel formation region via a gate insulating film,
Have
The first impurity region and the second impurity region are made of a crystalline semiconductor film provided over the same protrusion and protrusion,
The semiconductor circuit according to claim 1, wherein the first channel formation region and the second channel formation region are formed of a plurality of linear crystalline semiconductor films not including a crystal grain boundary provided between the same convex portions. A semiconductor circuit including a first thin film transistor and a second thin film transistor,
The first thin film transistor includes a first channel formation region and a first impurity region on an insulating surface, and a first gate provided on the first channel formation region via a gate insulating film,
The second thin film transistor includes a second channel formation region and a second impurity region on the insulating surface, a second gate provided on the second channel formation region via a gate insulating film,
Have
The first impurity region and the second impurity region are made of a crystalline semiconductor film provided over the same protrusion and protrusion,
The first channel formation region and the second channel formation region are provided side by side in the channel length direction and include a plurality of linear crystalline semiconductor films that do not include a crystal grain boundary provided between the same convex portions. A semiconductor circuit characterized by comprising: A semiconductor circuit including a first thin film transistor and a second thin film transistor,
The first thin film transistor includes a first channel formation region and a first impurity region on an insulating surface, and a first gate provided on the first channel formation region via a gate insulating film,
The second thin film transistor includes a second channel formation region and a second impurity region on the insulating surface, a second gate provided on the second channel formation region via a gate insulating film,
Have
The first impurity region and the second impurity region are made of a crystalline semiconductor film provided over the same protrusion and protrusion,
The first channel formation region and the second channel formation region include a plurality of linear crystals that do not include a crystal grain boundary provided between the same protrusions, among the plurality of protrusions made of a stripe-shaped insulating film. A semiconductor circuit comprising a conductive semiconductor film. A semiconductor circuit including a first thin film transistor and a second thin film transistor,
The first thin film transistor includes a first channel formation region and a first impurity region on an insulating surface, and a first gate provided on the first channel formation region via a gate insulating film,
The second thin film transistor includes a second channel formation region and a second impurity region on the insulating surface, a second gate provided on the second channel formation region via a gate insulating film,
Have
The first impurity region and the second impurity region are made of a crystalline semiconductor film provided over the same protrusion and protrusion,
The first channel formation region and the second channel formation region are arranged side by side in the channel length direction, and between the plurality of protrusions made of a stripe-shaped insulating film, the crystal grains provided between the same protrusions A semiconductor circuit comprising a plurality of linear crystalline semiconductor films not including a boundary. In any one of Claims 1 thru | or 4,
The semiconductor circuit, wherein the first gate and the second gate are at the same potential. In any one of Claims 1 thru | or 5,
A semiconductor circuit, wherein the same signal is simultaneously input to the first gate and the second gate. 7. The semiconductor circuit according to claim 1, wherein the semiconductor circuit is a current mirror circuit, a differential amplifier circuit, an analog switch, or a source follower. In any one of Claims 1 thru | or 7,
The length of the crystalline semiconductor film in the channel width direction in the first channel formation region and the second channel formation region is 0.01 μm or more and 2 μm or less. In any one of Claims 1 thru | or 8,
The semiconductor circuit, wherein a thickness of the crystalline semiconductor film in the first channel formation region and the second channel formation region is 0.01 μm or more and 3 μm or less. In any one of Claims 1 thru | or 9,
A semiconductor circuit, wherein the insulating surface is made of aluminum oxide. In any one of Claims 3 thru | or 10,
The semiconductor circuit according to claim 1, wherein an etching rate of the insulating film is faster than an etching rate of quartz under the same measurement conditions. In any one of Claims 3 thru | or 11,
A semiconductor circuit characterized in that the hardness of the insulating film is lower than the hardness of quartz under the same measurement conditions. Forming a first insulating film on the insulating surface;
Forming a second insulating film on the first insulating film;
Forming a concave portion and a convex portion in the second insulating film;
An amorphous semiconductor film is formed covering the concave portion and the convex portion,
Irradiating the amorphous semiconductor film with laser light to form a crystalline semiconductor film,
A method of manufacturing a semiconductor circuit, in which a first island-shaped semiconductor film of a first thin film transistor and a second island-shaped semiconductor film of a second thin film transistor are formed by patterning the crystalline semiconductor film,
The first island-shaped semiconductor film and the second island-shaped semiconductor film are formed over a channel forming region formed in a linear crystalline semiconductor film formed in the concave portion, and the concave portion and the convex portion. Each having an impurity region,
A method for manufacturing a semiconductor circuit, wherein channel forming regions of the first thin film transistor and the second thin film transistor are formed in the concave portion of the same line. In claim 13,
The method for manufacturing a semiconductor circuit, wherein the first thin film transistor and the second thin film transistor each have a gate having the same potential. In claim 13 or claim 14,
A method for manufacturing a semiconductor circuit, wherein the same signal is simultaneously input to gates of the first thin film transistor and the second thin film transistor. In any one of Claims 13 thru | or 15,
The method of manufacturing a semiconductor circuit, wherein the laser beam is a laser beam obtained by condensing a continuously oscillated laser beam in a linear shape. In any one of Claims 13 thru | or 16,
A method for manufacturing a semiconductor circuit, wherein the crystalline semiconductor film is melted and crystallized by the laser light irradiation to form a flat surface. In any one of Claims 13 thru / or Claim 17,
A method of manufacturing a semiconductor circuit, wherein the etching rate of the second insulating film is faster than the etching rate of quartz under the same measurement conditions. In any one of Claims 13 thru / or Claim 18,
A method for manufacturing a semiconductor circuit, wherein the hardness of the second insulating film is lower than the hardness of quartz under the same measurement conditions.

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