JP4665297B2 - Game machine - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a technology for controlling a control device of a gaming machine that pays out prizes such as game balls and medals according to the result of a game at the time of a power failure.
[0002]
[Problems to be solved by the invention]
Conventionally, as a technique for solving a problem related to a power supply of a gaming machine, for example, as disclosed in JP-A-8-789, when a power supply temporarily drops in voltage, a prize is accidentally paid out. A technique for preventing the above is disclosed.
[0003]
However, conventional technology only prevents prizes from being accidentally paid out when the voltage of the power supply temporarily drops. Assuming that when the voltage drops automatically, the gaming machine is operated without any problems, and when the gaming machine stops due to a power failure, the state before the power failure is reproduced when power supply is resumed. It wasn't.
[0004]
Therefore, the non-maskable interrupt input (NMI input (low enable) of the microcomputer MPU1 shown in FIG. 14A, which has been conventionally used for providing gaming machines and controlling the payout of prize balls). The lines shown are only shown in the figure.)) By adding to the power failure signal TDS (a signal that changes from a high (HI) level to a low (LOW) level when the power supply voltage drops due to a power failure), for example, When performing NMI processing as shown in FIG. 14B, the following problems may occur.
[0005]
Conventionally, when the LOW level of the power failure signal TDS is applied to the NMI input, the NMI processing shown in FIG. 14B is activated, and in order, register evacuation (SJ1), stack pointer evacuation (SJ2), 2 ms The winning ball SW monitoring process (SJ3 to SJ5) and the RAM access prohibition (SJ6) are performed until 170 ms later, and the state of the MPU 1 at the time of the power failure is maintained and the power is restored. The power failure processing that enables the MPU 1 to return to the state has been performed.
[0006]
By performing this power outage process, even if a power outage occurs during the game, if the power outage ends and the power is restored, the gaming machine can continue to play subsequent games such as jackpots and high probability games. Become.
However, only when an actual power failure occurs, the NMI processing of FIG. 14B may be started and executed as the power failure processing. However, the NMI processing is also performed when noise is mixed in the power failure signal TDS. It is considered that the game is interrupted by the power failure process even though it has been activated and no power failure has occurred.
[0007]
As shown in FIG. 15A, when the clock signal CLK is 6.0 MHz when the NMI input of the CPU 1 frequently used in gaming machines is 6.0 MHz, as shown in (1), at the rise of the last machine cycle. This is based on the standard that the condition of NMI interrupt is to be LOW for 70 ns.
[0008]
According to this standard, when a power failure signal TDS as shown in FIG. 15B is generated, the power failure signal TDS includes the time for determining the NMI interrupt of (1), and the CPU 1 Start interrupt operation.
However, as shown in FIG. 16, when noise that greatly fluctuates the normal signal state (HI level) of the power failure signal TDS is mixed, the time for determining the NMI interrupt of (1) is just included in the noise. Due to this noise, the CPU 1 erroneously starts the NMI interruption operation, and there is a possibility that the game is interrupted by starting the power failure process although it is not a power failure.
[0009]
In the present invention, when the voltage of the power supply is temporarily lowered, the power failure process is not started accidentally, the game is continued without any trouble, and when the gaming machine is stopped due to the power failure, the power supply is not performed. The purpose of the present invention is to provide a technique capable of providing a continuation of the game by returning to the state before the power failure when resumed.
[0010]
[Means for Solving the Problems and Effects of the Invention]
  As a means for solving the above problems, the gaming machine of the invention of claim 1 is supplied with power and provides a game.A game command means for outputting a command, a game machine configuration means for inputting the command from the game command means and executing a process based on the command, and the game command means when the voltage of the power source is reduced, Or, the above-mentioned gaming machine constituting means comprises a voltage drop process starting means for interrupting and starting a voltage drop process.It is a gaming machine, and the above voltage drop processingA predetermined time after startingVoltage drop signal input means for inputting the voltage drop signal;When the voltage drop signal input means inputs the voltage drop signal, the voltage drop processing continuation means for continuing the voltage drop processing and the voltage drop signal input means can input the voltage drop signal. A voltage drop processing stop means for stopping the voltage drop processing when there is not, the command output from the game command means includes a data signal indicating the content of the command, and the data signal The strobe signal indicating the output timing, and the data signal and the strobe signal are configured to be output simultaneously.Is the gist.
[0011]
  As a result, when a voltage drop signal indicating a voltage drop of the power supply is input, the voltage drop processing start means interrupts and starts the voltage drop processing correspondingly, and after this interrupt start, the voltage drop signal input Means input voltage drop signal.
[0012]
  ElectricWhen the voltage drop signal input means inputs a voltage drop signal, the voltage drop processing is continued as it is. When the voltage drop signal input means does not input a voltage drop signal, the voltage drop signal processing is stopped. Thus, the process for returning to the state before the interruption process is started is performed at the time of the voltage drop.
[0013]
As a result, when the voltage drop signal input means inputs a voltage drop signal, it is determined that the power drop is actually in progress, and processing for the power failure is executed, and the voltage drop signal input means inputs the voltage drop signal. If not, it is possible to determine that a voltage drop signal has been input even though it was not a power outage, and to execute the process when a power outage did not occur. The function is improved, and the ability to maintain the operating state of the gaming machine can be improved.
[0015]
As a result, the voltage drop signal input means inputs a voltage drop signal after a predetermined time from the start of the voltage drop process, and when the voltage drop signal is input here, the voltage drop process continuation means performs the voltage drop process. continue.
As a result, when both the voltage drop signals are present with a predetermined time in between, the voltage drop process is continued and preparations for dealing with a power failure are made. Therefore, if the predetermined time is about 1 ms, for example, when noise having a period or duration shorter than 1 ms is mixed and input into the voltage drop signal, the voltage drop process is erroneously continued and a power failure occurs. It is prevented that the gaming machine is interrupted in spite of the absence. Therefore, only when a power outage actually occurs, processing at the time of voltage drop is continued and processing for a power outage that may interrupt the game is performed, improving the reliability of the function that the gaming machine provides the game It has an extremely excellent effect.
[0017]
  As a result, when the voltage drop signal input means inputs the voltage drop signal after a predetermined time from the start of the voltage drop signal processing, and the voltage drop signal cannot be input here, the voltage drop signal processing stop means Stop processing when the voltage drops.
  As a result, when neither of the voltage drop signals exists for a predetermined time, the process at the time of voltage drop is stopped, and the preparation for responding to the power failure is stopped. Therefore, if the predetermined time is about 1 ms, for example, when noise having a period or duration shorter than 1 ms is mixed and input into the voltage drop signal, the voltage drop process is erroneously continued and a power failure occurs. It is prevented that the gaming machine is interrupted in spite of the absence. Therefore, when a power failure does not actually occur, the processing at the time of the voltage drop is not continued, the processing for the power failure that may interrupt the game is not performed, and the gaming machine provides the game There is an extremely excellent effect that the reliability of the function is improved.
  In the gaming machine according to the first aspect of the present invention, the game command means outputs a command for outputting the data signal and the strobe signal at the same time, and the gaming machine configuration means inputs this command to perform processing based on the command. Execute.
  On the other hand, when the voltage of the power supply decreases, when the voltage drop processing starting means interrupts and starts the voltage drop processing, the game command means or the gaming machine configuration means interrupts the processing so far and performs the voltage drop processing. Run and prepare the gaming machine for a power outage.
  As a result, the data signal and the strobe signal are output at the same time, so that when a power failure occurs, the voltage drop process is not interrupted and activated between the data signal and the strobe signal. It is possible to prevent the data signal and the strobe signal from being separately transmitted from the game command means to the game machine constituting means with a power failure.
  Therefore, if they are transmitted separately, the command cannot be transmitted, and the data signal and the strobe signal that can be transmitted by inputting to the gaming machine constituting means at the same time and the strobe signal are always at the same time. As a result, it is ensured that the information is input to the generating means, and the reliability of the command transmission function of the gaming machine is improved.
[0018]
  Claim2The gaming machine of the invention ofA game command means for receiving a supply of power and outputting a command for providing a game, a game machine configuration means for inputting the command from the game command means and executing a process based on the command, and a voltage of the power source A game machine comprising a voltage drop time process starting means for interrupting and starting the voltage drop process in the game command means or the gaming machine constituting means when the voltage drop is reduced, after the start of the voltage drop process When the voltage drop signal continuation state input means for detecting the continuation state of the voltage drop signal and the voltage drop signal continuation state input means detect that the voltage drop signal is in a continuation state for a predetermined time or more, the voltage When the decrease signal continuation voltage reduction process continuation means for continuing the decrease time process and the voltage drop signal continuation state input means detect that the voltage drop signal has not continued for a predetermined time or more, A lowering signal non-continuous voltage lowering process stop means for stopping a pressure drop process, and the command output from the game command means includes a data signal indicating the content of the command, and an output of the data signal A gaming machine comprising a strobe signal indicating timing, wherein the data signal and the strobe signal are output simultaneouslyIs the gist.
[0019]
Thereby, the voltage drop signal continuation state input means detects the continuation state of the voltage drop signal after the voltage drop process is started, and when it is detected that the voltage drop signal is in a continuation state for a predetermined time or more, The voltage continuation process at the time of the voltage drop at the time of the decrease signal continues the process at the time of voltage drop.
[0020]
As a result, when the voltage drop signal continues for a predetermined time or more, the voltage drop process is continued, and preparations for dealing with a power failure are made. Therefore, if the predetermined time is about 1 ms, for example, when noise having a period or duration shorter than 1 ms is mixed and input into the voltage drop signal, the voltage drop process is erroneously continued and a power failure occurs. It is prevented that the gaming machine is interrupted in spite of the absence. Therefore, only when a power outage actually occurs, processing at the time of voltage drop is continued and processing for a power outage that may interrupt the game is performed, improving the reliability of the function that the gaming machine provides the game It has an extremely excellent effect.
[0022]
Thereby, the voltage drop signal continuation state input means detects the continuation state of the voltage drop signal after the voltage drop process is started, and when it is detected that the voltage drop signal has not continued for a predetermined time or more, The process stop continuation means at the time of voltage drop at the time of the voltage drop non-continuation stops the process at voltage drop.
[0023]
  As a result, when the voltage drop signal has not continued for a predetermined time or more, the process at the time of voltage drop is stopped, and preparation for dealing with a power failure is not performed. Therefore, if the predetermined time is about 1 ms, for example, if noise having a period or duration shorter than 1 ms is mixed and input into the voltage drop signal, the process at the time of voltage drop is not erroneously continued, and a power failure occurs. It is prevented that the game of the gaming machine is interrupted even though no occurrence has occurred. Therefore, when a power failure does not actually occur, the processing at the time of the voltage drop is not continued, the processing for the power failure that may interrupt the game is not performed, and the gaming machine provides the game There is an extremely excellent effect that the reliability of the function is improved.
  In the gaming machine according to the second aspect of the invention, the game command means outputs a command for outputting the data signal and the strobe signal at the same time, and the gaming machine configuration means inputs this command to perform processing based on the command. Execute.
  On the other hand, when the voltage of the power supply decreases, when the voltage drop processing starting means interrupts and starts the voltage drop processing, the game command means or the gaming machine configuration means interrupts the processing so far and performs the voltage drop processing. Run and prepare the gaming machine for a power outage.
  As a result, the data signal and the strobe signal are output at the same time, so that when a power failure occurs, the voltage drop process is not interrupted and activated between the data signal and the strobe signal. It is possible to prevent the data signal and the strobe signal from being separately transmitted from the game command means to the game machine constituting means with a power failure.
  Therefore, if they are transmitted separately, the command cannot be transmitted, and the data signal and the strobe signal that can be transmitted by inputting to the gaming machine constituting means at the same time and the strobe signal are always at the same time. As a result, it is ensured that the information is input to the generating means, and the reliability of the command transmission function of the gaming machine is improved.
[0024]
  Claim3The gaming machine according to the invention has a provision process information storage means for storing game provision process information used in the process of providing the game, an information storage means for storing information, and when the voltage drop time process is activated. 2. An information saving means for storing the game providing process information stored in the providing process information storing means in the information storing means.Or claim 2A summary of the gaming machine described in.
[0025]
Thereby, the providing process information storage means stores the game providing process information used in the process of providing the game, and when a voltage drop signal indicating a voltage drop of the power source is input thereto, The drop time process starting means interrupts and starts the voltage drop process. When this interrupt is activated, the information saving means stores the game provision process information stored in the provision process information storage means in the information storage means, and then the voltage drop signal input means inputs the voltage drop signal.
[0026]
Then, the processing content selection means selects the processing content of the voltage drop processing based on the input result of the voltage drop signal from the voltage drop signal input means.
For example, when the voltage drop signal input means inputs a voltage drop signal, the voltage drop processing is continued as it is, and when the voltage drop signal input means does not input a voltage drop signal, the voltage drop processing is executed. Based on the information stored in the information storage means, a process of returning to the state before the voltage drop process was interrupted and activated is performed.
[0027]
As a result, when the voltage drop signal input means inputs a voltage drop signal, it is judged that the power is actually cut off, and processing for the power cut is executed, and the voltage drop signal input means inputs the voltage drop signal. If not, it is possible to determine that a voltage drop signal was input even though it was not a power outage, and to execute the process when a power outage did not occur, and to respond accurately to the power outage The function is improved and the ability to maintain the operating state of the gaming machine can be improved.
[0028]
  Claim4In the gaming machine of the invention, power supply voltage lowering signal output means for outputting a voltage lowering signal is added when the voltage of the power source is lower than a predetermined value, or when the voltage is lower than the predetermined value for a predetermined time. Claims 1 to claims3A summary is a gaming machine described in any of the above.
[0029]
As a result, the power supply voltage drop signal output means outputs a voltage drop signal when the voltage of the power supply is equal to or lower than a predetermined value, or when the voltage remains below the predetermined value for a predetermined time.
Therefore, for example, when a power failure occurs and power supply is stopped, a voltage drop signal is output. Alternatively, it is possible to say that the voltage drop signal is not output in the case of only a momentary interruption in which the state where the voltage is equal to or lower than the predetermined value is not continued for a predetermined time.
[0030]
As a result, at the time of creating the voltage drop signal, it is determined whether there is a power failure or if the voltage has fluctuated momentarily. The process of preparing for the above and the process of executing the process when a power failure does not occur are improved, and the function for accurately responding to a power failure is improved. There is an extremely excellent effect that the ability to maintain the operating state can be improved.
[0031]
  Claim5The gaming machine according to the present invention is characterized in that the voltage drop process starting means starts the voltage drop process when a voltage drop signal is input to the external interrupt input of the microcomputer.4A summary is a gaming machine described in any of the above.
[0032]
As a result, the processing at the time of voltage drop is started due to the input of the voltage drop signal to the external interrupt input of the microcomputer. Therefore, it is possible to set the external interrupt characteristics utilizing the external interrupt input standard of the microcomputer. It becomes possible.
For example, if an NMI interrupt is used, powerful interrupt processing can be easily realized without being restricted by the operating state of other software.
[0033]
  Claim6In the gaming machine according to the invention, the external interrupt input of the microcomputer is a non-maskable interrupt input that cannot be masked by software.5The gist of the described gaming machine is a summary.
  As a result, when the voltage drops, the external interrupt input of the microcomputer is activated due to a non-maskable interrupt input that cannot be masked by software. It becomes possible to set.
[0034]
  As a result, powerful interrupt processing can be easily realized without being restricted by the operating state of other software.
  Claim7In the gaming machine of the present invention, the voltage drop signal input means inputs a voltage drop signal from a data bus interface of the microcomputer or an input port.6A summary is a gaming machine described in any of the above.
[0035]
Thereby, the voltage drop signal input means inputs the voltage drop signal from the data bus interface of the microcomputer or the input port.
As a result, the voltage drop signal can be input in consideration of the operating state of other software.
[0036]
  Claim8The gaming machine of the present invention is characterized in that the power supply voltage drop signal output means is provided in power supply means for supplying power to each part of the gaming machine.4Or claims7A summary is a gaming machine described in any of the above.
  Thus, the power supply voltage drop signal output means is provided in the power supply means for supplying power to each unit.
[0037]
  As a result, power supply-related devices can be gathered in one place, enabling miniaturization and unitization. Therefore, an extremely excellent effect that the number of assembling steps can be reduced is achieved.
  Claim9The gaming machine of the present invention is characterized in that the voltage drop time processing starting means is provided in a game control means for providing a game of the gaming machine.8A summary is a gaming machine described in any of the above.
[0038]
  As a result, the voltage drop processing start means interrupts and starts the voltage drop processing in the game control means.
  As a result, when a power failure occurs, the game control means is prepared for a power failure, or a voltage drop signal is input even though it is not a power failure.PlaceIn this case, it is possible to process the game control means in the same way as when a power failure does not occur, and it is possible to improve the ability to provide the gaming machine without interrupting the game. Play.
[0039]
  Claim10The gaming machine of the present invention is characterized in that the voltage drop time process starting means is provided in a prize payout means for receiving a command from the game control means and paying out a prize.9A summary is a gaming machine described in any of the above.
  Thus, the voltage drop process starting means receives the command from the game control means and pays out a prize, and the voltage drop process is interrupted and started.
[0040]
As a result, if a power outage occurs, the prize payout means is prepared for a power outage, or if a voltage drop signal is input even though there is no power outage, the prize payout means is processed in the same way as if no power outage occurred. It becomes possible to do. Therefore, in the event of a power outage, the prize payout operation is completed, and then the prize payout means is shifted to the power outage state to complete the grasp of the prize for which the payout operation has been performed. If it is not an actual power outage, the prizes can be paid out and the prizes can be paid out.
[0051]
DETAILED DESCRIPTION OF THE INVENTION
Next, an embodiment of the invention will be described.
FIG. 1 shows the interface between the main board 1, prize ball control board 3, symbol control board 7, voice control board 9, electrical decoration control board 11, launch control board 13, and power supply board 15. FIG. 2 is a block diagram of an electric control system of the gaming machine 5.
[0052]
Although the appearance of the gaming machine 5 is omitted, the gaming machine 5 provides a pachinko game that pays out a prize (prize ball) of the gaming ball when the gaming ball wins the winning opening and outputs an interesting image or sound. As shown in FIG. 2, a board as shown below is provided with a main board 1 for game control as a center.
[0053]
That is, the gaming machine 5 is omitted in detail, but the main board 1, the prize ball control board 3, the symbol control board 7, the voice control board 9, the illumination control board 11, the launch control board 13, the power supply And a substrate 15.
The main board 1 has an input switch (input SW) 16 as described below, an output solenoid (output SOL) 18 such as a large prize opening SOL, a normal electric accessory SOL, and the number of symbol determinations, jackpot, large An external terminal board 21 for a board such as a prize opening, a supply ball shortage switch (supply ball shortage SW) 23, and a base tray full switch (base plate full SW) 25 are connected.
[0054]
As for the input SW 16, the first type start opening SW, the specific area SW, the big winning opening SW, the normal symbol operating gate SW, the normal electric accessory SW, the normal winning opening SW, etc. are respectively supplied with the switch signal (SW signal) to the main board 1. Supply.
The main board 1 supplies the data signal and the strobe signal to the prize ball control board 3, the symbol control board 7, the voice control board 9, and the illumination control board 11, and generally shows the following. Perform the following process.
[0055]
The prize ball control board 3 uses a prize ball SW31, a ball rental SW33, a prize ball motor control SW35, a prize ball motor 37, and a distribution SOL39 on the basis of the data signal and the strobe signal. While paying out to the dish, a firing control signal is output to the firing control board 13. The prize ball control board 3 is attached with a status indicator 46 to be described later and connected to an external terminal board 41 for a frame. The frame external terminal plate 41 is provided with a prize ball terminal, a ball lending terminal, a metal frame opening terminal, and an inner frame opening terminal, and a metal frame opening SW 43 and an inner frame opening SW 45 are connected thereto.
[0056]
Based on the data signal and the strobe signal, the symbol control board 7 uses the special symbol display device 47 and the normal symbol display device 49 to display the special symbol of the game and the normal symbol.
Based on the data signal and the strobe signal, the sound control board 9 uses the speaker 51 to output sound related to the game.
[0057]
Based on the data signal and the strobe signal, the illumination control board 11 generates an illumination pattern related to the game using the illumination 53 such as an LED.
The launch control board 13 receives a launch control signal, is connected to the touch plate 61, the launch stop SW 63, and the launch motor 65, and controls the launch of the game ball.
[0058]
The main board 1, the prize ball control board 3, the symbol control board 7, the voice control board 9, the illumination control board 11, and the launch control board 13, which have been outlined above, are supplied from the power supply board 15. The reset signal line RSW and the power supply lines DGW (A) and (B) are connected. The reset signal line RSW collects the main board 1, prize ball control board 3, symbol control board 7, voice control board 9, illumination control board 11, and launch control board 13 from the power supply board 15. It is for resetting and is mainly used for initialization at the start of power supply.
[0059]
The power supply line DGW (A) supplies power necessary for the operation of the main board 1 and the prize ball control board 3, and the power supply line DGW (B) includes the symbol control board 7 and the voice control board. 9, the illumination control board 11, and the launch control board 13 supply power necessary for the operation.
[0060]
Further, from the power supply board 15, a power failure signal line TSW and a backup power supply line BKW are connected to the main board 1 and the prize ball control board 3.
The main board 1 to which the power failure signal line TSW and the backup power supply line BKW are supplied, and the prize ball control board 3 are each provided with a CPU, ROM, RAM 17 and 19 constituting a well-known microcomputer. The line BKW supplies the backup power necessary to hold the data in the RAMs 17 and 19 even after the power supplied from the power supply line DGW (A) is reduced. Here, the power supply board 15 that supplies power to the backup power supply line BKW has a capability of supplying backup power for 20 hours or more after the power supplied to the gaming machine 5 is cut off.
[0061]
Next, based on FIG. 1, the power supply board 15, the main board 1, the prize ball control board 3, the symbol control board 7, the voice control board 9, the illumination control board 11, and the launch control board 13. A configuration for performing power supply and signal supply will be described. Detailed description of the configuration is omitted.
[0062]
The power supply board 15 provides power supply and signal supply to the main board 1, prize ball control board 3, symbol control board 7, voice control board 9, illumination control board 11, and launch control board 13. In order to perform, a prize ball number abnormal return SW 121, a power failure signal generation circuit 123, a reset signal (A) generation circuit 125, a main board and a prize ball control board power supply generation circuit (+5 V (A) +12 V (A) backup Power supply 127, a reset signal (B) generation circuit 129, a control board power supply generation circuit (+5 V (B) +12 V (B)) 131, and a power supply generation circuit (+32 V) 133.
[0063]
The award ball number abnormal return SW 121 is a push button switch structure attached to a position where it can be operated from the back side of the gaming machine 5, and is attached on the power supply board 15. Instead of the push button structure, a key switch structure operated with a predetermined key may be used. An award ball number abnormal return line SISW is connected to the award ball number abnormal return SW 121. The award ball number abnormal return line SISW is connected to the main board 1. Details of the connection destination will be described later.
[0064]
The power failure signal generation circuit 123 has a configuration for outputting a power failure signal shown in the timing chart for starting and stopping the power supply board 15 in FIG. 3 and the timing chart in the power failure of the power supply board 15 in FIG.
Here, as shown in (2) of FIG. 3, when the power supply + 5V (A), + 12V (A), and 1032V are normal and the AC24V is not in a power failure state of 20 ms or more, the power failure signal is Hi (high level). ) Is output. Further, as shown in (4) of FIG. 4, when a power failure occurs when AC24V is 20 ms or more and less than 300 ms, the output is Low. When AC24V is restored, Hi is output as shown in (5) of FIG.
[0065]
The reset signal (A) generation circuit 125 has a configuration for outputting the reset signal (A) shown in the timing chart of starting and stopping of the power supply board 15 in FIG. 3 and the timing chart at the time of power failure of the power supply board 15 in FIG. .
Here, as indicated by (3) in FIG. 3, Hi is output 10 ms after the power failure signal is output Hi. Further, as shown in (8), the output is Low after 300 ms from the start of the power failure signal Low output. As indicated by (5) in FIG. 4, the output is Low after 300 ms has elapsed from the start of the power failure signal Low output.
[0066]
The main board and prize ball control board power generation circuit (+5 V (A) +12 V (A) backup power supply) 127 includes a power supply capacitor (not shown), and after the +5 V (A) +12 V (A) power supply is AC 24 V down, As shown in (6) and (8) in FIG. 3, it is specified for 320 ms including 20 ms for determining that the main board 1 and the winning ball control board 3 are in a power outage and 300 ms for performing a power outage process. After the voltage is held, the output becomes Low by natural discharge. As shown in (9) of FIG. 3, the backup power source is connected to the RAM 17 on the main board 1 and the prize ball control board 3 until the power failure recovery guarantee time (discharge time of the electric double layer capacitor, about 20 hours) elapses. , 19 backup power supplies.
[0067]
As indicated by (3) in FIG. 3, the reset signal (B) generation circuit 129 outputs Hi after 10 ms has elapsed since the power failure signal was output Hi. Further, as shown in (6), when a power failure of 20 ms or more occurs, Low (low level) output is performed.
The control board power generation circuit (+ 5V (B) + 12V (B)) 131 includes a power supply capacitor (not shown), and after AC24V goes down, as shown in (6) and (7) in FIG. After holding a specified voltage for 20 ms, the output becomes Low by natural discharge.
[0068]
The power generation circuit (+ 32V) 133 becomes Low output by natural discharge after AC24V is down.
As shown in FIG. 1, a main board 1 that receives +5 V (A), +12 V (A), and backup power from a power supply board 15 by a power supply line DGW (A) includes a CPU, a ROM, a RAM 17, and the like. , A system reset circuit 141 connected to the MPU 71, a power failure signal receiving circuit 143, a prize ball number abnormal return signal receiving circuit 145, a port circuit 147, and a strobe signal transmission A circuit 149 and a data signal transmission circuit 150 are provided.
[0069]
The MPU 71 includes a RESET terminal 151, an NMI terminal 153, PORT terminals 155 and 157, and a DATA terminal 159. Note that the line indicating the low enable, which is the line above the characters “NMI”, like the NMI terminal 153, is described only in the drawings, and is not described in the specification. Unless otherwise specified, the symbols used to describe the terminals of the MPUs 71 and 83 conform to the microprocessor standard indicated by the trademark “Z80” of Zylog Corporation.
[0070]
The RESET terminal 151 is connected to the system reset circuit 141 connected to the reset signal line RSW, and inputs the reset signal (A) via the system reset circuit 141. The operation of the MPU 71 will be described later.
[0071]
The NMI terminal 153 and the PORT terminal 155 are connected to a power failure signal receiving circuit 143 connected to the power failure signal line TSW, and input a power failure signal via the power failure signal receiving circuit 143.
The PORT terminal 157 is connected to a prize ball number abnormal return signal receiving circuit 145 connected to the prize ball number abnormal return line SISW, and the prize ball number abnormal return signal 145 is connected via the prize ball number abnormal return signal receiving circuit 145. Enter.
[0072]
The DATA terminal 159 outputs the data to the strobe signal transmission circuit 149 and the data signal transmission circuit 150 via the port circuit 147, whereby the prize ball control board 3, the symbol control board 7, and the illumination control board. 11 and a data signal are output. The strobe signal is output to the strobe signal line STBW, and the data signal is output to the data signal line DATAW.
[0073]
As shown in FIG. 1, a prize ball control board 3 that receives supply of +5 V (A), +12 V (A), and backup power from a power supply board 15 by a power supply line DGW (A) includes a CPU, a ROM, A micro control unit (MPU) 83 having a RAM 19 and the like, a system reset circuit 161 connected to the MPU 83, a power failure signal receiving circuit 163, a strobe signal receiving circuit 165, a data signal receiving circuit 167, and a port circuit 169 And a launch control signal output circuit 171.
[0074]
The MPU 83 includes a RESET terminal 173, an NMI terminal 175, PORT terminals 177 and 181, an INT terminal 179, and a DATA terminal 183.
The RESET terminal 173 is connected to a system reset circuit 161 connected to the reset signal line RSW, and inputs a reset signal (A) via the system reset circuit 161. The operation of the MPU 83 will be described later.
[0075]
The NMI terminal 175 and the PORT terminal 177 are connected to a power failure signal receiving circuit 163 connected to the power failure signal line TSW, and input a power failure signal via the power failure signal receiving circuit 163.
The INT terminal 179 and the PORT terminal 181 are connected to a strobe signal receiving circuit 165 connected to the strobe signal line STBW, and a strobe signal is input via the strobe signal receiving circuit 165.
[0076]
The DATA terminal 183 inputs a data signal through the data signal receiving circuit 167 connected to the data signal line DATAW and the port circuit 169.
The output of the data signal receiving circuit 167 is connected to the firing control signal output circuit 171.
[0077]
The symbol control board 7 which receives + 5V (B) and + 12V (B) by the power supply line DGW (B) from the power supply board 15 includes a CPU, a ROM, a RAM and the like as shown in FIG. A micro control unit (MPU) 181, a system reset circuit 184 connected to the MPU 181, a strobe signal receiving circuit 185, and a data signal receiving circuit 187 are provided.
[0078]
The MPU 181 includes a RESET terminal 189, an INT terminal 191, and a PORT terminal 193.
The RESET terminal 189 is connected to the system reset circuit 184 connected to the reset signal line RSW, and inputs the reset signal (B) via the system reset circuit 184. The operation of the MPU 181 will be described later.
[0079]
The INT terminal 191 is connected to a strobe signal receiving circuit 185 connected to the strobe signal line STBW, and inputs a strobe signal via the strobe signal receiving circuit 185.
The PORT terminal 193 inputs a data signal via the data signal receiving circuit 187 connected to the data signal line DATAW.
[0080]
The audio control board 9 that receives + 5V (B) and + 12V (B) by the power supply line DGW (B) from the power supply board 15 includes a CPU, ROM, RAM, and the like as shown in FIG. A micro control unit (MPU) 231, a system reset circuit 233 connected to the MPU 231, a strobe signal reception circuit 235, and a data signal reception circuit 237 are provided.
[0081]
The MPU 231 includes a RESET terminal 239, an INT terminal 241 and a PORT terminal 243.
The RESET terminal 239 is connected to the system reset circuit 233 connected to the reset signal line RSW, and inputs the reset signal (B) via the system reset circuit 233. The operation of the MPU 231 will be described later.
[0082]
The INT terminal 241 is connected to the strobe signal receiving circuit 235 connected to the strobe signal line STBW, and inputs the strobe signal via the strobe signal receiving circuit 235.
The PORT terminal 243 inputs a data signal via the data signal receiving circuit 237 connected to the data signal line DATAW.
[0083]
As shown in FIG. 1, the illumination control board 11 that receives +5 V (B) and +12 V (B) from the power supply board 15 by the power supply line DGW (B) includes a CPU, a ROM, a RAM, and the like. A micro control unit (MPU) 201, a system reset circuit 203 connected to the MPU 201, a strobe signal receiving circuit 205, and a data signal receiving circuit 207.
[0084]
The MPU 201 includes a RESET terminal 209, an INT terminal 211, and a PORT terminal 213.
The RESET terminal 209 is connected to the system reset circuit 203 connected to the reset signal line RSW, and inputs the reset signal (B) through the system reset circuit 203. The operation of the MPU 201 will be described later.
[0085]
The INT terminal 211 is connected to the strobe signal receiving circuit 205 connected to the strobe signal line STBW, and inputs the strobe signal via the strobe signal receiving circuit 205.
The PORT terminal 213 inputs a data signal via the data signal receiving circuit 207 connected to the data signal line DATAW.
[0086]
The launch control board 13 that receives +5 V (B), +12 V (B), and +32 V is supplied from the power board 15 by the power supply line DGW (B), as shown in FIG. A control circuit 251, a reset circuit 253 connected to the launch control circuit 251, and a launch control signal input circuit 255 are provided.
[0087]
The firing control circuit 251 inputs the reset signal (B) via the reset circuit 253 connected to the reset signal line RSW, and launches via the firing control signal input circuit 255 connected to the firing control signal line HSSW. Input a control signal.
FIG. 5 is a flowchart of a main control processing routine executed by the main board 1 when power is turned on or when a power failure is restored. This main control processing routine is activated when Hi of the reset signal (A) is input to the main board 1. First, the built-in register setting process of the MPU 71 is performed (S100), and then it is determined whether the RAM 17 attached to the MPU 71 is normal (S110). When the power is turned on, it is determined that the RAM 17 is not normal, and then the RAM 17 is initialized (S120). Thereafter, a power-on command is created (S130). This power-on command is sent to the prize ball control board 3, the symbol control board 7, the voice control board 9, and the illumination control board 11 when the power is turned on, and is actually output by a timer INT process described later. Is done. By outputting the power-on command to the winning ball control board 3, the symbol control board 7, the voice control board 9, and the illumination control board 11, the following processing is performed.
[0088]
The prize ball control board 3 initializes the prize ball control board 3 (initialization of the work area).
The symbol control board 7 designates the display (symbol, background, etc.) when the special symbol display device 47 and the normal symbol display device 49 are turned on.
The voice control board 9 designates silence.
[0089]
The illumination control board 11 designates a standby illumination pattern.
After the creation of the command in S130, next, an INT interrupt that permits all internal and external interrupt factors is permitted (S140), and the random number update process is repeated (S150).
[0090]
Thereby, INT interruption is permitted, and a random number for lottery is created.
If it is determined in S110 that the RAM 17 is normal, i.e., when the power is restored from a power failure, a power failure recovery command described in detail below is created (S160), and power failure recovery processing is performed. Is executed (S170).
[0091]
FIG. 6 is a flowchart of a timer INT processing routine that is normally executed by the main board 1 when the timer INT (2 ms) is generated in the MPU 71.
First, register saving processing is performed (S200), then output processing is performed (S210), and input processing is performed (S220). In the output process, data is output from the MPU 71 to the outside. As the output process, there is a process of outputting a command, which will be described later, from the main board 1 to the prize ball control board 3, the symbol control board 7, and the illumination control board 11 by the return of the number of prize balls performed in S230. . The command is transmitted by a strobe signal and a data signal. In the input process, data is input from outside the MPU 71. As the input process, there is a process of inputting the operation state of the award ball number abnormal return SW 121 attached to the power supply board 15.
[0092]
Next, abnormality detection and return processing are performed (S230), and normal gaming machine processing is performed (S240). In the abnormality detection process, the following four types are detected: a prize ball number abnormality, an underfill full abnormality, a supply ball shortage abnormality, and a prize ball SW31 disconnection / short circuit abnormality.
Detection of abnormal number of prize balls:
When a prize ball command is sent from the main board 1 to the prize ball control board 3, the number of prize balls is added to the prize ball counter, and the timer value is set to xms.
[0093]
Further, when the prize ball passes through the prize ball SW31, the number of prize balls that have passed the prize ball counter is subtracted, and the timer value is set to xms.
The timer value is subtracted, and if the value of the prize ball counter is 5 or more when the timer value becomes 0, the number of prize balls is abnormal (insufficient).
[0094]
Also, if the prize ball counter is subtracted and becomes less than 0, the number of prize balls is abnormal (excess).
When detecting the abnormal number of prize balls, a command for instructing the special symbol display device 47 to display the abnormal number of prize balls is sent from the main board 1 to the symbol control board 7, and the decoration control board 11 is notified of the prize ball number abnormality. Sends a command to display the illumination pattern.
[0095]
Detecting a full tray error:
When the lower tray full switch SW25 is ON, it is determined that the lower tray is full.
A command for instructing to stop paying out a prize ball from the main board 1 to the prize ball control board 3 when the lower saucer is full, and a command for instructing the special symbol display device 47 to display an abnormality in the lower saucer full on the symbol control board 7 Is sent out.
[0096]
Detection of supply ball shortage abnormality:
When the supply ball shortage SW23 is OFF, the supply ball shortage abnormality is assumed.
A command for instructing the stop of payout of the prize ball from the main board 1 to the prize ball control board 3 when the supply ball shortage abnormality occurs, and a command for instructing the symbol control board 7 to display the supply ball shortage abnormality on the special symbol display device 47 Is sent out.
[0097]
Detection of disconnection / short circuit abnormality of prize ball SW31:
When the prize ball SW31 is ON for 1996 ms or longer, the disconnection / short circuit abnormality of the prize ball SW31 is assumed.
When the disconnection / short circuit of the prize ball SW31 is abnormal, the main board 1 sends a command for instructing the prize ball control board 3 to stop paying out the prize ball, and the symbol control board 7 is connected to the special symbol display device 47. Sends a command that indicates the display of a short circuit error.
[0098]
In the return process, the following four types are executed as follows: return of the number of prize balls, return of a full tray tray, return of insufficient supply balls, and return of disconnection / short circuit abnormality of the prize balls SW31.
Return of abnormal number of prize balls:
When a prize ball command is sent from the main board 1 to the prize ball control board 3, the number of prize balls is added to the prize ball counter, and the timer value is set to xms.
[0099]
Further, when the prize ball passes through the prize ball SW31, the number of prize balls that have passed the prize ball counter is subtracted, and the timer value is set to xms. The timer value is subtracted, and when the value of the prize ball counter is less than 5 and the prize ball number is abnormal when the timer value becomes 0, the prize ball number abnormality (insufficient) is returned.
[0100]
Also, an abnormal number of winning balls (both excess and shortage) is restored when the power is turned on or an abnormal number of winning balls return signal. At the time of abnormal return of the number of prize balls, a command for instructing initialization of the prize ball control board 3 is sent from the main board 1 to the prize ball control board 3, and a special symbol display device 47 is informed of an abnormal number of prize balls. A command for instructing non-display is sent, and a command for instructing an illumination pattern for returning the number of prize balls is sent to the illumination control board 11.
[0101]
Restoring the full tray tray error:
When the lower tray full SW 25 is OFF and the lower tray full is abnormal, it is determined that the lower full tray abnormality is restored.
When the lower tray full error is restored, a command is sent from the main board 1 to the prize ball control board 3 to instruct the start of the payout of the prize ball, and a command is sent to the symbol control board 7 to instruct the non-display of the lower tray full error.
[0102]
Recovering from a shortage of supply errors:
When the supply ball shortage SW 23 is ON and the supply ball shortage is abnormal, the supply ball shortage abnormality is returned.
When the supply ball shortage abnormality is returned, the main board 1 sends a command to the prize ball control board 3 to instruct to release the stop of the prize ball payout, and the special symbol display device 47 does not display the supply ball shortage abnormality display on the symbol control board 7. Send the command to instruct.
[0103]
Return of disconnection / short circuit abnormality of prize ball SW31:
When the prize ball SW31 is OFF and the prize ball SW31 is disconnected or short-circuited abnormally, the disconnection or short-circuit abnormality of the prize ball SW31 is returned. When the disconnection / short-circuit abnormality of the prize ball SW31 is recovered, a command to instruct the prize ball control board 3 to release the stop of the prize ball payout is sent from the main board 1, and the symbol ball 31 is sent to the special symbol display device 47 on the symbol control board 7. Sends a command to hide the disconnection / short circuit abnormality.
[0104]
The above is a schematic description of S230.
In the normal game machine processing (S240) to be performed next after the processing of S230, the operation state of the special symbol and the operation state of the normal symbol are transferred from the main board 1 to the prize ball control board 3 and the symbol control board 7. And a command instructing the payout.
[0105]
Although detailed explanation is omitted in the instruction of the special symbol operation state, during the customer waiting demonstration, during the period from the start of the change of the special symbol to the confirmation, from the confirmation of the special symbol to the opening of the first prize winning opening, the first time An operation at the time of detecting an abnormality is instructed to the symbol control board 7 from the opening of the special prize opening to the closing of the final special prize opening and from the final closing of the special prize opening to the start of the change of the special symbol.
[0106]
In the payout instruction, the number of payouts is designated on the prize ball control board 3.
After execution of the normal gaming machine processing of S240, the register is restored (S250), and then INT interrupt permission for canceling the interrupt inhibition by starting this timer INT processing is performed (S260), and this timer INT processing routine is executed. Exit once.
[0107]
In the output processing in S210, among the commands transmitted from the main board 1 to the prize ball control board 3, the prize ball data command for instructing the number of prize balls is a strobe signal, data, as shown in FIG. And is transmitted as a set.
[0108]
As shown in FIG. 12A, the prize ball data output toward the prize ball control board 3 is obtained by inputting the number of prize balls into 8 bits of 0 to 7 of an address 2000H, thereby generating a data signal transmission circuit. 150 is transmitted to the data signal receiving circuit 167 via the data signal line DATAW, and the strobe signal is input from the strobe signal transmitting circuit 149 via the strobe signal line STBW by inputting 1 to the 0 bit of the address 2001H. Then, it is transmitted to the strobe signal receiving circuit 165.
[0109]
This is executed by a program as shown in instruction (1) and instruction (2) in FIG.
In this method, when a command is output from the MPU 71, communication is performed without any problem at normal times.
[0110]
However, if an NMI interrupt occurs between the command (1) and the command (2) when a power failure signal is output, only the prize ball data according to the command (1) is transmitted to the prize ball control board 3. It is just made, and the strobe signal by the instruction {circle over (2)} is not transmitted, and it shifts to the power failure state. In such a state where the strobe signal is not transmitted, the prize ball control board 3 does not input the prize ball data according to the command (1).
[0111]
In this state, when the power failure recovery is performed, the MPU 71 resumes from the instruction (2) and outputs the strobe signal to the prize ball control board 3, but the prize ball data before the power failure already written in the address 2000H is The prize ball control board 3 cannot capture the prize ball data. Therefore, transmission data from the main board 1 to the winning ball control board 3 may be lost depending on the position of the NMI interruption of the power failure signal.
[0112]
In the method in which transmission data may be lost in this way, the method shown in FIG. 12C is used when the reliability is insufficient. In this method, the data signal of the winning ball and the strobe signal are transmitted by one command as shown in the command (3).
In this case, the strobe signal is assigned as 1 byte, the prize ball data is assigned as 1 byte, and the prize ball data command is composed of 2 bytes per command. By this method, even if an NMI interruption due to a power failure signal occurs before and after the instruction (3), the strobe signal and the prize ball data are output in one instruction, so the strobe signal and the prize ball data are always output at the same time. Thus, the prize ball control board 3 is no longer leaked and reliability is improved.
[0113]
FIG. 7 is a flowchart of the NMI processing routine of the MPU 71 of the main board 1.
This NMI processing routine is started when the low level of the power failure signal output from the power supply board 15 is input to the NMI terminal (Low enable) 153 of the MPU 71.
[0114]
First, the register is saved (S300), and then it is determined whether the power failure signal input to the PORT terminal 155 is at the low level (S310). If the power failure signal is not at the low level, it is determined that noise is mixed, the register is restored (S320), and this NMI processing is temporarily terminated as it is.
[0115]
On the other hand, if the power failure signal is at the low level (S310), then it is determined whether 1 ms has elapsed (S315), and the determination whether the power failure signal is at the low level is repeated until 1 ms has elapsed (S310). In S315, it is determined whether 1 ms has elapsed. However, this is not limited to 1 ms, and may be appropriately changed within a range that does not hinder other processing. As a result, if the Low state is continued for 1 ms, it is determined that the voltage has actually decreased, and the stack pointer is first saved (S330), and then after about 2 ms has elapsed (S340). When about 2 ms elapses, a prize ball SW31 monitoring process is performed (S350). By waiting for about 2 ms, the data of the winning ball SW31 input by the timer INT process of FIG. 6 is input and stored without error. This prize ball SW31 monitoring process is performed until 290 ms or more elapses (S360). Here, in order to monitor the winning ball passed after the power failure signal Low is input, the time between 290 ms is that the award paid out at the same time that the power failure signal Low is input to the prize ball control board 3. This is because it takes about 170 ms at the maximum for the ball to pass the prize ball SW31.
[0116]
After the prize ball SW31 monitoring process is performed for 290 ms, the process shifts to the RAM 17 access prohibition state (S370). When the access of the RAM 17 is prohibited, the data stored in the RAM 17 is prohibited from being changed.
Here, the power supply by +5 V (A) and +12 V (A) to the main board 1 is stopped, and the MPU 71 shifts to the stop state. The RAM 17 holds stored contents by a backup power source.
[0117]
The power supply of +5 V (A) and +12 V (A) by the power supply line DGW (A) is secured until the MPU 71 shifts to the stop state and the power failure process of the MPU 71 is completed. Thereafter, even after the power supply from the power supply line DGW (A) is cut off, the stored contents are retained for 20 hours or more by the backup power supplied from the backup power supply line BKW.
[0118]
When the power failure signal supplied to the MPU 71 becomes low level as shown in FIG. 13A due to the above-described NMI processing S310 and S315, when the NMI interrupt determination period shown in (1) follows, The MPU 71 starts an interrupt operation from the machine cycle.
[0119]
After this interrupt operation is started, it is monitored whether the interrupt signal is at a low level for 1 ms. Here, if the low level of the power failure signal continues for 1 ms, it is determined that the power failure is an actual power failure, and processing for the power failure is executed.
Therefore, even if the noise indicated by (2) in FIG. 13B is mixed into the power failure signal, the Low level is not continued thereafter, so it is determined that the power failure state is not present, and before the Low level of the power failure signal is input. Processing continues.
[0120]
Processing when power is restored from a power failure will be described based on the flowchart of the main control processing routine shown in FIG.
This main control process is started when a reset signal output from the power supply board 15 is input to the RESET terminal 151 of the MPU 71 via the system reset circuit 141. The reset signal is output when power is supplied to the power supply board 15 in a power failure state.
[0121]
When the main control process is started, as described above, first, the built-in register setting process is performed (S100), and then it is determined whether the RAM 17 is normal (S110). As described above, when no data is stored in the RAM 17, the following initialization process described above is performed (S120 to S140). Description is omitted.
[0122]
Further, when the RAM 17 is normal (S110), here, when the access to the RAM 17 in S370 is prohibited by the NMI processing of FIG. A power failure recovery command creation process (S160) is performed, and then a power failure recovery process is performed (S170). Although detailed illustration of the power failure recovery processing is omitted, the control is transferred to the continuation of the processing at the time of the power failure occurrence based on the current data stored in the RAM 17. For example, paying out a prize ball or continuing a big hit game.
[0123]
As described above, the main board 1 operates until the input data such as the detection value of the prize ball SW31 is read without leaking and stored in the RAM 17 without being altered in a normal state when a power failure occurs. During a power failure, the stored data is retained by the backup power source to prevent it from being lost. When the power source is restored, the state of the gaming machine 5 is restored to the state immediately before the power failure. Therefore, even if a power failure occurs, the main board 1 returns to the state before the occurrence of the power failure if it recovers from the power failure.
[0124]
Next, processing of the prize ball control board 3 will be described.
FIG. 8 is a flowchart of a main control processing routine executed by the prize ball control board 3 when the power is turned on or the power failure is restored. This main control processing routine is started when Hi of the reset signal (A) is input to the winning ball control board 3. First, the built-in register setting process of the MPU 83 is performed (S400), and then it is determined whether the RAM 19 attached to the MPU 83 is normal (S410). When the power is turned on, it is determined that the RAM 19 is not normal, and then the RAM 19 is initialized (S420). Thereafter, when the main control process is activated, an INT interrupt for canceling the prohibited interrupt is permitted (S430), and a standby state is entered.
[0125]
Further, when it is determined in S410 that the RAM 19 is normal, that is, when recovery from a power failure is performed, a power failure recovery process, which will be described in detail later, is executed (S440).
FIG. 9 is a flowchart of a timer INT processing routine executed every 1 ms by the winning ball control board 3 when the timer INT (1 ms) is generated in the MPU 83.
[0126]
First, register saving processing is performed (S500), then INT interrupt permission for canceling an interrupt prohibited when the timer INT processing is started is performed (S510), output processing by interrupt processing (S520), and input processing are performed. Perform (S530). In the output process, data is output from the MPU 83 to the outside, and in the input process, data is input from the outside of the MPU 83.
[0127]
Next, abnormality detection and return processing are performed (S540), prize ball processing (S550), and ball rental processing (S560) are performed.
In the abnormality detection process, six types of prize ball motor 37 abnormality, rental ball prize ball abnormality, communication abnormality, ball rental SW 33 abnormality, card unit unconnected abnormality, and card unit communication abnormality are detected as follows.
[0128]
Prize ball motor 37 abnormality:
If a foreign object is mixed in a game ball replenished to a prize ball payout device (not shown), the prize ball motor 37 becomes inoperable during the prize ball payout operation or during the rental ball payout operation.
The prize ball control board 3 detects this state from the presence or absence of rotation of the prize ball motor 37 by the prize ball motor control SW 35.
[0129]
When the prize ball control board 3 cannot detect the rotation of the prize ball motor 37, the operation of executing the rotation of the prize ball motor 37 again is repeated, and when the rotation of the prize ball motor 37 cannot be detected again, The dedicated code “1” is displayed on the status indicator 46 in the prize ball control board 3.
[0130]
Communication error:
When the winning ball control board 3 receives a command from the main board 1 and is not determined to be a normal command, the winning ball control board 3 displays a dedicated code “2” on the status indicator 46 in the winning ball control board 3.
[0131]
Rented SW33 abnormality:
If the prize ball control board 3 has an abnormality in the ball rental SW 33, the ball rental payout operation is stopped, and the dedicated code “3” is displayed on the status indicator 46 in the prize ball control board 3.
Rented ball award abnormality:
The prize ball control board 3 stops the payout operation when the game ball is detected by the ball rental SW 33 during the prize ball payout operation or when the game ball is detected by the prize ball SW31 during the ball payout operation. A dedicated code “4” is displayed on the status indicator 46 in the prize ball control board 3.
[0132]
Card unit disconnected error:
When the card unit (not shown) is not connected, the winning ball control board 3 does not perform the rental payout operation, and also stops the operation of the firing control board 13.
A dedicated code “5” is displayed on the status indicator 46 in the prize ball control board 3.
[0133]
Card unit communication error:
When a communication abnormality with a card unit (not shown) is detected, the prize ball control board 3 displays the dedicated code “6” on the status indicator 46 in the prize ball control board 3.
In the abnormal recovery process, the following process is performed.
[0134]
Prize ball motor 37 abnormal recovery:
When the winning ball control board 3 is in a state where it can perform a normal operation, it returns to an abnormal state. A normal code “0” is displayed on the status indicator 46 in the prize ball control board 3.
Communication error recovery:
When the winning ball control board 3 normally receives a command sent from the main board 1, it returns to an abnormal state.
[0135]
A normal code “0” is displayed on the status indicator 46 in the prize ball control board 3.
Rented SW33 abnormal return:
The prize ball control board 3 monitors the disconnection state and the short-circuit state of the ball rental SW 33.
When the ball rental SW 33 recovers, it returns to an abnormal state.
[0136]
A normal code “0” is displayed on the status indicator 46 in the prize ball control board 3.
Rented ball prize ball abnormal return:
The prize ball control board 3 receives a command sent from the main board 1 and returns to an abnormal state.
[0137]
A normal code “0” is displayed on the status indicator 46 in the prize ball control board 3.
Card unit end connection error recovery:
When a card unit (not shown) is connected to the winning ball control board 3, an abnormal recovery is performed. A normal code “0” is displayed on the status indicator 46 in the prize ball control board 3.
[0138]
Card unit communication error recovery:
When normal operation is performed, for example, by replacing a card unit (not shown) with a normal one, a normal code “0” is displayed on the status display 46 in the prize ball control board 3.
After the above-described abnormality detection and return processing in S540, prize ball processing is performed (S550). The prize ball control board 3 on which the prize ball processing is performed receives from the main board 1 an input of a command for initializing the RAM 19 relating to the prize ball, an input of a command for restarting the prize ball payout operation after a power failure recovery, and a prize ball payout A command for stopping the operation and a command for paying out the designated number of payout balls are entered.
[0139]
In the prize ball process, when the prize ball control board 3 completes the reception from the main board 1, the prize ball number corresponding to the received command is paid out.
In the next lending process (S560), communication with a card unit (not shown) is performed, and a lending payout operation is performed.
[0140]
After completion of the above rented ball payout, the register is restored (S570), and this routine is once ended.
Through the timer INT process described above, the prize ball control board 3 executes a process for paying out a prize ball or a rental ball based on a command from the main board 1.
[0141]
FIG. 10 is a flowchart of an INT processing routine that is started each time a strobe signal Low is input to the INT terminal 179 of the MPU 83.
When this INT process is activated, first a register saving process is performed (S600), and then a receiving process is performed (S610). In the reception process, a process of reading the data input to the DATA terminal 183, here, the above-described command supplied from the main board 1 to the winning ball control board 3 is performed. The read command is read in the input process (S530) of the timer INT process shown in FIG. 9, and is used in the processes of S540 to S560.
[0142]
After performing the reception processing of S610, the register is restored (S620), and then INT interrupt permission for canceling the interrupt prohibited at the start of this INT processing is performed (S630), and this routine is temporarily ended.
The command output from the main board 1 is input to the winning ball control board 3 by the INT process of FIG. 10 described above.
[0143]
As described above, when the power failure signal Low is input to the NMI terminal 175 of the prize ball control board 3 that is paying out a prize ball or a rental ball, the NMI process shown in FIG.
First, the register is saved (S700), and based on the input state of the power failure signal to the PORT terminal 177, it is determined whether the NMI is low for about 1 ms (S710). In S710, it is determined whether 1 ms has elapsed. However, the present invention is not limited to 1 ms, and may be appropriately changed within a range that does not hinder other processing. If it is not continued, it is determined that the signal is not an appropriate power failure signal, the register is restored (S715), and this routine is once ended.
[0144]
If it continues for about 1 ms or more, the prize ball motor 37 is stopped (S720), and the prize ball is stopped from being paid out.
Next, it is determined whether the value of the program counter (PC) at the time of NMI occurrence is within the INT processing address (S730), and if it is within the INT processing address, the interrupted program in the INT processing is continued and terminated. (S740) to complete command input and the like.
[0145]
If the PC value at the time of occurrence of NMI is not within the INT processing address, then the register is saved (S750) and the stack pointer is saved (S760), and the next S770-S800 prize ball SW31 is lent. A process of monitoring the sphere SW 33 for 170 ms is performed. The meaning of this is the same as S340 to S360 described above, and the award ball and the rented ball which are paid out simultaneously with the award ball control board 3 are input to the award ball control board 3 through the award ball SW31 and the rented ball SW33. This is because it takes about 170 ms at maximum.
[0146]
After the monitoring process of the winning ball SW31 and the rental ball SW33 is performed for 170 ms, the state shifts to the access prohibition state of the RAM 19 (S810). When the access of the RAM 19 is prohibited, the data stored in the RAM 19 is prohibited from being changed.
[0147]
Here, the power supply to +5 V (A) and +12 V (A) to the prize ball control board 3 is stopped, and the MPU 83 shifts to the stop state. The RAM 19 holds stored contents by a backup power source.
The power supply of +5 V (A) and +12 V (A) by the power supply line DGW (A) is secured until the MPU 83 shifts to the stop state and the power failure process of the MPU 83 is completed. Thereafter, even after the power supply from the power supply line DGW (A) is cut off, the stored contents are retained for 20 hours or more by the backup power supplied from the backup power supply line BKW.
[0148]
When the reset signal output from the power supply board 15 is input to the RESET terminal 151 when the power is restored, the prize-ball control board 3 that has shifted to the power failure state by the NMI process described above is the main control process of FIG. Thus, the RAM 19 is determined to be normal, and the process proceeds to the power failure recovery process of S440, where the stack pointer is restored and the register is restored, and then the process is continued from where it was interrupted.
[0149]
In this case, the prize ball control board 3 receives the restart command sent from the main board 1 after the power failure is restored, and if not paid, the remaining prize ball operation is continued, and then the process proceeds to the normal process.
When the supply of power to the gaming machine 5 is stopped, the main board 1, the winning ball control board 3, and the power board 15 of the gaming machine 5 described above output a power failure signal from the power board 15. Until the memory contents of the RAM 17 of the main board 1 and the RAM 19 of the prize ball control board 3 are not changed, the power supply of +5 V (A) and +12 V (A) is supplied by the power supply line DGW (A). The supply contents are maintained, and then the stored contents are held by the backup power source.
[0150]
Thereby, the current state of the main board 1 of the gaming machine 5 and the prize ball control board 3 at the time of the occurrence of the power failure is saved even during the power failure.
As a result, after the power failure is restored, the power supply voltage returns to an appropriate value, and when the power supply board 15 supplies a reset signal to the main board 1 and the prize ball control board 3, the game is based on the stored contents of the RAMs 17 and 19. The main board 1 of the machine 5 and the prize ball control board 3 are returned to the state before the occurrence of the power failure.
[0151]
The power supply board 15 supplies a power for maintaining the function of the main board 1 and the prize ball control board 3 for 320 ms after a power failure. At the same time, it is provided by supplying a backup power source that retains the contents of the RAMs 17 and 19 even during a power failure.
[0152]
The symbol control board 7 displays a predetermined symbol on the special symbol display device 47 and the normal symbol display device 49 based on the command received from the main board 1.
Here, in response to the received command, the special symbol display device 47 displays when the power is turned on, displays the customer waiting demonstration, displays the game symbol, displays the jackpot symbol, V display, displays the number of times the big prize opening is opened, End of jackpot, abnormal number of prize balls, indication of fullness of the saucer, indication of insufficient supply number, indication of disconnection / short circuit abnormality of prize ball SW31, no indication of abnormal number of prize balls, fullness of the saucer Non-display, non-replenishment abnormality short-circuit display, prize ball SW31 disconnection / short-circuit abnormality non-display, power failure recovery display, and normal symbol display device 49 display when power is turned on and variation pattern display.
[0153]
The symbol control board 7 receives power supply of +5 V (B) and +12 V (B) by the power supply line DGW (B), and when the AC 24 V power supply to the gaming machine 5 is stopped, As the control board power generation circuit (+5 V (B) +12 V (B)) 131 becomes Low output due to natural discharge, the operation is stopped.
[0154]
When the supply of AC 24V power to the gaming machine 5 is resumed, power is supplied from the control board power generation circuit (+ 5V (B) + 12V (B)) 131, and the image is displayed again.
Based on the command received from the main board 1, the voice control board 9 is silent, voice corresponding to the special symbol fluctuation pattern, special symbol stop voice, jackpot start voice, big prize opening voice, Voice output at the opening of the winning opening, and voice output at the end of jackpot.
[0155]
The audio control board 9 receives power supply of +5 V (B) and +12 V (B) by the power supply line DGW (B), and when the power supply of AC 24 V to the gaming machine 5 is stopped, As the control board power generation circuit (+5 V (B) +12 V (B)) 131 becomes Low output due to natural discharge, the operation is stopped.
[0156]
When the supply of AC 24V power to the gaming machine 5 is resumed, power is supplied from the control board power generation circuit (+ 5V (B) + 12V (B)) 131, and audio is output again.
Based on the command received from the main board 1, the illumination control board 11 sends an illumination pattern such as an LED 53 to the illumination pattern on standby, the illumination pattern corresponding to the game symbol, and the electricity corresponding to the stop of the special symbol. Decoration pattern, lighting pattern at the beginning of the jackpot, lighting pattern at the opening of the big winning opening, lighting pattern at the interval between opening of the big winning opening, lighting pattern at the end of the jackpot, lighting pattern with an abnormal number of winning balls, number of winning balls The return illumination pattern, the illumination pattern of the special symbol hold LED, the illumination pattern of the normal symbol hold LED, and the illumination pattern of the probability variation lamp are executed.
[0157]
The illumination control board 11 receives power supply of +5 V (B) and +12 V (B) by the power supply line DGW (B), and when the power supply of AC 24 V to the gaming machine 5 is stopped As the control board power generation circuit (+ 5V (B) + 12V (B)) 131 becomes low output due to natural discharge, the operation is stopped.
[0158]
When the supply of AC 24V power to the gaming machine 5 is resumed, power is supplied from the control board power generation circuit (+ 5V (B) + 12V (B)) 131, and the display of the illumination pattern is performed again.
The launch control board 13 receives +5 V (B), +12 V (B), and +32 V power supply by the power supply line DGW (B), and when the AC 24 V power supply to the gaming machine 5 is stopped. The control board power generation circuit (+ 5V (B) + 12V (B)) 131 and the power generation circuit (+ 32V) 133 stop operating as they become Low output due to natural discharge.
[0159]
When the AC 24V power supply to the gaming machine 5 is resumed, power is supplied from the control board power generation circuit (+ 5V (B) + 12V (B)) 131 and the power generation circuit (+ 32V) 133. Launch control is started.
It should be noted that it takes about 170 ms at the maximum for the award ball and the rented ball to be paid out simultaneously with the award ball SW 31 and the rented ball SW 33 when the low power of the power failure signal is input to the award ball control board 3. However, the present invention is not limited to this, and may be changed as appropriate within a range that does not hinder other processing, depending on a payout mechanism of a prize ball payout device (not shown), a switch mounting position, or the like.
[0160]
In addition, the time described in the explanation of the timing chart of starting and stopping of the power supply board 15 shown in FIGS. 3 and 4 and the timing chart at the time of power failure may be appropriately changed according to each processing capability of each gaming machine. .
Next, the correspondence between the structure of the claims and the embodiment of the invention will be described.
[0161]
  In addition, description is abbreviate | omitted about the subordinate part.
  The voltage drop signal of claim 1 is the low level of the power failure signal, the voltage drop process is the NMI process of FIG. 7, the NMI process of FIG. 11, the voltage drop process starting means is the NMI input function of the MPU 71, the MPU 83 The NMI input function and voltage drop signal input means are S310 and PORT terminal 155, and S710 and PORT terminal 177.ButCorrespond.
[0162]
  Claim1The voltage drop signal input means includes S310 and PORT terminal 155, S710 and PORT terminal 177, and when the voltage drop process is started, the NMI process shown in FIGS. 7 and 11 is started, and a voltage drop signal is input after a predetermined time. , S310, S315, or S710 corresponds, and the voltage continuation processing continuation means corresponds to performing the process in the case of YES in S315 or performing the process in the case of YES in S710.
[0163]
  Claim1The voltage drop process stop means corresponds to performing the process in the case of NO in S310 and performing the process in the case of NO in S710.
  Claim2The voltage drop signal continuation state input means of S310, S315 and PORT terminal 155, S710 and PORT terminal 177, if it is detected that the continuation state has continued for a predetermined time or more, if S315 is YES, or if S710 is YES And the voltage continuation processing unit for the voltage drop at the time of the decrease signal continuation corresponds to performing the process in the case of YES in S315 or performing the process in the case of YES in S710.
[0164]
  Claim2When the voltage drop signal continuation state input means detects that the voltage drop signal has not continued for a predetermined time or more, the case of NO in S310 or the case of NO in S710 corresponds, and the voltage when the drop signal is not continued The lowering process stop means corresponds to performing the process in the case of NO in S310 or performing the process in the case of NO in S710.
[0165]
  Claim3The provision process information storage means corresponds to the register of the MPU 71, the register of the MPU 83, the information storage means corresponds to the RAM 17 and the RAM 19, and the information saving means corresponds to S300 and S700.
  Claim4The power failure signal generation circuit 123 corresponds to the power supply voltage drop signal output means.
[0166]
  Claim5These microcomputers correspond to MPUs 71 and 83, and external interrupt inputs correspond to NMI terminals 153 and 175, respectively.
  Claim6These microcomputers correspond to MPUs 71 and 83, and external interrupt inputs correspond to NMI terminals 153 and 175, respectively.
[0167]
  Claim7PORT terminals 155 and 177 correspond to the data bus interface or input port.
  Claim8The power supply voltage drop signal output means corresponds to the power failure signal generation circuit 123, and the power supply means corresponds to the power supply board 15.
[0168]
  Claim9The voltage lowering process starting means corresponds to the NMI input function of the MPU 71, and the game control means corresponds to the main board 1.
  Claim10The voltage drop processing start means corresponds to the NMI input function of the MPU 83, the game control means corresponds to the main board 1, and the prize payout means corresponds to the prize ball control board 3.
[0170]
  Claim1, 2The game command means is the main board 1, the game machine constituting means is the prize ball control board 3, the voltage drop process starting means is the power failure signal, the NMI process in FIG. 7 and FIG. 11, and the data signal indicating the contents of the command. Is the data signal transmitted from the data signal transmission circuit 150 to the data signal reception circuit 167, and the strobe signal is the strobe signal, data signal and strobe signal transmitted from the strobe signal transmission circuit 149 to the strobe signal reception circuit 165. The main substrate 1 that performs the process shown in FIG. 12C corresponds to being configured to output simultaneously.
[Brief description of the drawings]
FIG. 1 is a block diagram relating to an interface between a main board 1, a prize ball control board 3, a design control board 7, a voice control board 9, an electrical decoration control board 11, a launch control board 13 and a power supply board 15. is there.
FIG. 2 is a block diagram of an electric control system of the gaming machine 5;
FIG. 3 is a timing chart of starting and stopping of a power supply board 15;
FIG. 4 is a timing chart at the time of a power failure of the power supply board 15;
FIG. 5 is a flowchart of a main control processing routine executed by the main board 1 when power is turned on or when a power failure is restored.
6 is a flowchart of a timer INT processing routine that is normally executed by the main board 1 when a timer INT (2 ms) is generated in the MPU 71. FIG.
FIG. 7 is a flowchart of an NMI processing routine of the MPU 71 of the main board 1;
FIG. 8 is a flowchart of a main control processing routine executed by the prize ball control board 3 when power is turned on or when a power failure is restored.
FIG. 9 is a flowchart of a timer INT processing routine executed every 1 ms by the prize ball control board 3 when a timer INT (1 ms) is generated in the MPU 83;
10 is a flowchart of an INT processing routine that is started each time a low strobe signal is input to an INT terminal 179 of an MPU 83. FIG.
FIG. 11 is a flowchart of NMI processing activated by the MPU 83;
FIG. 12 is an explanatory diagram of a strobe signal and a data signal.
FIG. 13 is an explanatory diagram of an NMI interrupt operation for a power failure signal.
FIG. 14 is a block diagram of a conventional MPU 1 and a flowchart of NMI processing.
FIG. 15 is an explanatory diagram of a conventional power failure signal NMI interrupt.
FIG. 16 is an explanatory diagram of a malfunction when noise is added to a conventional power failure signal.
[Explanation of symbols]
1 ... main board, 3 ... prize ball control board, 5 ... gaming machine,
7 ... Symbol control board, 9 ... Voice control board, 11 ... Illumination control board,
13 ... Launch control board, 15 ... Power supply board, 16 ... Input SW,
17, 19 ... RAM, 18 ... output solenoid (output SOL),
21 ... External terminal board for board, 23 ... Supply ball short SW, 25 ... Under tray full SW,
31 ... Prize ball SW, 33 ... Rental ball SW, 35 ... Prize ball motor control SW,
37 ... Prize ball motor, 39 ... Sorting SOL, 41 ... External terminal board for frame,
43... Gold frame opening SW, 45. Inner frame opening SW, 46... Status indicator,
47 ... Special symbol display device, 49 ... Normal symbol display device, 51 ... Speaker,
53 ... Electric decoration, 61 ... Touch plate, 63 ... Launch stop SW,
65 ... Launch motor, 121 ... Award ball number abnormal return SW,
123 ... blackout signal generation circuit, 125 ... reset signal (A) generation circuit,
127: Main board and prize ball control board power generation circuit (+5 V (A) +12 V (A) backup power supply), 129: Reset signal (B) generation circuit,
131 ... Control board power generation circuit (+5 V (B) +12 V (B)),
133 ... power generation circuit (+ 32V),
141, 161, 184, 203, 233 ... system reset circuit,
143, 163 ... blackout signal receiving circuit, 145 ... prize ball number abnormal return signal receiving circuit,
147, 169 ... port circuit, 149 ... strobe signal transmission circuit,
150, data signal transmission circuit, 151, 173, 189, 209, 239, RESET terminal, 153, 175, NMI terminal,
155, 157, 177, 181, 193, 213, 243 ... PORT terminal,
159, 183 ... DATA terminal, 165, 185, 205, 235 ... Strobe signal receiving circuit, 167, 187, 207, 237 ... Data signal receiving circuit,
171: Fire control signal output circuit, 179, 191, 211, 241 ... INT terminal, 251 ... Fire control circuit, 253 ... Reset circuit, 255 ... Fire control signal input circuit, BKW ... Backup power supply line, DGW (A), DGW (B) ... Power supply line, RSW ... Reset signal line, TSW ... Power failure signal line

Claims (10)

A game command means for receiving a power supply and outputting a command for providing a game;
A gaming machine configuration unit that inputs the command from the gaming command unit and executes processing based on the command;
When the voltage of the power supply is reduced, the gaming command means, or a gaming machine comprising a voltage drop time process starting means for interrupting and starting the voltage drop process in the gaming machine configuration means ,
A voltage drop signal input means for inputting the voltage drop signal after a predetermined time from the start of the voltage drop process;
When the voltage drop signal input means inputs the voltage drop signal, the voltage drop processing continuation means for continuing the voltage drop processing;
When the voltage drop signal input means cannot input the voltage drop signal, the voltage drop processing stop means for stopping the voltage drop processing;
With
The command output from the game command means is:
It consists of a data signal indicating the content of the command and a strobe signal indicating the output timing of the data signal,
A gaming machine characterized in that the data signal and the strobe signal are output simultaneously . A game command means for receiving a power supply and outputting a command for providing a game;
A gaming machine configuration unit that inputs the command from the gaming command unit and executes processing based on the command;
When the voltage of the power source is reduced, the gaming command means, or a gaming machine comprising a voltage drop time process starting means for interrupting and starting the voltage drop process in the gaming machine configuration means,
A voltage drop signal continuation state input means for detecting a continuation state of the voltage drop signal after starting the voltage drop processing;
When the voltage drop signal continuation state input means detects that the voltage drop signal is in a continuation state for a predetermined time or more, the voltage drop signal continuation process at the time of voltage drop to continue the process at the time of voltage drop;
When the voltage drop signal continuation state input means detects that the voltage drop signal has not continued for a predetermined time or more, the voltage drop signal non-continuous voltage drop processing stop means for stopping the voltage drop signal processing;
With
The command output from the game command means is:
It consists of a data signal indicating the content of the command and a strobe signal indicating the output timing of the data signal,
A gaming machine characterized in that the data signal and the strobe signal are output simultaneously. Providing process information storage means for storing game providing process information used in the process of providing the game;
Information storage means for storing information;
2. An information saving means for adding the game providing process information stored in the providing process information storing means to the information storing means when the voltage drop process is activated is added. Or a gaming machine according to claim 2 . The power supply voltage drop signal output means for outputting a voltage drop signal when the voltage of the power supply is lower than a predetermined value or when the voltage is lower than the predetermined value continues for a predetermined time is added. The gaming machine according to claim 3 . Game according to any one of claims 1 to 4, characterized in that the voltage drop when processing starting means starts the time of voltage lowering process if you enter a voltage drop signal to the external interrupt input of the microcomputer Machine. 6. The gaming machine according to claim 5 , wherein the external interrupt input of the microcomputer is a non-maskable interrupt input that cannot be masked by software. It said voltage drop signal input means, or the voltage drop signal continues state input means microcomputer data bus interface, or by inputting a voltage drop signal from the input port to any one of claims 1 to 6, characterized in The gaming machine described. The gaming machine according to any one of claims 4 to 7 the power supply voltage decrease signal output means, characterized in that provided in the power supply means for supplying power to each part of the game machine. The gaming machine according to any one of claims 1 to 8 , wherein the voltage drop time process starting means is provided in a game control means for providing a game of the gaming machine. The gaming machine according to any one of claims 1 to 9, characterized in that the voltage drop when processing starting means is provided in the prize payout means for paying out a prize to receive an instruction from the game control means .

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