JP4753589B2 - Game machine - Google Patents

Description

  The present invention relates to a gaming machine controlled by distributed processing of a plurality of control boards.

  The operation of pachinko machines and other gaming machines is realized by distributed processing of a plurality of control boards using a CPU. The control of the operation includes output of the voice and display of the gaming machine, processing at the time of winning a prize during the game, and the like. Such gaming machines are provided with a backup function for holding information during the game using a backup power source.

  The backup function has an advantage that the game can be resumed from a state immediately before the power is turned off even after a power failure occurs during the game or after the power is turned off, even after restoration or after the power is turned on again. On the other hand, even after the game machine is turned off after the store is closed, it may be harmful that the game can be continued from the state at the end of the previous day on the next day. For example, if the game of the previous day is finished with a high probability of jackpot, the game will be resumed with a high probability on the next day, and the operator of the gaming machine will suffer a loss. Similarly, even when a setting for increasing the probability of jackpot is made at the time of manufacturing a gaming machine, the operator will suffer a loss at the time of opening the store after introduction.

  The gaming machine is provided with a RAM clear switch for forcibly erasing backed up information as means for avoiding such adverse effects. When the power is turned on while the RAM clear switch is operated, the gaming machine starts its operation from an initial state unrelated to the power-off state. Conventionally, a technique for notifying an operator that an operation of the RAM clear switch has been accepted has been proposed (see Patent Documents 1 and 2). In these conventional technologies, when the operation of the RAM clear switch is detected, the main control board outputs a command to the sub-control board for controlling the display and the output of the sound to generate the RAM clear sound, The RAM clear notification has been performed by turning it on.

JP 2002-248219 A Japanese Patent Laid-Open No. 2003-205161

  The control board provided in the gaming machine develops control software and data on the RAM as initialization and activation processing after the power is turned on. When these processes are completed, each control board enters a state in which various controls can be executed (hereinafter, this state is referred to as a “ready state”), and can accept a command. In recent years, along with the diversification and sophistication of production, software and data used for production have increased, and there has been a tendency for the startup period to become a ready state to become longer. Such a tendency is particularly prominent in gaming machines equipped with a liquid crystal panel, and some gaming machines have a startup period of several seconds or more.

  When the activation period is prolonged as described above, it takes a long time until the RAM clear is notified after the RAM clear switch is operated and the power is turned on. During this time, since it is unclear whether or not the RAM clear operation has been correctly accepted, the worker needs to continue operating the RAM clear switch, which increases work pain. In addition, since it becomes necessary to wait for a RAM clear notification for a long period of time, work efficiency also deteriorates. Furthermore, if the RAM clear is not notified for a long time after the power is turned on, it cannot be determined whether or not the operation is normally recognized, and the operation is re-executed or the operation is not normally recognized. First, there is a waste time such as waiting for RAM clear notification.

  These adverse effects can occur not only in the RAM clear operation but also in various functions that can be used by the worker to confirm the state of the gaming machine after the power is turned on. The present invention has been made in view of such problems, and an object of the present invention is to provide a technique for enabling an operator to quickly confirm the state of a gaming machine after power is turned on.

  The present invention is directed to a gaming machine including a plurality of control boards. These control boards include an upper control board that transmits a command to other control boards and a lower control board that operates by receiving the command. The upper control board includes, for example, a main control board for controlling the entire gaming machine, and the lower control board includes an effect control board (also referred to as a sub control board) that performs an effect during the game. Is included. Since the upper control board and the lower control board represent a relative relationship between a plurality of control boards, for example, the effect control board is set as the upper control board, and the liquid crystal panel is controlled in accordance with a command from the effect control board. It is also possible to apply the present invention using a substrate as a lower control substrate.

  In the present invention, the lower-level control board is configured to be able to receive commands from the higher-level control board, including the start-up period after the power is turned on, until it enters a ready state in which all control functions can be realized. Until the ready state is reached, the lower control board reads software and data required for the control function and develops them on the RAM (hereinafter, these processes are collectively referred to as “activation”). ). The received command need not be immediately executable. Using this reception function, the upper control board transmits at least a part of the command regardless of whether or not the lower control board is in a ready state. In this way, even after the power is turned on and before the ready state is entered, the state of the gaming machine can be quickly confirmed within a range in which the command from the upper control board can be executed by the lower control board. Therefore, it is possible to improve the efficiency of various confirmation operations after the power is turned on.

  In the present invention, for example, an effect control board for controlling the effect of a gaming machine can be applied as a lower control board. In the game machine, the effect control board has a relatively long start-up period until it becomes ready, so that it is possible to fully utilize the advantages of efficiency according to the present invention. In addition, since it is easy for an operator to check the state of the gaming machine, it is easy to use an effect such as voice or display, so if the present invention is applied to the effect control board, the state of the gaming machine can be quickly and quickly There is an advantage that it can be easily confirmed.

  It is preferable that the lower control board has two or more CPUs operating in cooperation. These CPUs may be in a master-slave relationship or in a parallel relationship. The CPU here includes various chips that analyze commands and execute control, such as VDP (Video Display Processor). When two CPUs are mounted in this way, it is possible to smoothly control the control of the command receiving unit and the execution of the received command by at least one of the CPUs even while the lower control board is activated. Become.

  It is preferable that the lower control board can temporarily hold the received command. A special memory may be prepared for holding the command, or a partial area of the RAM provided in advance may be used as a buffer for holding the command. Further, a function for holding a command may be incorporated in an IC for controlling communication with another board. By making it possible to hold commands by these methods, it is possible to execute commands transmitted from the host control board without omission and to achieve accurate control.

  The upper control board may also switch the transmission timing according to the type of command. For example, some commands that are defined in advance may be transmitted regardless of whether or not they are in a ready state, and other commands may be transmitted after at least an activation period. By doing so, it is possible to limit the commands transmitted to the lower control board during the start-up period, and thus it is possible to suppress the start-up of the lower control board from being delayed due to the reception and execution of the command.

  A more specific configuration of the above gaming machine will be described. In this configuration, the upper control board includes a backup processing unit that retains previous information on the RAM when the power is shut off, and a RAM that detects a RAM clear operation for resetting the information on the backed up RAM. A clear detection unit is provided. The lower control board is provided with a notifying unit that performs processing for notifying RAM clear to the outside. The notification can be performed by, for example, voice output or display control. In such a configuration, it is preferable to include a command corresponding to the RAM clear operation in the command to be transmitted regardless of whether the lower control board is in the ready state. By doing so, the worker can know the completion of the RAM clearing without waiting for the lower control board to be ready, and can improve the work efficiency.

  The application of the present invention to a RAM clear operation is particularly useful for a gaming machine in which a RAM clear switch for performing a RAM clear operation is provided on a host control board. In gaming machines, it is usually required to eliminate signals that can be input from the outside to the upper control board in order to avoid illegal acts due to inappropriate signal input to the upper control board. From this request, the RAM clear switch is also attached to the host control board. When the attachment site of the RAM clear switch is restricted in this way, the worker is often forced into an unreasonable posture for the operation. Therefore, according to the present invention, the fact that the completion of the RAM clear can be quickly known can alleviate the pain at the time of work for the worker.

  A configuration in the case where the backup processing unit described above is provided will be described. The gaming machine is provided with a power stop prediction unit on either the upper control board or the lower control board. The power stop prediction unit predicts the stop of power supply to the host control board. The power stop prediction unit may also perform power supply control to the upper control board. The RAM is configured to be able to hold control information necessary for control processing by a backup power source for a predetermined period even after the supply of power is stopped. The control information includes information held on the upper control board at the time of control.

  The backup processing unit may be configured to start the backup process by an interrupt signal from the power stop prediction unit, but periodically checks the prediction result, and executes the backup process according to the inspection result. It is preferable to do. The backup process is a process for storing control information in the RAM so that the control process before the power failure can be reproduced. The backup process may be performed following the inspection of the prediction result, or may be performed at a timing different from this inspection. The inspection of the prediction result may be performed in a periodic interrupt process, or may be performed periodically in a normal control process. In this way, the power failure prediction results are periodically checked and the backup process is executed, and by detecting the power failure prediction actively, compared to the case of using irregular interrupt processing, With respect to the backup process, the possibility of malfunction due to noise can be suppressed.

  This aspect is suitable for a game machine of a type in which the control process is looped at a relatively high speed, for example, a pachinko machine. In a game machine of a type that requires a relatively long time for one loop, such as a spinning-type game machine, it is desirable to set the inspection result to be checked at a plurality of locations in one loop.

  As an aspect different from the above-described aspect, when a power supply stoppage is predicted, the backup processing unit executes a backup process including prohibition of changing the control information stored in the RAM in response to the prediction. It is good. The backup process is not an irregular interrupt process, but is executed at a prescribed timing in the process of the control process. That is, when a power failure occurs in the process of control processing, the gaming machine continues normal operation until a predetermined timing is reached, and starts backup processing when this timing is reached. A gaming machine usually has a capacitor for smoothing the voltage in the power supply circuit, and normal operation and backup processing after the occurrence of a power failure can be performed using the power stored in the capacitor.

  A power outage can be predicted by various methods and timings. For example, the power failure prediction result itself may be detectable by interrupt processing. Moreover, you may make it check a power failure prediction result periodically as demonstrated previously. In this case, the check of the power failure prediction result may be performed at a prescribed timing for performing the backup process.

  In this way, backup processing is executed at a specified timing, that is, at a fixed position in a series of processing, so that the backup processing is performed in a manner that is less frequent than interrupt processing. It is possible to reduce the amount of information that should be held in the network. For example, it is not necessary to retain information indicating at what point in the control process the backup process was performed, in other words, information indicating what process in the control process should be started upon power recovery.

  During power supply, the host control board executes a series of processes while storing control parameters such as a stack pointer and a register in order to control subroutine calls and interrupt processes. These control parameters vary depending on the status of the subroutine call during the execution of the processing, but are constant regardless of the processing status at a certain position, for example, at the first time when the main routine is started. (Hereinafter referred to as “specified value” in the sense of a predetermined value). This default value includes the initial state. The backup processing according to the present invention is preferably executed at the timing when the control parameter becomes the specified value. If the backup process is executed at such timing, the control parameter is always a constant value. Therefore, it is not necessary to back up the control parameter value again. It becomes possible to recover to the state before the power failure. Here, the stack pointer and the register are exemplified as the control parameters. However, the control parameters can also be various variables used for executing a series of processes in software or hardware.

  As an example, the backup process may be executed immediately after the start of a repeatedly executed control process (for example, a main routine). At such a position, no subroutine call or interrupt processing is performed, and the values of the stack pointer and the register become constant values, so that there is an advantage that the value to be backed up can be reduced.

  On the premise that the various backup processes described above are performed, the gaming machine may include a power recovery processing unit that sets prescribed information prepared in advance on the upper control board at the time of power recovery after power supply is stopped. preferable. By doing so, it is possible to restore the operating state before the power failure. The information set by the power recovery processing unit includes the value of the control parameter described above.

  The prescribed information used at the time of power recovery may be stored in the nonvolatile memory in advance, or may be stored in a prescribed area of the RAM at the time of backup processing. This prescribed information may be the same or different between the power recovery process after the backup process is performed and the normal initialization process after the reset.

  After the backup process is completed, it may be configured to prepare for a power stop while executing an infinite loop or other standby process. When this mode is used, when the power failure occurs due to the power supply voltage becoming unstable due to a very short blackout (hereinafter referred to as “instantaneous power failure”), It is preferable to provide a configuration for automatically returning from standby processing. As such a configuration, for example, there is provided a return means for restarting the control process when the elapsed time after the control process during the normal game is not performed due to the execution of the backup process exceeds a predetermined value. Also good. In addition to the time measured by the timer, the elapsed period may be measured by the number of loop executions of standby processing configured by an infinite loop, the number of CPU steps, and the like. By doing so, it is possible to operate the gaming machine without any trouble even during a momentary power failure. The restoring means can be provided regardless of whether or not the backup processing of the present invention described above is applied.

  The present invention does not necessarily have all the various features described above, and some of them may be omitted or combined as appropriate. Further, the present invention may be configured as a control method for controlling transmission of commands from the upper control board to the lower control board after power is turned on in the gaming machine. Further, the present invention can be configured as a computer program for realizing the command transmission and a computer-readable recording medium on which the computer program is recorded. Here, various media that can be read by a computer, such as an IC card, a ROM cartridge, a computer internal storage device (memory such as RAM or ROM), and an external storage device can be used as the recording medium.

Embodiments of the present invention will be described in the following order. In the present embodiment, a configuration as a pachinko machine is illustrated, but the present invention is not limited to this and can be applied to various gaming machines such as a spinning-type gaming machine.
A. Hardware configuration:
B. Operation of main control board 100:
C. Command transmission processing:
D. Operation of the payout control board 200:

A. Hardware configuration:
FIG. 1 is a block diagram showing a hardware configuration of a gaming machine as an embodiment. The mechanism that controls the operation of the gaming machine is shown. In this embodiment, the operation of the gaming machine is controlled by distributed processing of each control board such as the main control board 100, the payout control board 200, and the sub control board 300. Each control board is configured as a microcomputer having a CPU, a RAM, a ROM, and the like inside, and implements various control processes according to programs recorded in the ROM.

  In the gaming machine of the embodiment, the input from the outside to the main control board 100 is restricted in order to prevent various frauds. As an exceptional instruction input means, a RAM clear switch 110 is provided on the main control board 100, and the stored contents of the RAM can be forcibly erased by operating this switch when the power is turned on. . The main control board 100 and the sub control board 300 are connected by a parallel electric signal, and the main control board 100 and the payout control board 200 are connected by a serial electric signal for the necessity of control processing. The payout control board 200 and the sub control board 300 operate in accordance with commands from the main control board 100, respectively.

  When a ball enters a winning slot provided on the game board surface based on the control of the main control board 100, the pachinko machine pays out the ball, performs a hit / miss determination based on a random number, and is determined to be a win Operates to release the special winning opening provided on the game board surface for a predetermined period. In order to realize the operation at the time of a game, the main control board 100 receives the detection result of the winning detector 101 that detects the winning of a ball in the winning opening. Further, the main control board 100 outputs a control signal for the big prize opening solenoid 102 for releasing the big prize opening.

  Control of each operation during other games is performed via the payout control board 200 and the sub control board 300. The payout control board 200 controls the launching and payout of the ball being played in the following procedure. The launch of the sphere is controlled directly by the launch control board 202. That is, when the player operates the launch handle 201 provided on the game board surface, the launch control board 202 controls the launch motor 203 to launch a ball. The payout control board 200 indirectly controls the launch of the sphere by sending a launch control signal to the launch control board 202.

  When receiving a command indicating that a prize has been won during the game from the main control board 100, the payout control board 200 controls the payout motor 220 and pays out a specified number of balls while counting the number of balls. The payout control board 200 detects whether or not the balls stored for payout are insufficient by the ball break switch 210, and outputs a ball shortage detection signal to the payout control board 200 when there is a shortage.

  The sub control board 300 is configured as an effect control board for controlling effects such as voice, display, and lamp lighting. These effects vary according to the status during the game, such as during normal times, when winning a prize, or when winning a big hit. When an effect command corresponding to each status (hereinafter referred to as “game command”) is transmitted from the main control board 100, the sub-control board 300 activates a program corresponding to each command and performs main control. An effect instructed from the substrate 100 is realized. In the sub-control board 300, a predetermined area of the RAM is assigned as a command buffer. When the sub control board 300 receives a command from the main control board 100, the sub control board 300 temporarily stores the command in the command buffer, and then sequentially reads and executes the command. The sub-control board 300 can receive commands from the main control board 100 even during the startup process after power-on, but not all commands can be executed. By providing a command buffer as in this embodiment, there is an advantage that even when a command that cannot be executed immediately is received, it can be executed without omission when it can be executed.

  In addition to these effects during the game, the sub-control board 300 also outputs for the worker to check the state of the gaming machine. For example, in this embodiment, when the RAM clear switch 110 provided on the main control board 100 is operated, a sound output indicating that a RAM erasing instruction (hereinafter referred to as “RAM clear”) is received is output from the speaker 350. Do. In addition, the lighting of the frame decoration lamp 376 may be controlled. However, since the RAM clearing operation is performed on the back of the game board and it is often difficult for an operator to check the lighting state of the frame decoration lamp 376, it is preferable to use an audio output to complete the RAM clearing. The RAM clear notification may be performed when the RAM erase is completed, but from the viewpoint of improving work efficiency, it is preferable to promptly notify when the RAM clear is received.

  In the present embodiment, as illustrated, the sub-control board 300 directly controls the speaker 350. A plurality of speakers 350 may be connected. A liquid crystal display device (hereinafter referred to as “LCD”) 361 is controlled via a display control board 360. The display control board 360 is equipped with a CPU, RAM, and ROM. Under the control of the CPU, a VDP (Video Display Processor) is driven to generate and store symbols to be displayed on the LCD 361 on the buffer. Based on this, each cell of the LCD 361 is driven and controlled to display a desired pattern. The lamps to be controlled by the sub-control board 300 include a panel decoration lamp 371 provided on the game board surface and a frame decoration lamp 376 provided on the frame of the game board. The sub-control board 300 is connected to these lamps 371 and 376 via lamp relay boards 370 and 375 which are signal distribution boards, and each lamp can blink individually. In the present embodiment, the sub control board 300 and the display control board 360 are shown as separate boards, but may be configured as an effect integrated control board that integrates both. In this way, the production integrated control board is equipped with a plurality of CPUs including the VDP, and the command reception / execution and start-up processes are distributed among the CPUs in the process after power-on described later. It becomes possible to execute smoothly.

  The power supply control board 400 supplies power to these boards and others. The power supply circuit 404 is a circuit that generates power for supply from an external power supply. In the present embodiment, power is supplied at each voltage of 5V, 12V, 24V, and 34V. These electric powers drive each control device, the special prize opening solenoid 102, the motor, and the like. In order to avoid complication of the figure, the illustration of the power supply line is omitted.

  The backup power supply circuit 406 is composed of a capacitor for smoothing after converting alternating current to direct current, an electric double layer capacitor, and the like, and supplies power to each part of the gaming machine for a certain period of time when a power failure occurs in the external power supply. To do. The former capacitor is used for ensuring the operation of each control board until the process at the time of the occurrence of a power interruption in the event of a power failure is completed in addition to the smoothing of direct current. The latter electric double layer capacitor is used to hold the stored contents of RAM for several days after a power failure.

  The power failure monitoring circuit 402 is a circuit that monitors the output voltage of the power supply circuit 404. When the output voltage from the power supply circuit 404 falls below a predetermined value, it is determined that a power failure has occurred in the external power supply, and a power failure warning signal is output to the payout control board 200. The power failure notice signal is further transmitted from the payout control board 200 to the main control board 100. This signal may be directly output from the power supply circuit 404 to the main control board 100. The payout control board 200 and the main control board 100, when receiving a power failure notice signal, execute a power interruption occurrence process described later. The decrease in the power failure voltage during this time is compensated by the power from the backup power supply circuit 406.

  The hardware configuration described above is an example of a gaming machine. The connection destination of each hardware module is not limited to the illustrated example, and various configurations can be adopted. Further, a configuration in which a part of the illustrated hardware module is omitted or a configuration in which a separate hardware module is added may be employed depending on the function required for the gaming machine.

B. Operation of main control board 100:
FIG. 2 is a flowchart of the control process of the main control board 100 (hereinafter referred to as “main control process”). This process is executed by the CPU in accordance with a program recorded in the ROM of the main control board 100. When the power is turned on, the CPU executes a power-on process (step S100). Details of the power-on process will be described later.

  When the power-on process ends, the CPU starts a loop that repeatedly executes each process for gaming. At the start of this loop, the CPU first determines whether or not a power failure notice signal has been detected (step S200). If a power failure warning signal is detected, such as when the external power supply fails or is turned off (hereinafter referred to as “power failure” in a broad sense, including both), the power failure occurrence processing is executed. (Step S300). This is a process for resuming the operation of the gaming machine from the state before the power failure when the power supply is restored (hereinafter referred to as “power recovery”). Although the processing contents will be described later, in this embodiment, as shown in the figure, the processing at the time of power-off occurrence is not an interrupt processing, but is executed immediately after the start of the loop depending on whether or not a power failure warning signal is detected. It is incorporated in the main control process as a process.

  When the power failure warning signal is not detected (step S200), that is, when the power from the external power supply is normally supplied, the CPU starts a game start process (step S400), a normal symbol game as a game process. (Step S402), a normal electric game (Step S404), a special symbol game (Step S406), and a first type special electric game (Step S408) are executed. In the game start process, the CPU detects whether or not a game ball has won a prize opening and outputs a prize ball payout command according to the number of winning balls to the payout control board 200. The other processes are processes for determining whether or not to operate the normal symbol, the ordinary electric accessory, the special symbol, the first type special electric accessory, and the like, and displaying and controlling the operation. In these various processes, command transmission to other control boards is executed by command transmission processing described later.

  FIG. 3 is a flowchart of the process at the time of power-off occurrence. In the main control process, this process is executed when a power failure warning signal is detected. First, the CPU performs an interrupt prohibition setting so that the interrupt process is not executed (step S302). Then, the RAM checksum is calculated and stored in a predetermined area in the RAM (step S304). As will be described later, this checksum is used to check whether or not the content of the RAM before the power failure is retained at the time of power recovery.

  Next, the CPU sets a specified value indicating that the process at the time of power-off occurrence has been executed in a backup flag provided in a predetermined area of the RAM (step S306). When the above processing is completed, the CPU prohibits access to the RAM (step S308), enters an infinite loop, and prepares for power stop.

  In this process, if the power supply voltage becomes unstable due to a power outage for a very short time (hereinafter referred to as “instantaneous power outage”), the process at the time of power-off occurrence is actually started. Since the power supply is not stopped, there is a possibility that the process described above cannot return from the infinite loop. In order to avoid such adverse effects, the CPU of this embodiment is provided with a watchdog timer, and is configured to be reset if the watchdog timer is not updated for a predetermined time. The watchdog timer is periodically updated while the process is normally performed. However, the watchdog timer enters the process when the power is cut off and is not updated. As a result, even when the power interruption occurs and the infinite loop shown in FIG. 3 is entered due to a momentary power failure, a reset is applied after a predetermined time has elapsed, and the CPU is started in the same process as when the power is turned on.

  FIG. 4 is a flowchart of power-on processing (sometimes referred to as “start-up processing” or “boot processing”). This is a process corresponding to step S100 of the main control process (FIG. 2). When the power is turned on, the CPU first sets the interrupt mode (step S101), monitors the power failure warning signal for a certain period of time (step S102), and permits access to the RAM (step S103). Execute.

  Thereafter, the specified value A is set in the stack pointer (step S104). The stack pointer is a value representing a memory area used for temporarily storing various control information necessary for the CPU to execute main control processing, for example, a return address from a subroutine and a register value. The stack pointer varies depending on the amount of control information described above during execution of the main control process, but at least at the start of the loop (see FIG. 2), that is, a series of processes such as a game start process (see FIG. 2). After completing Steps S400 to S408), the subroutine call and interrupt processing are not performed, so the value is always constant. Therefore, in this embodiment, the gaming machine can be restored to the state immediately before the power failure by setting a certain prescribed value A without having to back up the stack pointer.

  Next, if the RAM clear switch 110, that is, the switch for forcibly initializing the RAM is not ON (step S105), the CPU calculates a checksum of the RAM (step S106). Then, the calculation result is compared with the checksum previously saved in the process at the time of power-off occurrence (FIG. 3). If the two match, it is determined that the checksum is normal (step S107).

  If the checksum is normal, the CPU determines whether or not the backup flag is a set value for processing when a power failure occurs (step S108). “Normal” indicates that this set value is set. If the backup flag is not normal, it is determined that it is normal startup, and all of the RAM is cleared and initial setting is performed (steps S120 and S121). This process is similarly performed when the RAM clear switch 110 is ON (step S105) and when the checksum value is abnormal (step S107). In addition to the RAM clear, the CPU transmits a command for informing the sub-control board 300 of acceptance of the RAM clear and a RAM clear command (step S122). This command transmission is also performed by a command transmission process described later. The RAM clear command may be sent when the RAM clear is completed.

  If the backup flag is a normal value (step S108), the backup flag is cleared (step S110), and the process for power recovery of the RAM is executed (step S111). In the power recovery process of this embodiment, the value that the CPU should read into the register to restore the gaming machine to the power failure state is loaded into a predetermined area of the RAM. Although the contents of the CPU register fluctuate during execution of the main control process, the subroutine call and interrupt process are not performed at the start of the loop in FIG. Therefore, in the power recovery process (step S111), it is sufficient to set a specified value regardless of the occurrence timing of the power failure. This set value is read by the CPU and set in the register.

  When the above processing is completed, the CPU executes initial setting of peripheral devices (step S130), sets interrupt permission (step S131), and ends the power-on processing. As shown in FIG. 2, a game loop is started thereafter. When power is restored, the power-on process restores the state of the stack pointer and the register at the time of the power failure, so that the operation of the gaming machine is resumed from the state at the time of the power failure.

  The activation process is also executed individually on the payout control board 200, the sub control board 300, and the display control board 360. However, in this embodiment, since the backup function is not provided for the sub control board 300 and the display control board 360, a simple process in which steps S104 to S111 and S122 in FIG. 4 are omitted is executed. . The payout control board 200 executes backup processing and power recovery processing similar to those of the main control board 100. Further, when the main control board 100 performs the RAM clear, the payout control board 200 also executes the RAM clear in response to a signal from the main control board 100.

  Each control board of the sub-control board 300 and the display control board 360 develops software and data necessary for realizing control on the respective control boards from the ROM to the RAM area as part of the initial setting (step S130). Execute the process. In the sub control board 300 and the display control board 360, since the size of software and data to be developed is relatively large, the activation process may take several seconds. As described above, the sub control board 300 can receive a command from the main control board 100 even during the activation process. Similarly, the payout control board 200 can receive commands from the main control board 100, and the display control board 360 can receive commands from the sub control board 300.

C. Command transmission processing:
FIG. 5 is a flowchart of command transmission processing. This is a process executed by the main control board 100 to transmit a command to another control board in the main control process (FIG. 2) and the power-on process (FIG. 4) described above. When the command transmission process is executed, the command to be transmitted is designated by the main control process or the like. On the right side of the figure, as an example of processing on the side of receiving this command, processing executed after the sub control board 300 is turned on is shown.

  When this process is started, the CPU of the main control board 100 inputs a command designation to be transmitted (step S10) and determines the transmission timing (step S11). In this embodiment, it is assumed that the correspondence between commands and transmission timing is defined in advance in a table format. In the figure, an example of a table showing this correspondence is shown. For example, the “RAM clear command” is set to be transmitted “immediately”, and commands used during the game such as “effect pattern number” are transmitted “after boot”, that is, after the startup process is completed. It is set to be. As described above, in this embodiment, the main control board 100 and the sub control board 300 are connected by a unidirectional parallel communication line, and the CPU of the main control board 100 detects the completion of the start of the sub control board 300. It can not be configured. Accordingly, for the command set as “after boot”, the main control board 100 has passed a preset time based on the time required to start up the sub-control board 300 (hereinafter referred to as “startup period”). Will send a command.

  The command transmission timing can be set in various modes in addition to the example illustrated in the figure. For example, a waiting time until transmission may be associated with each command. By doing so, it becomes possible to provide superiority or inferiority in transmission between commands depending on the set value of the waiting time. Superiority or inferiority may be provided between commands, or superiority or inferiority may be provided depending on the type of substrate to which the command is transmitted. In this embodiment, since only the RAM clear command is set to be immediate, the command to the sub control board 300 is set to have priority over the command to the payout control board 200.

  The command transmission timing does not necessarily have to be set in a table format. For example, the command transmission timing may be defined as a branching condition during processing such as “whether or not it is a RAM clear command”. The command transmission timing may be set separately for several modes, such as during startup processing after power-on and during gaming.

  The CPU executes command transmission based on the transmission timing determined by the above-described processing. In this embodiment, after booting (step S12) or when “immediate” transmission is designated (step S13), the command is immediately transmitted (step S15). If the game is not in progress (step S12), that is, if it is activated, and “after boot” is designated (step S13), the command is transmitted after waiting for the activation period to elapse (step S14) (step S14). Step S15).

  As an example of processing on the side of receiving this command, the sub-control board 300 is being started. When the power is turned on, the sub control board 300 executes necessary initialization processing such as initialization of the RAM (step S20), and develops software and data necessary for control from the ROM onto the RAM (step S21). . During this time, the sub-control board 300 can receive commands. Therefore, when a command is transmitted from the main control board 100, the sub control board 300 receives it and stores it in the command buffer (step S22). Then, during the development of the software data, a command is executed with an appropriate interruption (step S23).

  When the main control board 100 and the sub control board 300 are operating normally, only the “RAM clear command” can be received by the sub control board 300 during startup in this embodiment. In the drawing, as an example of the command execution process (step S23), a process corresponding to the “RAM clear command” is shown. When the sub control board 300 receives a RAM clear command from the main control board 100, the sub control board 300 generates a prescribed RAM clear sound from the speaker 350 and lights the frame decoration lamp 376 to notify the worker of acceptance of the RAM clear. To do. The lighting control of the frame decoration lamp 376 may be omitted. As shown in FIG. 1, both the speaker 350 and the frame decoration lamp 376 are directly controlled by the sub-control board 300 without going through the lower control board, so that sound output and lighting control can be performed even during startup. is there.

  The sub-control board 300 repeatedly executes the above processing until the activation is completed (step S24). Here, for convenience of illustration, the development of software data and the input and execution of commands are shown as one sequence, but in actuality, they are realized by individual processes executed in parallel. The command reception and execution are executed by the sub control board 300 and the payout control board 200 during the game, as shown in the figure.

D. Operation of the payout control board 200:
FIG. 6 is a flowchart of the control process of the payout control board 200 (hereinafter referred to as “payout control process”). This is a process executed by the CPU in accordance with a program recorded in the ROM of the payout control board 200. When the power is turned on, the CPU executes a power-on process (step S500) and then starts a loop. The power-on process is the same as the process in the main control board 100 (FIG. 4). When the RAM is cleared on the main control board 100, the RAM is also cleared on the payout control board 200. The instruction to execute the RAM clear of the payout control board 200 may be performed by, for example, sending a RAM clear command from the main control board 100 to the payout control board 200, or operating the RAM clear switch 110. May be detected.

  In this embodiment, the payout control board 200 does not output a RAM clear command even when a RAM clear instruction is received. In order to reliably execute the RAM clear on the payout control board 200, a RAM clear command may also be sent from the payout control board 200. For example, a mode in which a RAM clear command is sent to the sub control board 300 via the main control board 100 to notify the RAM clear can be adopted. In this case, it is preferable to change the notification mode between the main control board 100 and the payout control board 200. As another mode, the main control board 100 outputs a RAM clear command when it confirms that the payout control board 200 has received a RAM clear instruction in addition to accepting a RAM clear. Also good.

  If a power failure warning signal is detected at the start of the loop (step S501), the CPU executes a process when a power failure occurs (step S505). This process is the same as the process in the main control board 100 (FIG. 3).

  When the power failure notice signal is not detected (step S501), the CPU executes a winning ball control process (step S502) and a ball lending control process (step S503), respectively. The prize ball control process is a process for paying out a prize ball by controlling the payout motor 220. The ball lending control process is a process of lending out game balls by controlling the payout motor 220.

  According to the gaming machine of the present embodiment described above, the RAM clear command is transmitted to the sub control board 300 and executed in the start-up process after power-on even before the start of the sub-control board 300 is completed. . Therefore, the worker can quickly know the acceptance of the RAM clear, and work efficiency can be improved.

  When there are a plurality of commands that can be transmitted by the main control board 100 after the power is turned on, it is possible to provide superiority or inferiority in various modes for the transmission timing of each command using the table setting illustrated in FIG. For example, a command that requires an operator to perform some operation on the gaming machine, such as a RAM clear command, may be transmitted with priority. In this way, workability can be improved.

  Further, according to the gaming machine of the present embodiment, the “power failure occurrence process” after the power failure notice signal is detected is executed as a branch process at a specified position of the loop, not an interrupt process. For this reason, the values of the stack pointer and the register become the specified values regardless of the occurrence timing of the power failure. Therefore, it is possible to simplify the contents of the processing when the power interruption occurs, and to save the memory capacity for storing the stack pointer and the register.

  The process at the time of power-off occurrence does not need to be performed immediately after the start of the loop, and can be executed at various positions where the values of the stack pointer and the register are previously determined. Examples of such positions include a place where a subroutine call or interrupt process is not performed, a place where a subroutine call is made regardless of the processing status, and the like. Calling lower-level processing (ordinary symbol game S402, normal electric game game S404, special symbol game S406, first type special electric game game S408, etc. in FIG. 2) from higher-level processing (control processing of FIG. 2, etc.) Depending on the method, it is also possible to perform the processing when the power is cut off at a plurality of locations. For example, if the information exchange at the time of reading the low-order process is transferred via a predetermined area of the RAM instead of via the register, the value of the register can be set to a constant value. Except during the execution, it is possible to execute the process at the time of power-off occurrence just before or after the start of any lower-level process. By doing so, it is not necessary to wait for the start of the process when the power interruption occurs until immediately after the start of the loop, so that the power required until the backup process is completed can be reduced.

  In the present embodiment, a process for performing backup including the stack pointer and the register value may be applied as the process when the power is cut off. Even in such a case, it is assumed that the power failure warning signal is actively detected by the CPU during the control process, not the interrupt process. By doing so, it is possible to suppress the possibility that the process at the time of power-off occurrence is performed due to a malfunction due to noise, as compared with the case where the interrupt process is used.

  In the present embodiment, the detection of the power failure notice signal may be divided from the execution timing of the process when the power is cut off. For example, the power failure warning signal may be received by the CPU by an interrupt process, and after this reception, the process at the time of power-off occurrence may be performed at a specified timing. As another example, the CPU may actively detect the power failure warning signal at a plurality of timings of the control processing, and the processing at the time of power-off occurrence may be performed at a specified timing according to the detection result. .

  In the present embodiment, the backup process of the main control board 100 and the payout control board 200 is illustrated, but the same process can be applied to the sub-control board 300 as well. Alternatively, the power interruption occurrence process may be executed as a branch process only on one of the main control board 100 or the payout control board 200, and may be executed as an interrupt process on the other.

  As mentioned above, although the various Example of this invention was described, it cannot be overemphasized that this invention is not limited to these Examples, and can take a various structure in the range which does not deviate from the meaning. Various processes implemented in software in the embodiments may be implemented in hardware by an ASIC or the like.

It is a block diagram which shows the hardware constitutions of the game machine as an Example. It is a flowchart of a main control process. It is a flowchart of a process at the time of power-off occurrence. It is a flowchart of a power-on process. It is a flowchart of a command transmission process. It is a flowchart of a payout control process.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 ... Main control board 101 ... Winning detector 102 ... Grand prize opening solenoid 110 ... RAM clear switch 200 ... Discharge control board 201 ... Firing handle 202 ... Firing control board 203 ... Firing motor 210 ... Switch 220 ... Discharging motor 300 ... Sub control Substrate 350 ... Speaker 360 ... Display control substrate 361 ... LCD
370 ... Lamp relay board 371 ... Panel decoration lamp 375 ... Lamp relay board 376 ... Frame decoration lamp 400 ... Power supply control board 402 ... Power failure monitoring circuit 404 ... Power supply circuit 406 ... Backup power supply circuit

Claims (3)

A gaming machine comprising a plurality of control boards,
The control board includes an upper control board that transmits a command to another control board, and a lower control board that operates by receiving the command,
The upper control board is:
A backup processing unit that retains previous information on the RAM when the power is shut off;
A RAM clear detector for detecting a RAM clear operation for resetting information on the backed up RAM;
The upper control board has a command transmission unit that transmits at least a part of the predetermined commands including a command corresponding to the RAM clear operation regardless of whether or not the lower control board is in the ready state. And
The lower control board is:
Including a command receiving unit capable of receiving commands from the host control board, including during the startup period until power-on and ready state in which all control functions can be realized;
The gaming machine is a gaming machine that immediately transmits a command corresponding to the RAM clear operation, which is one of the commands . The gaming machine according to claim 1,
A game machine that transmits a command that is not included in the partial command after at least a startup period of the lower control board. A gaming machine according to claim 1 or 2,
A gaming machine in which the command is transmitted from the upper control board to the lower control board based on a table in which the command and its transmission timing are defined in advance, or based on a branch condition for processing the command transmission timing .