JP4314619B2 - Game machine - Google Patents

Description

  The present invention relates to backup control for enabling the operation state of a gaming machine when a power failure occurs to be reproduced at the time of power recovery.

  The operation of pachinko machines and other gaming machines is realized by a control device using a CPU. The control of the operation includes output of the voice and display of the gaming machine, processing at the time of winning a prize during the game, and the like. In such a gaming machine, if a power failure occurs during a game, in some cases, information at the time of winning a prize may be lost, and the player may not be able to obtain a profit associated with the winning. In order to avoid such inconvenience, the gaming machine is equipped with a backup power source, and when a power failure occurs, it is configured to stop after performing backup of information necessary for control processing using this backup power source. Yes.

  Patent document 1 discloses the technique regarding the backup at the time of a power failure in a gaming machine. According to this technique, when a drop in power supply voltage is detected, a backup process is activated as a non-maskable interrupt process, and the contents of the registers and stack pointers used by the control CPU are stored in the memory. When power is restored, this information is read from the memory to reproduce the operation state immediately before the power failure.

JP 2001-120737 A

  In general, a gaming machine is often used in a severe noise environment due to static electricity or the like. For example, game balls that roll or flow down the game board are charged with static electricity, and static electricity is generated in various parts such as ball tanks, tank rails, paths in the prize ball apparatus, and paths from the prize ball apparatus to the upper plate. To do. These noises cause malfunctions. Therefore, when using the non-maskable interrupt processing, there is a possibility that the backup processing at the time of a power failure may be started due to a malfunction due to these noises.

  In addition, the hardware resources of gaming machines have many restrictions in terms of processing capacity and memory capacity. Therefore, as a backup process at the time of a power failure, a process that further reduces the required memory capacity and the number of steps has been desired. An object of this invention is to improve the backup process at the time of a power failure in a gaming machine from this viewpoint.

  The gaming machine of the present invention includes a control unit, a power stop prediction unit, an information storage unit, and a backup processing unit. The control unit controls at least a part of the operation of the gaming machine by repeatedly executing a predetermined control process. The power supply stop prediction unit predicts the supply stop of power to the control unit. The power stop prediction unit may also perform power supply control to the control unit. The information storage unit is a memory that holds control information necessary for control processing, and is configured to hold control information for a predetermined period even after the supply of power is stopped. The control information includes information held in the control unit at the time of control. The information storage unit is not necessarily a non-volatile memory, and may be a combination of a volatile memory such as a RAM and a backup power source capable of supplying power for a predetermined period. Due to the action of the information storage unit, control information necessary for restoring the operating state before the power failure is retained even when the supply of power is stopped.

  The backup processing unit periodically checks the prediction result, and executes backup processing according to the check result. The backup process is a process of storing control information in the information storage unit so that the control process before the power failure can be reproduced. The backup process may be performed following the inspection of the prediction result, or may be performed at a timing different from this inspection. The inspection of the prediction result may be performed in a periodic interrupt process, or may be performed periodically in a normal control process. A process of storing information held in the control unit in the information storage unit is also included. According to the present invention, the backup process is executed by periodically checking the prediction result of the power failure, not the interrupt process. By actively detecting the power outage prediction in this way, it is possible to suppress the possibility of malfunction due to noise in the backup processing at the time of power outage as compared with the case of using irregular interrupt processing. .

  This aspect is suitable for a game machine of a type in which the control process is looped at a relatively high speed, for example, a pachinko machine. In a game machine of a type that requires a relatively long time for one loop, such as a spinning-type game machine, it is desirable to set the inspection result to be checked at a plurality of locations in one loop.

  As another aspect different from the above-described aspect, the backup processing unit according to the present invention includes a backup including prohibition of changing the control information stored in the information storage unit in response to the predicted power supply stoppage. It is good also as what performs a process. The backup process is not an irregular interrupt process, but is executed at a prescribed timing in the process of the control process. That is, when a power failure occurs during the control process, the gaming machine continues normal operation until a predetermined timing is reached by the backup power source, and starts the backup process when this timing is reached.

  However, prediction of a power failure can be performed by various methods and timings. For example, the power failure prediction result itself may be detectable by interrupt processing. Moreover, you may make it check a power failure prediction result periodically as demonstrated previously. In this case, the check of the power failure prediction result may be performed at a prescribed timing for performing the backup process.

  According to the present invention, since the backup process is executed at a specified timing as described above, the information to be retained for recovery as compared with the case where the backup process is executed irregularly in the form of an interrupt process. Can be reduced. For example, according to the present invention, there is no need to hold information indicating at which point in time the control processing is performed, in other words, information indicating what processing in the control processing should be started upon power recovery. .

  When the control unit can store control parameters used for control while power is supplied, the specified timing can be set to a timing at which the control parameter becomes a specified value. For example, when the CPU prepared in the control unit is configured to control the operation of the gaming machine by repeating the control process in software, the contents of the stack pointer and the register used by the CPU for the control process correspond to the control parameter. If the prescribed timing is set as described above, the operation state of the gaming machine can be restored to the state before the power failure by setting the prescribed value as the control parameter in the control unit. This default value includes the initial state.

  As an example, the prescribed timing can be immediately after the start of a repeatedly executed control process. In this way, there is an advantage that the specified value to be given to the control unit can be suppressed.

  On the premise that the various backup processes described above are performed, the gaming machine preferably includes a power recovery processing unit that sets prescribed information prepared in advance in the control unit at the time of power recovery after the supply of power is stopped. . By doing so, it is possible to restore the operating state before the power failure. When the control parameter described above is used, the prescribed information includes this control parameter.

  The prescribed information may be stored in advance in a non-volatile memory, or may be stored in a prescribed area of the information storage unit during backup processing. This prescribed information may be the same or different between the power recovery process after the backup process is performed and the normal initialization process after the reset.

  The present invention may be configured to prepare for a power shutdown while executing an infinite loop or other standby processing after the backup processing is completed. When this mode is used, when the power failure occurs due to the power supply voltage becoming unstable due to a very short blackout (hereinafter referred to as “instantaneous power failure”), It is preferable to provide a configuration for automatically returning from standby processing. As such a configuration, for example, there is provided a return means for restarting the control process when the elapsed time after the control process during the normal game is not performed due to the execution of the backup process exceeds a predetermined value. Also good. In addition to the time measured by the timer, the elapsed period may be measured by the number of loop executions of standby processing configured by an infinite loop, the number of CPU steps, and the like. By doing so, it is possible to operate the gaming machine without any trouble even during a momentary power failure. The restoring means can be provided regardless of whether or not the backup processing of the present invention described above is applied.

  The present invention does not necessarily have all the various features described above, and some of them may be omitted or combined as appropriate. Further, the present invention may be configured as a control method for realizing backup processing when power supply is stopped in a gaming machine. Further, the present invention can be configured as a computer program for realizing such backup processing by a computer and a computer-readable recording medium on which the computer program is recorded. Here, various media that can be read by a computer, such as an IC card, a ROM cartridge, a computer internal storage device (memory such as RAM or ROM), and an external storage device can be used as the recording medium.

Embodiments of the present invention will be described in the following order. In the present embodiment, a configuration as a pachinko machine is illustrated, but the present invention is not limited to this, and can be applied to various gaming machines such as a rotating game machine.
A. Hardware configuration:
B. Operation of main control board 100:
C. Operation of the payout control board 200:

A. Hardware configuration:
FIG. 1 is a block diagram showing a hardware configuration of a gaming machine as an embodiment. The mechanism that controls the operation of the gaming machine is mainly shown. In this embodiment, the operation of the gaming machine is controlled by distributed processing of each control board such as the main control board 100, the payout control board 200, and the sub control board 300. Each control board is configured as a one-chip microcomputer having a CPU, a RAM, a ROM, etc. therein, and implements various control processes according to programs recorded in the ROM.

  In the gaming machine of the embodiment, the input from the outside to the main control board 100 is restricted in order to prevent various frauds. As shown in the figure, the main control board 100 and the sub-control board 300 are connected by a parallel electric signal, and the main control board 100 and the payout control board 200 are connected by a serial electric signal for the necessity of control processing. . The payout control board 200 and the sub control board 300 operate in accordance with commands from the main control board 100, respectively.

  When a ball enters a winning slot provided on the game board surface based on the control of the main control board 100, the pachinko machine pays out the ball, performs a hit / miss determination based on a random number, and is determined to be a win Operates to release the special winning opening provided on the game board surface for a predetermined period. In order to realize the operation at the time of a game, the main control board 100 receives the detection result of the winning detector 101 that detects the winning of a ball in the winning opening. Further, the main control board 100 outputs a control signal for the big prize opening solenoid 102 for releasing the big prize opening.

  Control of each operation during other games is performed via the payout control board 200 and the sub control board 300. The payout control board 200 controls the launching and payout of the ball being played in the following procedure. The launch of the sphere is controlled directly by the launch control board 202. That is, when the player operates the launch handle 201 provided on the game board surface, the launch control board 202 controls the launch motor 203 to launch a ball. The payout control board 200 indirectly controls the launch of the sphere by sending a launch control signal to the launch control board 202.

  When receiving a command indicating that a prize has been won during the game from the main control board 100, the payout control board 200 controls the payout motor 220 and pays out a specified number of balls while counting the number of balls. The payout control board 200 detects whether or not the balls stored for payout are insufficient by the ball break switch 210, and outputs a ball shortage detection signal to the main control board 100 when there is a shortage.

  The sub control board 300 controls effects such as voice, display, and lamp lighting during the game. These effects vary according to the status during the game, such as during normal times, when winning a prize, or when winning a big hit. When an effect command corresponding to each status (hereinafter referred to as “game command”) is transmitted from the main control board 100, the sub-control board 300 activates a program corresponding to each command and performs main control. An effect instructed from the substrate 100 is realized.

  In the present embodiment, as illustrated, the sub-control board 300 directly controls the speaker 350. A plurality of speakers 350 may be connected. A liquid crystal display device (hereinafter referred to as “LCD”) 361 is controlled via a display control board 360. The display control board 360 generates and stores symbols to be displayed on the LCD 361 on the buffer, and based on this, the one-chip microcomputer and the VDP (VDP) having a function of driving and controlling each cell of the LCD 361 to display a desired symbol. Video Display Processor). The lamps to be controlled by the sub-control board 300 include a panel decoration lamp 371 provided on the game board surface and a frame decoration lamp 376 provided on the frame of the game board. The sub-control board 300 is connected to these lamps 371 and 376 via lamp relay boards 370 and 375 which are signal distribution boards, and each lamp can blink individually.

  The power supply control board 400 supplies power to these boards and others. The power supply circuit 404 is a circuit that generates power for supply from an external power supply. In the present embodiment, power is supplied at each voltage of 5V, 12V, 24V, and 34V. These electric powers drive each control device, the special prize opening solenoid 102, the motor, and the like. In order to avoid complication of the figure, the illustration of the power supply line is omitted.

  The backup power supply circuit 406 is composed of a capacitor for smoothing after converting alternating current to direct current, an electric double layer capacitor, and the like, and supplies power to each part of the gaming machine for a certain period of time when a power failure occurs in the external power supply. To do. The former capacitor is used for ensuring the operation of each control board until the process at the time of the occurrence of a power interruption in the event of a power failure is completed in addition to the smoothing of direct current. The latter electric double layer capacitor is used to hold the stored contents of RAM for several days after a power failure.

  The power failure monitoring circuit 402 is a circuit that monitors the output voltage of the power supply circuit 404. When the output voltage from the power supply circuit 404 falls below a predetermined value, it is determined that a power failure has occurred in the external power supply, and a power failure warning signal is output to the payout control board 200. The power failure notice signal is further transmitted from the payout control board 200 to the main control board 100. This signal may be directly output from the power supply circuit 404 to the main control board 100. The payout control board 200 and the main control board 100, when receiving a power failure notice signal, execute a power interruption occurrence process described later. The decrease in the power failure voltage during this time is compensated by the power from the backup power supply circuit 406.

  The hardware configuration described above is an example of a gaming machine. The connection destination of each hardware module is not limited to the illustrated example, and various configurations can be adopted. Further, a configuration in which a part of the illustrated hardware module is omitted or a configuration in which a separate hardware module is added may be employed depending on the function required for the gaming machine.

B. Operation of main control board 100:
FIG. 2 is a flowchart of the control process of the main control board 100 (hereinafter referred to as “main control process”). This process is executed by the CPU in accordance with a program recorded in the ROM of the main control board 100. When the power is turned on, the CPU executes a power-on process (step S100). This process is an initialization process, but the processing contents differ depending on whether a power failure occurs during the game or not. Details of the power-on process will be described later.

  When the power-on process ends, the CPU starts a loop that repeatedly executes each process for gaming. At the start of this loop, the CPU first determines whether or not a power failure notice signal has been detected (step S200). When the external power supply is interrupted and a power failure notice signal is detected, a process at the occurrence of power interruption is executed (step S300). This is a process for resuming the operation of the gaming machine from the state before the power failure when the power supply is restored after the power failure (hereinafter referred to as “power recovery”). Although the processing contents will be described later, in this embodiment, as shown in the figure, the processing at the time of power-off occurrence is not an interrupt processing, but is executed immediately after the start of the loop depending on whether or not a power failure warning signal is detected. It is incorporated in the main control process as a process.

  When the power failure warning signal is not detected (step S200), that is, when the power from the external power supply is normally supplied, the CPU starts a game start process (step S400), a normal symbol game as a game process. (Step S402), a normal electric game (Step S404), a special symbol game (Step S406), and a first type special electric game (Step S408) are executed. In the game start process, the CPU detects whether or not a game ball has won a prize opening and outputs a prize ball payout command according to the number of winning balls to the payout control board 200. The other processes are processes for determining whether or not to operate the normal symbol, the ordinary electric accessory, the special symbol, the first type special electric accessory, and the like, and displaying and controlling the operation.

  FIG. 3 is a flowchart of the process at the time of power-off occurrence. In the main control process, this process is executed when a power failure warning signal is detected. First, the CPU performs an interrupt prohibition setting so that the interrupt process is not executed (step S302). Then, the RAM checksum is calculated and stored in a predetermined area in the RAM (step S304). As will be described later, this checksum is used to check whether or not the content of the RAM before the power failure is retained at the time of power recovery.

  Next, the CPU sets a specified value indicating that the process at the time of power-off occurrence has been executed in a backup flag provided in a predetermined area of the RAM (step S306). When the above processing is completed, the CPU prohibits access to the RAM (step S308), enters an infinite loop, and prepares for power stop.

  In this process, if the power supply voltage becomes unstable due to a power outage for a very short time (hereinafter referred to as “instantaneous power outage”), the process at the time of power-off occurrence is actually started. Since the power supply is not stopped, there is a possibility that the process described above cannot return from the infinite loop. In order to avoid such adverse effects, the CPU of this embodiment is provided with a watchdog timer, and is configured to be reset if the watchdog timer is not updated for a predetermined time. The watchdog timer is periodically updated while the process is normally performed. However, the watchdog timer enters the process when the power is cut off and is not updated. As a result, even when the power interruption occurs and the infinite loop shown in FIG. 3 is entered due to a momentary power failure, a reset is applied after a predetermined time has elapsed, and the CPU is started in the same process as when the power is turned on.

  FIG. 4 is a flowchart of the power-on process. This is a process corresponding to step S100 of the main control process (FIG. 2). There are two situations in which this process is executed: a situation in which the power is turned on again after normal operation is completed (hereinafter referred to as “normal startup”), and a situation in which the power is restored after a power failure. There is a street.

  In any situation, when the power is turned on, the CPU first sets the interrupt mode (step S101), monitors the power failure warning signal for a certain period of time (step S102), and permits access to the RAM (step S103). Execute the specified setting process later.

  Thereafter, the specified value A is set in the stack pointer (step S104). The stack pointer is a value representing a memory area used for temporarily storing various control information necessary for the CPU to execute main control processing, for example, a return address from a subroutine and a register value. The stack pointer varies depending on the amount of control information described above during execution of the main control process, but at least at the start of the loop (see FIG. 2), that is, a series of processes such as a game start process (see FIG. 2). In the state after completing steps S400 to S408), the value is constant. Therefore, in this embodiment, the same specified value A is set regardless of whether it is during normal startup or power recovery.

  Next, if the RAM erase switch, that is, the switch for forcibly initializing the RAM is not ON (step S105), the CPU calculates a checksum of the RAM (step S106). Then, the calculation result is compared with the checksum previously saved in the process at the time of power failure occurrence (FIG. 3). If the two match, it is determined that the checksum is normal (step S107).

  If the checksum is normal, the CPU determines whether or not the backup flag is a set value for processing when a power failure occurs (step S108). “Normal” indicates that this set value is set. If the backup flag is not normal, it is determined that it is normal startup, and all of the RAM is cleared and initial setting is performed (steps S120 and S121). This process is similarly performed when the RAM erase switch is ON (step S105) and when the checksum value is abnormal (step S107).

  If the backup flag is a normal value (step S108), the backup flag is cleared (step S110), and the process for power recovery of the RAM is executed (step S111). In the power recovery process of this embodiment, a prescribed value to be set in the CPU register is set in a predetermined area of the RAM. It is a value required to resume the main control process from the operating state before the power failure at the time of power recovery. The contents of the CPU register also fluctuate during execution of the main control process, but become a constant value at the start of the loop in FIG. Therefore, in the power recovery process (step S111), it is sufficient to set a specified value regardless of the occurrence timing of the power failure. This set value is read by the CPU and set in the register. If it is not necessary to set a value specific to power recovery in the CPU register at the time of power recovery, the process of step S111 may be omitted.

  When the above processing is completed, the CPU executes initial setting of peripheral devices (step S130), sets interrupt permission (step S131), and ends the power-on processing. As shown in FIG. 2, a game loop is started thereafter. When power is restored, the power-on process restores the state of the stack pointer and the register at the time of the power failure, so that the operation of the gaming machine is resumed from the state at the time of the power failure.

C. Operation of the payout control board 200:
FIG. 5 is a flowchart of the control process of the payout control board 200 (hereinafter referred to as “payout control process”). This is a process executed by the CPU in accordance with a program recorded in the ROM of the payout control board 200. When the power is turned on, the CPU executes a power-on process (step S500) and then starts a loop. The power-on process is the same as the process in the main control board 100 (FIG. 4). However, in the payout control board 200, there is no need to set a specific value specific to the power recovery in the CPU register at the time of power recovery, so the process of power recovery of the RAM in step S111 in FIG. 4 is omitted. Of course, if necessary, the process at step S111 of FIG. 4 may be executed to set a value specific to the power recovery in the CPU register.

  If a power failure warning signal is detected at the start of the loop (step S501), the CPU executes a process when a power failure occurs (step S504). This process is the same as the process in the main control board 100 (FIG. 3).

  When the power failure notice signal is not detected (step S501), the CPU executes a prize ball control process (step S502) and a ball rental control process (step S503), respectively. The prize ball control process is a process for paying out a prize ball by controlling the payout motor 220. The ball lending control process is a process of lending out game balls by controlling the payout motor 220.

  According to the gaming machine of the present embodiment described above, the “power failure occurrence process” after the power failure notice signal is detected is executed as a branch process at a specified position of the loop, not an interrupt process. For this reason, the values of the stack pointer and the register become the specified values regardless of the occurrence timing of the power failure. Therefore, it is possible to simplify the contents of the processing when the power interruption occurs, and to save the memory capacity for storing the stack pointer and the register.

  The process at the time of power-off occurrence does not need to be performed immediately after the start of the loop, and can be executed at various positions where the values of the stack pointer and the register become the specified values. Such a position is not limited to one place in the control process, but the upper process (control process in FIG. 2 and the like) to the lower process (ordinary symbol game S402, ordinary electric game game S404, special symbol in FIG. 2). Depending on the method of exchanging information when calling up the game S406, the first type special electric equipment game S408, etc., it may be provided at a plurality of locations. For example, by passing this information exchange through the RAM instead of through the register, it is possible to detect a power failure warning signal and execute the process when the power is cut off during the lower processing. it can. By doing so, it is possible to reduce the capacity of the backup power supply for processing when a power interruption occurs.

  In the present embodiment, a process for performing backup including the stack pointer and the register value may be applied as the process when the power is cut off. Even in such a case, it is assumed that the power failure warning signal is actively detected by the CPU during the control process, not the interrupt process. By doing so, it is possible to suppress the possibility that the process at the time of power-off occurrence is performed due to a malfunction due to noise, as compared with the case where the interrupt process is used.

  In the present embodiment, the detection of the power failure notice signal may be divided from the execution timing of the process when the power is cut off. For example, the power failure warning signal may be received by the CPU by an interrupt process, and after this reception, the process at the time of power-off occurrence may be performed at a specified timing. As another example, the CPU may actively detect the power failure warning signal at a plurality of timings of the control processing, and the processing at the time of power-off occurrence may be performed at a specified timing according to the detection result. .

  In this embodiment, the processing of the main control board 100 and the payout control board 200 is illustrated, but the same processing can be applied to the sub-control board 300. Alternatively, the power interruption occurrence process may be executed as a branch process only on one of the main control board 100 or the payout control board 200, and may be executed as an interrupt process on the other.

  Although various embodiments of the present invention have been described above, the present invention is not limited to these embodiments, and it goes without saying that various configurations can be adopted without departing from the spirit of the present invention. Various processes implemented in software in the embodiments may be implemented in hardware by an ASIC or the like.

It is a block diagram which shows the hardware constitutions of the game machine as an Example. It is a flowchart of a main control process. It is a flowchart of a process at the time of power-off occurrence. It is a flowchart of a power-on process. It is a flowchart of a payout control process.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 ... Main control board 101 ... Winning detector 102 ... Grand prize opening solenoid 200 ... Discharge control board 201 ... Discharge handle 202 ... Discharge control board 203 ... Discharge motor 210 ... Switch 220 ... Discharge motor 300 ... Sub-control board 350 ... Speaker 360 ... Display control board 361 ... LCD
370 ... Lamp relay board 371 ... Panel decoration lamp 375 ... Lamp relay board 376 ... Frame decoration lamp 400 ... Power supply control board 402 ... Power failure monitoring circuit 404 ... Power supply circuit 406 ... Backup power supply circuit

Claims (1)

A control unit that controls at least a part of the operation of the gaming machine by performing a loop process that repeatedly executes a predetermined control process;
A power stop prediction unit that predicts a power supply stop to the control unit;
An information storage unit that holds control information necessary for the control process for a predetermined period during the operation of the gaming machine and after the supply of power is stopped;
A game having a backup processing unit that periodically checks a prediction result in the power stop prediction unit and stores the control information in the information storage unit so that the control process can be reproduced according to the inspection result. Machine ,
A gaming machine that executes a process of checking a prediction result in the power outage stop prediction unit at a position where a value of a stack pointer in a loop that repeatedly executes a predetermined control process becomes a specified value .