JPS62269253A - Power failure processing system for semiconductor memory device - Google Patents

Abstract

PURPOSE:To constitute the titled system so that a host device can use a semiconductor memory part immediately after a power source is restored, in case of the power failure of a short time, by transferring and saving the data of the semiconductor memory part to a nonvolatile storage part, when a power failure time is continued exceeding a prescribed time. CONSTITUTION:The titled system is constituted so that the power failure time is monitored by a timer 6a, a transfer operation is started when the power failure time exceeds a prescribed time T0, and a data saving start is delayed. Also, during that time, if a power source is restored as shown by a dotted line in the figure, the saving operation is not executed. In such way, when the power failure time is below the prescribed time T0, the saving of a data, and its subsequent restoration are not executed, therefore, a semiconductor memory device can be used immediately after the power failure is restored.

Description

[Detailed Description of the Invention] [Table of Contents] Overview Industrial Application Fields Prior Art Problems to be Solved by the Invention Means for Solving the Problems (Fig. 1) Working Examples (al-Description of Examples) (Figures 2 and 3) (bl Description of other embodiments Effects of the invention [Summary] Semiconductor memory device having a semiconductor memory section that is directly accessed from a higher level and a non-volatile memory section for data hack-up) When a power outage is detected, the data in the semiconductor memory section is transferred and evacuated to the non-repellent storage section if the power outage continues for a period longer than a specified time. Something that the higher level can use immediately.

[Industrial application field]

The present invention relates to a power outage processing method for saving data in a semiconductor memory when a power outage occurs in a semiconductor storage device such as a semiconductor disk device having a semiconductor memory and a nonvolatile storage section for bank-up.

With the recent demand for faster computer systems, D
ASD (Direct Access Store)
High-speed access is also required for external storage devices used as devices.

For this reason, semiconductor disk devices having a semiconductor memory section and a magnetic disk are provided on the market.

In a semiconductor disk device, a high-level device accesses a semiconductor memory section that can be accessed at high speed, and since the semiconductor memory section is one-time, a non-volatile magnetic disk device is used for data backup. Data is transferred to and from the semiconductor memory section as necessary.

In such a semiconductor storage device, data in the semiconductor memory section is lost when a power outage occurs, so it is necessary to save this data to a magnetic disk device.

[Conventional technology]

In conventional semiconductor storage devices, when a power outage occurs,
The power supply was banked up using a battery, and data in the semiconductor memory section was saved to a magnetic disk device (FII! repellent storage device) at the same time as the occurrence of a power outage was detected within the duration of the battery life.

[Problem that the invention seeks to solve]

The memory capacity of such a semiconductor memory section is relatively large (for example, 256 megabytes), and it takes several minutes to 10 minutes to transfer the data to a nonvolatile storage device.

For this reason, if data is transferred to a non-volatile storage device at the same time as a power outage occurs, as in the conventional technology, the power outage may occur (even if the power outage goes out in a short period of time and the host device is ready for use). ,
The save transfer from the semiconductor memory section to the non-volatile storage device is in progress, and the higher-level device can use the semiconductor memory section only after data transfer (restoration transfer) from the non-volatile storage device to the semiconductor memory section. Later.

Therefore, when a power outage is restored in a short time, the host device cannot use the semiconductor memory section until the restored data is transferred, and the problem arises that it has to wait for a long time (several tens of minutes in the worst case).

SUMMARY OF THE INVENTION An object of the present invention is to provide a power outage processing method for a semiconductor memory device that can make a semiconductor memory section usable immediately after recovery from a short power outage.

[Means for solving problems]

FIG. 1 is a diagram explaining the principle of the present invention.

In the figure, 1 is a semiconductor memory section, which is directly accessed (read/written) from the upper level, and 2 is a non-volatile storage section, which is composed of a magnetic disk device, for example, and is a data backup of the semiconductor memory section 1. 3 is a transfer circuit that transfers data between the semiconductor memory section 1 and the non-volatile storage section 2 for saving and restoring data; 4 is a bank-up power supply; , for example, is composed of a battery and can keep the power bank up for a certain period of time in the event of a power outage. 5 is a power supply control unit that supplies power to each part, detects a power outage, and switches to the backup power supply 4 to supply power. , 6 is a control unit, and transfer circuit 3
It is equipped with a timer (time counting means) 6a that performs transfer control, etc., and counts power outage time.

In this control section 6, a timer 6a counts the power outage time, and when the power outage time exceeds a specified time To, it instructs the transfer circuit 3 to perform evacuation transfer.

[Effect]

In the present invention, as shown in FIG. 1(B), the timer 6a
If the power outage time exceeds the specified time TO,
The transfer operation is started for the first time, and the start of data saving is delayed, and if the power is restored during that time as shown by the dotted line in the figure, the saving operation is not performed.

Therefore, if the power outage time is less than the specified time To, the data is not saved and restored thereafter, so that it can be used immediately after the power outage is restored.

〔Example〕

(Al-Description of Embodiment FIG. 2 is a block diagram of one embodiment of the present invention, showing a semiconductor disk device.

In the figure, the same components as those shown in FIG. 1b is a memory access circuit which reads/writes the semiconductor memory 1.
6b is the control unit 6 for accessing the light.
6C is a control storage (C3) of the control unit 6, which performs transfer control etc. by executing a program.
b stores the program to be executed; 7 is a semiconductor disk controller; it is connected to channels of the upper computer through a channel interface and to the computer's power control device through a power control interface; 8 is an input/output/output unit; A transfer circuit that performs command/data input/output operations and data transfer operations. BT is a data transfer bus, and includes a transfer circuit 3 and a memory access circuit 1.
The BS is a common bus that transfers data between the MPU 6b, the C36C-% timer 6a, the power supply control unit 5, the transfer circuit 3, and the input/output/transfer circuit 8. This is for the purpose of exchanging information.

In normal operation, the MPU 6b instructs the transfer circuit 3 to perform restoration transfer via the common bus BS, and the transfer circuit 3 sequentially supplies the data on the magnetic disk 2 to the memory access circuit 1b and stores it in the semiconductor memory 1a. do.

When the transfer of a predetermined amount of data to the semiconductor memory 1a is completed, the MPU 6b gives a ready signal to the input/output/transfer circuit 8 via the common bus BS based on the transfer completion report from the transfer circuit 3, and sends this to the semiconductor disk controller. Output to channel from 7 and preparation is complete.

Thereafter, read/write commands and write data given from the channel interface are given from the semiconductor disk control section 7 to the memory access circuit 1b via the input/output/transfer circuit 8 to access the semiconductor memory 1a. Therefore, semiconductor memory 1a is directly accessed from the upper level.

On the other hand, when a power outage occurs, the following operations occur.

FIG. 3 is a flowchart of the power outage process configured in FIG. 2.

(2) The power supply control section 5 receives AC power and supplies operating voltage to each section. When the power supply control section 5 detects a power outage of the AC power supply, it immediately switches to the backup power supply 4, thereby supplying voltage to each section, and at the same time, the semiconductor disk control section 7
A power outage notification is sent to the upper level power control interface.

Also, the power is turned off (power outage) to MPU6b via the common bus BS.
Notify.

(2) Upon receiving this, the MPU-6b starts the timer 6a.

When the timer 6a counts the specified time TO, it notifies the timeout via the common bus BS.

(2) Therefore, the MPU 6b checks whether there is a timeout notification from the common bus BS.

■ If the MPU6b determines that there is no timeout notification,
It is checked whether there is a power restoration notification from the power control unit 5, and if there is no power restoration notification, the process returns to step (2).

On the other hand, if there is a power restoration notification, the power outage processing is completed and data backup and transfer is not performed.

It should be noted that the power restoration is also notified to the upper level from the power control interface.

■ On the other hand, if there is a timeout notification in step ■, M
The PU 6b instructs and activates the transfer circuit 3 to perform save transfer via the common bus BS.

As a result, the transfer circuit 3 sequentially performs read access to the semiconductor memory 1a from the memory access circuit 1b, extracts data, and writes it to the magnetic disk 2.

When the transfer circuit 3 finishes transferring all the data in the semiconductor memory 1a, it reports this to the MPU 6b, thereby completing data saving and ending the power outage process.

Note that the bank-up power supply 4 has a capacity that can supply power for this time (about 10 minutes).

Furthermore, when the power is restored after data has been saved, the power control section 5 supplies power to each section again and sends a restoration notification to the MPU 6.
give to b. The MPU 6b thereby instructs the transfer circuit 3 to perform restoration transfer, and causes the above-mentioned restoration transfer operation to be executed.

(bl Description of other embodiments In the above embodiment, the timer 6a is provided as a hardware device, but the MPU 6b may also execute the timer function by software. The explanation will be given using a magnetic disk as a non-volatile memory as an example. However, other well-known glued/writable non-standard memories, such as magnetic bubble memories, may also be used.

Although the present invention has been described above using examples, the present invention can be modified in various ways according to the gist of the present invention, and these are not excluded from the present invention.

〔Effect of the invention〕

As explained above, according to the present invention, in a semiconductor memory device having a semiconductor memory section and a non-volatile memory section, when a short power outage occurs, the non-volatile memory section of the semiconductor memory section is Since no data is saved, the system can be used immediately after power is restored, effectively shortening system down time due to power outage, and greatly contributing to improving the functionality of such semiconductor storage devices.

[Brief explanation of drawings]

FIG. 1 is a diagram explaining the principle of the present invention, FIG. 2 is a configuration diagram of an embodiment of the present invention. FIG. 3 is a flowchart of the power outage process in FIG. 2. In the figure, 1-semiconductor memory section; 2-non-volatile storage; 3-Transfer circuit, 4-backup power supply, 5-power control unit; 6~control unit, 6a-Timer (time counting means).

Claims (1)

[Claims] A semiconductor memory section (1) that is accessed from a higher level, a non-volatile storage section (2) for data backup of the semiconductor memory section (1), and a semiconductor memory section (1). a transfer circuit (which transfers data between the non-volatile storage unit (2));
3); a power supply control unit (5) that detects a power outage and switches to a backup power supply (4) to supply power; and a control unit (6) that controls transfer of the transfer circuit (3). In the device, the control unit (6) includes a time counting means (6a) that counts the power outage time when a power outage is detected, and when the power outage time exceeds a specified time, the control unit (6) A power outage processing method for a semiconductor memory device, characterized in that the transfer circuit (3) instructs the transfer circuit (3) to save data in the semiconductor memory section (1) to the nonvolatile memory section (2).