JP4647990B2 - Multilayer wiring board - Google Patents

Description

  The present invention relates to a multilayer wiring board having a small-diameter through-hole portion, the through-hole portion being filled with a hardened material of a filler, and an opening of the through-hole portion being closed with a lid-like conductor. .

  In recent years, with the miniaturization and high performance of electronic devices, there has been a demand for high-density mounting of electronic components, and in order to achieve such high-density mounting, multilayer circuit board technology is regarded as important. . As a specific example using the multilayer technology, a multilayer wiring board provided with a build-up layer in which an interlayer insulating layer and a wiring layer are alternately laminated on one side or both sides of a core board provided with a through hole portion having a diameter of about 300 μm. Is well known.

  When manufacturing such a multilayer wiring board, in order to ensure the flatness of the build-up layer, a step of filling the through-hole part with a filler such as a paste for filling a through-hole in advance and heating and curing it Is required. And several techniques related to the technique for filling the through hole portion have been proposed (see, for example, Patent Documents 1 and 2). Patent Document 1 discloses a technique for preventing cracks and the like in an interlayer insulating layer by filling a through-hole portion using a resin filler that specifies the types of a resin component and a curing agent. Patent Document 2 discloses a technique for preventing cracks in an interlayer insulating layer or the like by filling a through-hole portion using a filler having a characteristic shrinkage rate of a cured body.

Japanese Patent Laid-Open No. 10-75027

JP-A-11-199759

  Recently, there has been a demand for further high-density mounting, and the number of cases in which small-diameter through-hole portions are formed is increasing. However, when the through hole diameter is smaller than 200 μm, a problem that has not been seen so far occurs.

  That is, as schematically shown in FIG. 5, delamination occurs at the interface between the lid plating 103 that closes the opening of the through-hole portion 102 filled with the hardened material 101 of the filler and the via 106 immediately above the lid plating 103. It becomes easy to secure high connection reliability. In addition, cracks occur in the interface between the lid plating 103 and the through-hole plating 105 and in the lid plating 103 itself, and similarly, it is difficult to ensure high connection reliability.

  The present invention has been made in view of the above problems, and its purpose is to prevent cracks and delamination from occurring in the lid-like conductor that closes the opening of the through-hole part and its surrounding conductor part, and to have excellent connection reliability. Another object of the present invention is to provide a multilayer wiring board.

  Therefore, when the inventors of the present invention conducted intensive research to solve the above-mentioned problems, as to the mechanism of delamination and cracks in the lid-like conductor that closes the opening of the through-hole part and the surrounding conductor part, as follows: I guessed.

  In a typical multilayer wiring board manufacturing process, after solder reflow is performed once or multiple times to produce a wiring board, various evaluation tests (such as an appearance evaluation test) are performed on the wiring board to obtain a final product. Yes. By the way, the hardened body of the filler thermally expands by heating and cooling during solder reflow. In particular, the hardened filler material pushes up the lid-like conductor located at the opening of the through-hole portion due to expansion in the Z-axis direction (that is, the thickness direction of the wiring board, the axial direction of the through-hole portion) of the hardened filler material. Compressive / tensile stress is applied to the lid-like conductor and the surrounding conductor. When a reliability evaluation test for applying a thermal shock to a wiring board is performed in a state where compression / tensile stress is inherent in this way, particularly when the through-hole portion has a small diameter, the lid-like conductor located in the opening and its Cracks and delamination are likely to occur in the surrounding conductor portions. Under such inference, the inventor of the present application pays attention to the physical property value of the cured material of the filler, particularly the value of linear expansion, and if the value is optimized, the occurrence of cracks and delamination can be effectively prevented. I found out. The inventor of the present application further developed such knowledge and finally came up with the following problem solving means.

That is, as means for solving the above-mentioned problem, the inner wall surface of a through hole having a first main surface and a second main surface and having a diameter of 200 μm or less that opens at the first main surface and the second main surface. A core substrate having a through-hole portion having a structure in which a through-hole conductor is provided, an interlayer insulating layer disposed on at least one side of the first main surface and the second main surface of the core substrate, and the interlayer insulating layer A wiring layer disposed on the surface of the substrate, a cured body of the filler filled in the through-hole portion, and a lid-like conductor that closes the opening of the through-hole portion, and the filler is made of epoxy resin. A hardener and a filler having a maximum particle size of 5 μm or more and 60 μm or less are added, and the glass transition point is 140 ° C. or more, and the linear expansion value in the substrate thickness direction of the cured product of the filler is, Temperature range from room temperature to solder reflow temperature Ri der Oite 1.2 percent or less, the substrate thickness values of the linear expansion in the direction of the core substrate is not greater than 1.3% in a temperature range from room temperature to solder reflow temperature, the interlayer insulating layer The average thermal expansion coefficient in the substrate thickness direction is 20 ppm / K or more and 60 ppm / K or less, the average thermal expansion coefficient in the substrate thickness direction of the cured material of the filler, and the substrate thickness of the through-hole conductor. The absolute value of the difference between the average thermal expansion coefficient in the vertical direction is 20 ppm / K or less, the average thermal expansion coefficient in the substrate thickness direction of the core substrate, and the average of the through-hole conductors in the substrate thickness direction There is a multilayer wiring board characterized in that the absolute value of the difference from the thermal expansion coefficient is 30 ppm / K or less .

  Therefore, according to the present invention, the linear expansion value of the hardened body of the filler is suppressed to an extremely low value of 1.2% or less in the temperature range from room temperature to the solder reflow temperature. Therefore, the amount of thermal expansion of the hardened material of the filler when solder reflow is performed is reduced, and the compressive / tensile stress inherent in the lid-like conductor and its surrounding conductor portion is also reduced. Therefore, even if a reliability evaluation test involving thermal shock is performed, cracks and delamination are less likely to occur in the lid-like conductor and its surrounding conductor portions, and high connection reliability can be imparted.

  Here, the linear expansion value of the hardened body of the filler is 1.20% or less (excluding 0%) in the temperature range from room temperature to the solder reflow temperature, preferably 0.30% or more and 1. It is 20% or less, particularly preferably 0.80% or more and 1.20% or less. If the value of the linear expansion exceeds 1.20%, the amount of thermal expansion of the cured material of the filler cannot be sufficiently reduced, and the rate of occurrence of cracks and delamination cannot be sufficiently reduced. Further, when the value of the linear expansion is less than 0.30%, the cured material of the filler becomes hard, and the cured material of the filler itself may crack, or the through-hole conductor may crack. There is.

In the above invention, the term “linear expansion” refers to a cured material of a filler constituting the multilayer wiring board as a sample, and measured from room temperature (25 ° C.) to solder reflow temperature with a TMA apparatus (thermomechanical analyzer). It refers to the elongation rate (%) of the sample. When a tin-lead eutectic solder (Sn / 37Pb: melting point 183 ° C.) is selected as a solder material to be used as a component of the multilayer wiring board, the solder reflow temperature is the same as that for tin-lead eutectic solder. The reflow temperature is set (for example, 215 ° C.). That is, the reflow temperature can be said to be a temperature of the melting point of the solder plus about 30 ° C. Further, Sn / Pb-based solder other than tin-lead eutectic solder, for example, solder having a composition of Sn / 36Pb / 2Ag (melting point 190 ° C.) may be used, and a similar solder reflow temperature may be set.
Furthermore, as a solder material to be used as a component of the multilayer wiring board, lead-free solder can be selected in addition to the above lead-containing solder. The lead-free solder means a solder containing no or almost no lead. For example, Sn-Ag solder, Sn-Ag-Cu solder, Sn-Ag-Bi solder, Sn-Ag-Bi- Cu-based solder, Sn-Zn-based solder, Sn-Zn-Bi-based solder, and the like can be given. In addition, trace elements (for example, Au, Ni, Ge, etc.) may be contained in the solder of each of the above systems.
Specific examples of the Sn—Ag solder include, for example, solder having a composition of Sn / 3.5Ag (melting point 221 ° C.) and solder having a composition of Sn / 3Ag / 6-8In. Specific examples of the Sn—Ag—Cu based solder include a solder having a composition of Sn / 3.0Ag / 0.5Cu (melting point: 217 ° C.). Specific examples of the Sn-Ag-Bi solder include a solder having a composition of Sn / 3.5Ag / 0.5Bi / 3.0In (melting point 214 ° C.), Sn / 3.2Ag / 2.7Bi / 2.7In. Such as a solder (melting point: 210 ° C.). Specific examples of the Sn—Ag—Bi—Cu based solder include a solder having a composition of Sn / 2.5Ag / 1.0Bi / 0.5Cu (melting point: 214 ° C.). Specific examples of the Sn—Zn solder include a solder having a composition of Sn / 9.0Zn (melting point: 199 ° C.). Specific examples of the Sn—Zn—Bi based solder include a solder having a composition of Sn / 8Zn / 3Bi (melting point: 198 ° C.).

  It is inherently desirable that the measurement of the linear expansion of the hardened material of the filler is performed on the hardened material of the filler that is actually filled in the through-hole portion. However, a result obtained by measurement by a simple method as described below may be used as a measurement result of linear expansion.

  First, a thermosetting filler is poured into a mold having a molding space of about 10 mm × 10 mm × 50 mm, and the filler is heat-cured under the same conditions as those in a normal process. Thereafter, a cylindrical test piece of φ5 mm × 20 mm is produced using a processing device such as a lathe, and measurement is performed by the TMA method using this as a sample. Here, “TMA” refers to thermomechanical analysis, such as that specified in JIS-K7197 (linear expansion coefficient test method by thermomechanical analysis of plastics). Then, in a state where a compression load of about 1 g is applied in the longitudinal direction of the test piece with a span of 20 mm, the sample is cooled to −55 ° C. and heated to 215 ° C. at a temperature increase rate of 10 ° C./min. At this time, the length of the sample at 25 ° C. and 215 ° C. is measured, and the obtained measurement result is substituted into Equation 1 to calculate the linear expansion value (%). In addition, when measuring linear expansion about a core board | substrate, what is necessary is just to cut the core board | substrate before formation of a through-hole part suitably, and to make a test piece.

εb = (L ₂₁₅ −L ₂₅ ) / L ₂₅ × 100 Equation 1

        εb: linear expansion (%)

L ₂₁₅ : sample length at 215 ° C. (mm)

L ₂₅ : sample length (mm) at room temperature (25 ° C.)

  The average coefficient of thermal expansion in the axial direction (Z-axis direction) of the cured product of the filler is preferably, for example, from 5 ppm / K to 50 ppm / K, particularly from 20 ppm / K to 40 ppm / K. It is more preferable that Further, the value of the average thermal expansion coefficient in the axial direction of the hardened body of the filler is preferably close to the average thermal expansion coefficient in the thickness direction (Z-axis direction) of the core substrate. The absolute value is preferably 20 ppm / K or less. This is because if the absolute value of the difference between the two is set to 20 ppm / K or less, the stress applied to the through-hole conductor or the like during the reliability evaluation test can be reduced. The absolute value of the difference between the two is more preferably 10 ppm / K or less.

  The average coefficient of thermal expansion of the cured product of the filler in the present invention can be measured by the following method. First, a cylindrical test piece of φ5 mm × 20 mm is prepared from the filler by the method described above, and measurement is performed by the TMA method using this as a sample. Here, “TMA” refers to thermomechanical analysis, such as that specified in JIS-K7197 (linear expansion coefficient test method by thermomechanical analysis of plastics). Then, in a state where a compression load of about 1 g is applied in the thickness direction of the test piece with a span of 20 mm, the sample is cooled to −55 ° C. and heated to 215 ° C. at a temperature increase rate of 10 ° C./min. At this time, the lengths of the samples at −55 ° C., 25 ° C., and 125 ° C. are measured, and the obtained measurement result is substituted into Equation 2 to calculate the value of average thermal expansion coefficient (ppm / K). In addition, when measuring an average thermal expansion coefficient about a core board | substrate, what is necessary is just to cut the core board | substrate before through-hole part formation suitably, and to make a test piece.

α = {(L ₁₂₅ −L ₋₅₅ ) / (L ₂₅ × (125 − (− 55)))} Equation 2

        α: Average coefficient of thermal expansion (ppm / K)

L ₁₂₅ : sample length at 125 ° C. (mm)

L ₋₅₅ : Length of sample at −55 ° C. (mm)

L ₂₅ : sample length (mm) at room temperature (25 ° C.)

  The absolute value of the difference between the average thermal expansion coefficient in the Z-axis direction of the cured material of the filler and the average thermal expansion coefficient in the Z-axis direction of the through-hole conductor is preferably 20 ppm / K or less, More preferably, it is 15 ppm / K or less. Furthermore, the absolute value of the difference between the average thermal expansion coefficient in the thickness direction of the core substrate and the average thermal expansion coefficient in the Z-axis direction of the through-hole conductor is preferably 30 ppm / K or less, and 25 ppm / K. The following is more preferable. In any case, by reducing the absolute value of the difference, it is possible to reduce the stress applied to the through-hole conductor, the lid-like conductor, the interlayer insulating layer, and the like during the reliability evaluation test.

  In addition, the average thermal expansion coefficient in the Z-axis direction of the interlayer insulating layer is preferably 20 ppm / K or more and 60 ppm / K or less, and more preferably 20 ppm / K or more and 55 ppm / K or less. If the average thermal expansion coefficient exceeds 60 ppm / K or less, the thermal expansion amount during the reliability evaluation test increases, stress is applied to the wiring layer and via pad portions, and cracks are likely to occur. On the other hand, when the average coefficient of thermal expansion is lower than 20 ppm / K, the interlayer insulating layer becomes hard. As a result, it becomes difficult to sufficiently fill a gap with the wiring layer, or the interlayer insulating layer itself tends to crack. There is a risk of

  Examples of the core substrate that can be used in the present invention include a resin substrate, a ceramic substrate, and a metal substrate. Among these, a resin substrate is preferable. Suitable resin substrates include substrates made of EP resin (epoxy resin), PI resin (polyimide resin), BT resin (bismaleimide-triazine resin), PPE resin (polyphenylene ether resin), and the like. In addition, a substrate made of a composite material of these resins and glass fibers (glass woven fabric or glass nonwoven fabric) may be used. Specific examples thereof include a high heat resistant laminate such as a glass-BT composite substrate and a high Tg glass-epoxy composite substrate (FR-4, FR-5, etc.). A substrate made of a composite material of these resins and organic fibers such as polyamide fibers may be used. Alternatively, a substrate made of a resin-resin composite material obtained by impregnating a thermosetting resin such as an epoxy resin with a three-dimensional network fluorine-based resin base material such as continuous porous PTFE may be used. In this case, it is desirable that the core substrate has a small value of linear expansion or average thermal expansion coefficient, and in that respect, it is preferable to use a high heat resistant laminate. Further, it may be a core substrate having a wiring layer inside.

  When a resin substrate is used as the core substrate, it is preferable to select one containing a powdery or fibrous inorganic filler. Examples of such inorganic fillers include ceramic fillers, metal fillers, and glass fillers. Suitable ceramic fillers include silica, alumina, calcium carbonate, aluminum nitride, aluminum hydroxide, titania, barium sulfate and the like. This is because if the resin contains an inorganic material, the values of linear expansion and average thermal expansion coefficient are lowered, and the heat resistance is also improved.

  The core substrate has a through-hole portion having a structure in which a through-hole conductor is provided on an inner wall surface of a through-hole opened in the first main surface and the second main surface. The through-hole conductor is formed by providing a conductive metal on the inner wall surface of the through hole. In this case, for example, through-hole plating formed by depositing electroless copper plating on the inner wall surface of the through hole is preferable from the viewpoint of manufacturing and cost. Further, the value of linear expansion in the thickness direction of the core substrate is preferably 0.3% or more and 1.4% or less, and 0.8% or more and 1.3% or less in a temperature range from room temperature to the solder reflow temperature. % Or less is preferable.

  The surface of the through-hole conductor should have few irregularities, and specifically, it should preferably be a smooth surface with Ra <1 μm. For example, in the case where a filler in which a filler is added to a resin is printed and filled in the through hole, the resin is taken out if there is an uneven portion. For this reason, the closer to the outlet side of the through hole, the more the filler content increases, the viscosity of the filler extremely increases, and the filling property deteriorates. Even if the filler can be filled in the through hole, a difference in thermal expansion due to the difference in the filler content occurs between the vicinity of the outlet side and the vicinity of the inlet side of the through hole. Therefore, there is a possibility that cracks are likely to occur in the cured body of the filler. Ra means the arithmetic average roughness standardized by JIS B 0601-1994.

  In the present invention, the through-hole portion has a smaller diameter than the conventional one, and has a structure in which a through-hole conductor is provided in a through-hole having a diameter of 200 μm or less (excluding 0 μm). The reason for this is that the problem of generation of cracks and delamination in the lid-like conductor that closes the opening of the through-hole portion and the surrounding conductor portion becomes apparent when the diameter of the through-hole becomes 200 μm or less. . That is, the problem specific to the present application can occur when the through hole has a diameter of 200 μm or less. Here, when there is a small-diameter through-hole part, the detailed reason for the problem to be solved peculiar to the present application is unknown. However, the stress load applied to the lid-like conductor or the like is larger than that of the conventional through-hole part. It is expected that there is a cause. The diameter of the through hole may be 100 μm or less (excluding 0 μm).

  The filler used in the present invention preferably has high heat resistance, and particularly preferably has a high glass transition point. This is because the average thermal expansion coefficient generally increases beyond the glass transition point, so that the linear expansion of the filler having a low glass transition point becomes large. The glass transition point is preferably 140 ° C. or higher, more preferably 150 ° C. or higher. The filler is preferably formed based on, for example, a resin material imparted with thermosetting properties, and is cured after filling the through hole portion. As the filler, those formed on the basis of an epoxy resin are suitable. This is because epoxy resins generally have little curing shrinkage, and even after curing, dents are unlikely to form.

  Among the epoxy resins, aromatic epoxy excellent in heat resistance, moisture resistance, and chemical resistance, for example, bisphenol A type epoxy resin, bisphenol F type epoxy resin, phenol novolac type epoxy resin, cresol novolak type epoxy resin, etc. are used. It is desirable. Furthermore, the use of a polyfunctional epoxy resin having three or more functions (such as aminophenol type) is effective in achieving reduction in linear expansion.

  The filler is preferably an epoxy resin added with a curing agent for imparting thermosetting properties. As such a curing agent, an imidazole-based curing agent or an amine-based curing agent such as dicyanamide is preferable in terms of excellent heat resistance and chemical resistance. The properties of the curing agent are not particularly limited, but the powdery form has an advantage of easy management of the life after preparation.

  The filler is preferably an epoxy resin obtained by adding a filler having a maximum particle size of 5 μm or more and 60 μm or less in addition to a curing agent. Such fillers are preferably inorganic fillers such as ceramic fillers, metal fillers, glass fillers and the like. This is because the addition of the inorganic filler leads to a reduction in the linear expansion and average thermal expansion coefficient of the cured material of the filler. Suitable ceramic fillers include particles of silica, alumina, calcium carbonate, aluminum nitride, aluminum hydroxide, titania, barium sulfate, and the like. Suitable metal fillers include particles of copper, silver, tin, lead, titanium, iron, nickel and the like. In addition, you may use the particle | grains which coated the surface of the ceramic filler with the metal. Both ceramic fillers and metal fillers may be used.

  The maximum particle size of the filler is preferably 5 μm or more and 60 μm or less. When the maximum particle size is less than 5 μm, the filler cannot be filled at a high density, so that it is difficult to suppress the linear expansion and the average thermal expansion coefficient of the cured material of the filler to a low value. On the other hand, when the maximum particle size exceeds 60 μm, clogging tends to occur inside when filling the through hole having a diameter of 200 μm or less with the filler. Therefore, it may be difficult to fill the filler.

When the through-hole part is filled, the viscosity of the filler is preferably 300 Pa · s or less when the shear rate is 21 s ⁻¹ at 22 ± 3 ° C., and more preferably 10 Pa · s to 200 Pa · s. It is more preferable that If the viscosity is less than 10 Pa · s, the filled filler may sag outside the through-hole portion. On the other hand, when the viscosity exceeds 200 Pa · s, the fluidity of the filler becomes too small, and the work of filling the through hole with the filler becomes difficult. A suitable method for filling the through hole with a filler is a printing method. In this case, the filler may be printed through a mask, or the filler may be printed directly without using a mask.

  In this invention, you may mix other components other than the above with a filler in the range which does not have influence substantially. For example, it is allowed to add an antifoaming agent, a thixotropic agent, a coloring agent, a leveling agent, a coupling agent, etc. within a range that does not substantially affect the insulation and moisture resistance.

  The interlayer insulating layer is disposed on the first main surface side, the second main surface side, or both sides of the first main surface and the second main surface of the core substrate. The interlayer insulating layer is preferably formed by using an epoxy resin, polyimide resin, bismaleimide-triazine resin or the like as a base and a curing agent or the like added thereto. If it is such, it will become easy to set the linear expansion and average thermal expansion coefficient of an interlayer insulation layer to a low value. The interlayer insulating layer may be a single layer or a plurality of layers.

  A wiring layer is disposed on the surface of the interlayer insulating layer. The technique for forming the wiring layer and the metal material are appropriately selected in consideration of conductivity, adhesion with the interlayer insulating layer, and the like. Examples of the metal material used for forming the wiring layer include copper, copper alloy, silver, silver alloy, nickel, nickel alloy, tin, and tin alloy. As a method of forming the wiring layer, a known method such as a subtractive method, a semi-additive method, or a full additive method can be employed. Specifically, for example, techniques such as etching of copper foil, electroless copper plating or electrolytic copper plating, electroless nickel plating or electrolytic nickel plating can be used. It is also possible to form a wiring layer by etching after forming a metal layer by a technique such as sputtering or CVD, or to form a wiring layer by printing a conductive paste or the like. A solder resist for protecting the wiring layer may be disposed on the outermost layer of the interlayer insulating layer as necessary.

  A lid-like conductor that closes the through-hole portion is disposed in the opening of the through-hole portion. Such a lid-like conductor can be obtained by forming a conductor layer at the opening of the through-hole portion by a conventionally known method using a conductive metal. Preferable examples of the lid-like conductor include lid plating (cover plating layer) formed by performing copper plating. The thickness of the lid plating is set to, for example, 5 μm or more and 50 μm or less, and particularly preferably 10 μm or more and 30 μm or less.

  Vias may be arranged at positions on the surface of the lid-like conductor in the interlayer insulating layer, and filled vias filled with plating in the via recesses are particularly preferably arranged. A filled via with a via recess filled with plating is weaker to push up from the through-hole portion than a via with no via recess filled with plating, and it is difficult to release stress by its own plastic deformation. Therefore, if there is a filled via at that position, a problem specific to the present application such as generation of cracks and delamination in the lid-like conductor and the surrounding conductor portion is likely to occur. The filled via is formed, for example, by opening a via recess in the interlayer insulating layer and then electrolytically plating the inside of the via recess to make the upper surface substantially flat. For filled vias, after opening via recesses in the interlayer insulation layer, electroless copper plating is applied to the insides of the via recesses, and electrolytic copper plating or conductive paste is filled in the recesses in the vias so that the top surface is substantially flat. It is formed by.

Further, as another means for solving the above-described problem, there is a through hole having a first main surface and a second main surface and having a diameter of 200 μm or less that opens at the first main surface and the second main surface. A core substrate having a through-hole portion having a structure in which a through-hole conductor is provided on an inner wall surface; an interlayer insulating layer disposed on at least one side of the first main surface and the second main surface of the core substrate; and the interlayer and arranged wiring layer on the surface of the insulating layer, wherein comprising a cured body of the filler filled in the through-hole portion, and a lid-like conductor for closing the opening portion of the through hole, wherein the filler is an epoxy A cured product of the filler in a temperature range from room temperature to solder reflow temperature , which is obtained by adding a curing agent and a filler having a maximum particle size of 5 μm or more and 60 μm or less to a resin, and having a glass transition point of 140 ° C. or more. substrate thickness direction of the line of The value of Zhang, absolute value of the difference between the value of the linear expansion of the substrate thickness direction of the core substrate in the temperature range from room temperature to solder reflow temperature, 0.1% or less, of the interlayer insulating layer average thermal expansion coefficient of the substrate thickness direction, 20 ppm / K Ri der than 60 ppm / K or less, an average thermal expansion coefficient of the substrate thickness direction of the cured product of the filler, the substrate of the through-hole conductors The absolute value of the difference between the average thermal expansion coefficient in the thickness direction is 20 ppm / K or less, the average thermal expansion coefficient in the substrate thickness direction of the core substrate, and the substrate thickness direction of the through-hole conductor in the substrate thickness direction. There is a multilayer wiring board characterized in that the absolute value of the difference from the average thermal expansion coefficient is 30 ppm / K or less .
Therefore, according to the present invention, the difference between the value of linear expansion of the cured material of the filler in the temperature range from room temperature to the solder reflow temperature and the value of linear expansion in the thickness direction of the core substrate in the temperature range. The absolute value is suppressed to an extremely low value of 0.1% or less. Therefore, the amount of thermal expansion of the hardened material of the filler when solder reflow is performed is reduced, and the compressive / tensile stress inherent in the lid-like conductor and its surrounding conductor portion is also reduced. Therefore, even if a reliability evaluation test involving thermal shock is performed, cracks and delamination are less likely to occur in the lid-like conductor and its surrounding conductor portions, and high connection reliability can be imparted.

Hereinafter, a multilayer wiring board 11 according to an embodiment of the present invention will be described in detail with reference to FIGS.
As shown in FIG. 1, the multilayer wiring board 11 is a double-sided build-up multilayer wiring board having a build-up layer on both sides. The core substrate 12 constituting the multilayer wiring substrate 11 is a substantially rectangular plate-like member (thickness 0.8 mm) in plan view, and has an upper surface 13 (first main surface) and a lower surface 14 (second main surface). Have. Through holes 15 penetrating the upper surface 13 and the lower surface 14 are formed at equal intervals at a plurality of locations on the core substrate 12. These through-hole portions 15 have a structure in which a through-hole plating 17 (through-hole plating portion) is provided on the inner wall surface of the through-hole 16 that opens at the upper surface 13 and the lower surface 14. In the case of this embodiment, the through-hole plating 17 is made of electrolytic copper plating after electroless copper plating, and the deposition thickness is set to about 20 μm. The surface of the through-hole plating 17 is a smooth surface with almost no irregularities, and Ra is less than 1 μm. The through hole portion 15 is filled with a hardened material 18 of a filler. Here, a paste is used as a filler, which is based on an epoxy resin and added with a curing agent and a filler. Details thereof will be described later. An upper lid plating 21 (lid conductor) is formed in the upper opening in the through hole portion 15, and a lower lid plating 22 (lid conductor) is formed in the lower opening in the through hole portion 15. Yes. As a result, the through-hole portion 15 is blocked by the lid platings 21 and 22. In the present embodiment, after electroless plating, lid platings 21 and 22 are formed by electrolytic copper plating, and the thickness (specifically, the thickness of the portion in contact with the end face of the hardened body 18 of the filler) is 15 μm to It is set to about 25 μm. The thicknesses of the lid platings 21 and 22 in contact with the land portion of the through-hole portion 15 are thicker than this, and are about 35 μm to 45 μm.

  An interlayer insulating layer 31 is formed on the upper surface 13 of the core substrate 12, and an interlayer insulating layer 32 is formed on the lower surface 14 of the core substrate 12. Each of the interlayer insulating layers 31 and 32 has a thickness of about 30 μm, and is made of, for example, a resin-resin composite material obtained by impregnating continuous porous PTFE with an epoxy resin. A wiring layer 23 is patterned on the surface of the first interlayer insulating layer 31 located on the upper surface 13 side, and the wiring layer is formed on the surface of the first interlayer insulating layer 32 located on the lower surface 14 side. 24 is patterned. Further, a via recess 41 having a diameter of about 70 μm is provided at a predetermined position in the first interlayer insulating layer 31, that is, immediately above the through-hole portion 15. A via recess 44 having a diameter of about 70 μm is similarly provided at a predetermined location in the first interlayer insulating layer 32, that is, immediately below the through-hole portion 15. The via recesses 41 and 44 are filled with electrolytic copper plating which is a via conductor, whereby filled vias 43 and 46 are formed. The filled via 43 on the upper surface 13 side has an inner surface connected to the lid plating 21, and an outer surface connected to the wiring layer 23. As a result, the through-hole portion 15 and the wiring layer 23 are electrically connected via the filled via 43. The filled via 46 on the lower surface 14 side has an inner surface connected to the lid plating 22, and an outer surface connected to the wiring layer 24. As a result, the through hole portion 15 and the wiring layer 24 are electrically connected through the filled via 46.

  A second interlayer insulating layer 51 is formed on the surface of the first interlayer insulating layer 31, and a second interlayer insulating layer 52 is formed on the surface of the first interlayer insulating layer 32. Is formed. Each of the interlayer insulating layers 51 and 52 has a thickness of about 30 μm and is made of a resin-resin composite material in which continuous porous PTFE is impregnated with an epoxy resin. Solder resists 71 and 72 are provided on the surfaces of the second interlayer insulating layers 51 and 52, respectively. Via recesses 61 and 64 having a diameter of about 70 μm are provided at predetermined positions in the second interlayer insulating layers 51 and 52, respectively. The via recesses 61 and 64 are filled with electrolytic copper plating which is a via conductor, whereby filled vias 63 and 66 are formed.

  The filled via 63 on the upper surface 13 side is connected to the wiring layer 23 on the inner side surface, and the outer side surface is exposed by the opening 81 of the solder resist 71. On the outer surface of the filled via 63, a solder bump 83 used for connection to a pad on the IC chip side (not shown) is provided. The inner surface of the filled via 66 on the lower surface 14 side is connected to the wiring layer 24, while the outer surface thereof is exposed through the opening 84 of the solder resist 72. On the outer surface of the filled via 66, there are provided solder bumps 86 used for connection to a pad on the mother board (not shown).

Hereinafter, examples in which the present embodiment is more specific will be described.
(1) Production of filler for filling the through-hole portion 15

  An epoxy resin, a curing agent, and a filler were mixed so as to have the composition shown in Table 1, and kneaded using a three-roll mill to prepare a through-hole filling paste as a filler. The details of the raw materials used here are as follows. In Table 1, the amount of each component is expressed in parts by weight so that the sum of the epoxy resin and the curing agent is 100 parts. In addition to the following components, a small amount of catalyst nuclei, thickener and antifoaming agent were added to the through-hole filling paste.

  <Filler>

  E-828: bisphenol A type epoxy resin (made by Japan Epoxy Resin)

  E-807: Bisphenol F type epoxy resin (made by Japan Epoxy Resin)

  E-630: aminophenol type epoxy resin (made by Japan Epoxy Resin)

  <Curing agent>

  ・ 2MAZ-PW: Imidazole-based curing agent (manufactured by Shikoku Chemicals)

  ・ DICY7: Dicyandiamide-based curing agent (manufactured by Japan Epoxy Resin)

  <Filler>

  F1: Atomized Cu powder classified to an average particle size of 3 μm and a maximum particle size of 10 μm

  F2: Silica powder classified to an average particle size of 6 μm and a maximum particle size of 24 μm

F3: Surface treated product of calcium carbonate powder classified to an average particle size of 2 μm and a maximum particle size of less than 10 μm (2) Production of multilayer wiring board 11

  In manufacturing the multilayer wiring board 11, the following core board 12 was used. The physical properties are shown in Table 2.

  <Core substrate>

  Core substrate A: BT / glass cloth composite substrate A

  Core substrate B: Epoxy / glass cloth / filler composite substrate

  Core substrate C: BT / glass cloth composite substrate C

  First, a through hole 16 having a diameter of 100 μm, 200 μm, or 300 μm was provided in the core substrate 12 (thickness 0.8 mm). Thereafter, electroless copper plating and electrolytic plating were performed according to a conventionally known method, and a through-hole plating 17 was provided on the inner wall surface of the through-hole 16 to form a through-hole portion 15. Next, the filler shown in Table 1 was printed by a conventionally known printing method to fill the through-hole portion 15 with the filler. Then, the core substrate 12 was heat-cured under the conditions of 150 ° C. × 5 hours to obtain a cured material 18 of the filler. After such a thermosetting treatment, after smoothing the upper surface 13 and the lower surface 14 of the core substrate 12 by belt sander polishing, after the electroless plating on the entire core substrate 12 including the end face of the cured material 18 of the filler, Electrolytic copper plating was applied. Next, a dry film was provided on the formed conductor layer, exposed and developed, and then etched to pattern the conductor layer. As a result, lid platings 21 and 22 were formed in the opening of the through-hole portion 15. Furthermore, after forming the interlayer insulation layers 31 and 32 (Ajinomoto: ABF-GX, the average thermal expansion coefficient in the Z-axis direction is 55 ppm / K) by the build-up method, a carbon dioxide laser is used to directly above the through-hole portion 15. I made a hole. The via recesses 41 and 44 formed by drilling are filled with electrolytic copper plating after electroless plating, and filled vias 43 and 46 are formed. At the same time, wiring layers are formed on the surfaces of the interlayer insulating layers 31 and 32. 23, 24 were formed. Further, by the same method, interlayer insulating layers 51 and 52 were formed, filled holes 63 and 66 were formed by laser drilling, electroless plating, electrolytic copper plating, etc., and then solder resists 71 and 72 were formed. Finally, solder is printed on the filled vias 63 and 66 exposed from the solder resists 71 and 72, and reflow is performed under a heating condition of 215 ° C. × 10 seconds, and the multilayer wiring of FIG. The substrate 11 was completed. In this embodiment, tin-lead eutectic solder (Sn / 37Pb: melting point 183 ° C.) was used as a solder material for forming the solder bumps 83 and 86.

As shown in Table 3, here, the combination of the core substrate A and the filler F1 is “sample number 1”, the combination of the core substrate A and the filler F2 is “sample number 2”, and the core substrate A and The combination with the filler F3 was “sample number 3”, and the combination with the core substrate A and the filler F4 was “sample number 4”. The combination of the core substrate B and the filler F1 was “sample number 5”. The combination of the core substrate C and the filler F1 was “sample number 6”, and the combination of the core substrate C and the filler F4 was “sample number 7”.
(3) Thermal shock test

In order to compare the connection reliability of the multilayer wiring board 11 manufactured according to the above (2), a thermal shock test was performed as follows. Specifically, with the cycle of −55 ° C. × 5 minutes to 125 ° C. × 5 minutes as one cycle, the core substrate 12 is cut along the axial direction of the through-hole portion 15 when this heat cycle is performed 500 times. The cut surface was observed with SEM. Then, the occurrence of cracks and delamination in the cover platings 21 and 22 and the conductor portions in contact therewith (land portions of the through-hole portion 15 and filled vias 43 and 46) were investigated. The results are shown in Table 3. Incidentally, in the multilayer wiring board 11 before the thermal shock test was performed, defects such as cracks and delamination were not particularly recognized.
(4) Measurement of linear expansion and average thermal expansion coefficient of cured material 18 of filler and core substrate 12

  Cured body 18 of filler: First, the filler is poured into a mold having a molding space of about 10 mm × 10 mm × 50 mm, and the filler is used under the conditions of 150 ° C. × 5 hours (that is, the same conditions as those in a normal use process). Heat cured. Thereafter, a cylindrical test piece of φ5 mm × 20 mm was prepared using a lathe, and measurement was performed by the TMA method using this as a sample. That is, in a state where a compressive load of about 1 g was applied in the longitudinal direction of the test piece with a span of 20 mm, the sample was cooled to −55 ° C. and heated to 215 ° C. at a temperature increase rate of 10 ° C./min. At this time, the lengths of the samples at 25 ° C. and 215 ° C. were measured, and the obtained measurement results were substituted into the above equation 1 to calculate the linear expansion value (%). Further, the lengths of the samples at −55 ° C., 25 ° C., and 125 ° C. were measured, and this measurement result was substituted into the above equation 2 to calculate the value of average thermal expansion coefficient (ppm / K). The results are shown in Tables 1 and 2.

Core substrate 12: Cut into a thickness of 0.8 mm × length and width 5.0 mm using a dicing apparatus to obtain a square test piece, and this was used as a sample and measured by the TMA method. That is, in a state where a compressive load of about 1 g was applied in the thickness direction of the test piece, it was cooled to −55 ° C. and heated to 215 ° C. at a temperature rising rate of 10 ° C./min. At this time, the thickness of the sample at 25 ° C. and 215 ° C. was measured, and the measurement result was substituted into the above equation 1 to calculate the linear expansion value (%). Moreover, the thickness of the sample at −55 ° C., 25 ° C., and 125 ° C. was measured, and this measurement result was substituted into the above equation 2 to calculate the value of the average thermal expansion coefficient (ppm / K). The results are also shown in Tables 1 and 2.
(5) Results and discussion

  -Linear expansion of the cured material 18 of the filler: As shown in Table 1, in the cured material 18 of the fillers F1 and F2, the linear expansion value is 1.20% or less, and the value belongs to the preferred range. It was. On the other hand, in the cured bodies 18 of the fillers F3 and F4, the linear expansion value exceeded 1.20%, and the value did not belong to the preferred range. Therefore, it was suggested that good results would be obtained when the fillers F1, F2 were selected.

  -Linear expansion and average thermal expansion coefficient of the core substrate 12: As shown in Table 2, the values of the linear expansion of the core substrates A and B were 1.30% or less, and the values belonged to the preferred range. . On the other hand, the value of linear expansion exceeded 1.30% for the core substrate C, and the value did not belong to the preferred range. The same tendency was observed for the average thermal expansion coefficient, and the core substrates A and B were lower in value than the core substrate C. From the above results, it was suggested that good results would be obtained when the core substrates A and B were selected.

  -Printability of filler on core substrate 12: Sample Nos. 1, 2, 3, 5, and 6 showed good printability even for through-hole portions 15 having an extremely small diameter of 100 μm. On the other hand, in sample numbers 4 and 7, it turned out that the printability with respect to the through-hole part 15 of a small diameter is bad, and filling is insufficient. That is, from the viewpoint of printability, it was found that better results were obtained when the fillers F1, F2, and F3 were used than when the filler F4 was used.

Connection reliability by thermal shock test: In sample numbers 1, 2, and 5, even when the diameter of the through-hole portion 15 was 100 μm, the occurrence rate of cracks and delamination could be suppressed to 0%. Therefore, in the multilayer wiring board 11 of sample numbers 1, 2, and 5, extremely high connection reliability is ensured for the cover platings 21 and 22 and the peripheral conductor portions. On the other hand, in other samples, when the through-hole portion 15 was 200 μm or less, cracks and delamination occurred frequently.
(6) Conclusion

  Therefore, according to the present embodiment, the following effects can be obtained. That is, the linear expansion value of the hardened material 18 of the filler is suppressed to an extremely low value of 1.2% or less in the temperature range from room temperature (25 ° C.) to the solder reflow temperature (215 ° C.). Further, the linear expansion value of the hardened material 18 of the filler in the temperature range from room temperature (25 ° C.) to the solder reflow temperature (215 ° C.), and the linear expansion value in the thickness direction of the core substrate 12 in the temperature range The absolute value of the difference is suppressed to an extremely low value of 0.1% or less. Therefore, the amount of thermal expansion of the hardened material 18 of the filler when solder reflow is performed is reduced, and the compressive / tensile stress inherent in the cover platings 21 and 22 and the surrounding conductor portions is also reduced. Therefore, even if the thermal shock test as described above is performed, cracks and delamination are less likely to occur in the cover platings 21 and 22 and the surrounding conductors, and high connection reliability is imparted to the multilayer wiring board 11. Can do.

  Next, the technical ideas grasped by the embodiment described above are listed below.

  (1) Through having a structure in which a through hole conductor is provided on the inner wall surface of a through hole having a first main surface and a second main surface and having a diameter of 200 μm or less that opens at the first main surface and the second main surface. A core substrate having a hole; an interlayer insulating layer disposed on at least one side of the first main surface and the second main surface of the core substrate; and a wiring layer disposed on a surface of the interlayer insulating layer; A hardened body of the filler filled in the through-hole portion and a lid-like conductor that closes the opening of the through-hole portion, and the linear expansion value of the hardened body of the filler is from room temperature to a solder reflow temperature. A multilayer wiring board characterized by being 0.30% or more and 1.20% or less in the temperature range up to.

  (2) The technical idea characterized in that the absolute value of the difference between the average thermal expansion coefficient of the cured material of the filler and the average thermal expansion coefficient in the thickness direction of the core substrate is 20 ppm / K or less. 2. The multilayer wiring board according to 1.

  (3) Technical idea 1 or 2 characterized in that the absolute value of the difference between the average thermal expansion coefficient of the cured material of the filler and the average thermal expansion coefficient of the through-hole conductor is 20 ppm / K or less. A multilayer wiring board according to 1.

  (4) Technical thoughts 1 to 3, wherein an absolute value of a difference between an average thermal expansion coefficient in the thickness direction of the core substrate and an average thermal expansion coefficient of the through-hole conductor is 30 ppm / K or less. 4. The multilayer wiring board according to any one of 3 above.

  (5) The multilayer wiring board according to any one of the technical ideas 1 to 4, wherein an average thermal expansion coefficient of the interlayer insulating layer is 20 ppm / K or more and 60 ppm / K or less.

  (6) A through having a first main surface and a second main surface, and a through-hole conductor is provided on an inner wall surface of a through hole having a diameter of 200 μm or less that opens at the first main surface and the second main surface. A core substrate having a hole; an interlayer insulating layer disposed on at least one side of the first main surface and the second main surface of the core substrate; and a wiring layer disposed on a surface of the interlayer insulating layer; A cured body of the filler filled in the through-hole part, a lid-like conductor that closes the opening of the through-hole part, and a via disposed on the surface of the lid-like conductor, A multilayer wiring board, wherein a value of linear expansion of a cured product is 1.2% or less in a temperature range from room temperature to a solder reflow temperature.

  (7) A paste-like filler filled in the through-hole portion of the multilayer wiring board having a through-hole portion having a diameter of 200 μm or less, wherein the linear expansion value of the cured body of the filler is a solder reflow from room temperature A through-hole filling material for a multilayer wiring board, which is 1.2% or less in a temperature range up to a temperature.

  (8) A core substrate for manufacturing a wiring board, the inner wall surface of a first main surface, a second main surface, and a through hole having a diameter of 200 μm or less that opens at the first main surface and the second main surface A through-hole portion having a structure provided with a through-hole conductor, a cured body of the filler filled in the through-hole portion, and a lid-like conductor that closes the opening of the through-hole portion, and curing the filler A core substrate for manufacturing a wiring board, wherein a value of linear expansion of a body is 1.2% or less in a temperature range from room temperature to a solder reflow temperature.

  (9) A through-hole structure in which a through-hole conductor is provided on the inner wall surface of a through-hole having a diameter of 200 μm or less formed on a substrate, and the linear expansion value is 1.2 in the temperature range from room temperature to solder reflow temperature. The through-hole portion structure is characterized in that the inside is filled with a hardened material of a filler that is not more than% and the opening is closed with a lid-like conductor.

The principal part expanded sectional view of the multilayer wiring board of one Embodiment which actualized this invention. The table | surface which shows the composition and physical property of a filler used in the thermal shock test of an Example. The table | surface which shows the physical property etc. of the core board | substrate used by the thermal shock test of an Example. The table | surface which shows the result etc. of the thermal shock test of an Example. The principal part expanded sectional view of the multilayer wiring board for demonstrating the problem of a prior art.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 ... Multilayer wiring board 12 ... Core board 13 ... Upper surface as 1st main surface 14 ... Lower surface as 2nd main surface 15 ... Through-hole part 16 ... Through-hole 17 ... Through-hole plating as a through-hole conductor 18 ... Filler Hardened body 23, 24 ... Wiring layer 21, 22 ... Lid plating as lid-like conductor 31, 32, 51, 52 ... Interlayer insulating layer 41, 44, 61, 64 ... Via recess 43, 46, 63, 66 ... Filled via

Claims (8)

A through hole portion having a first main surface and a second main surface, and having a through hole conductor provided on an inner wall surface of a through hole having a diameter of 200 μm or less that opens at the first main surface and the second main surface. A core substrate having,
An interlayer insulating layer disposed on at least one side of the first main surface and the second main surface of the core substrate;
A wiring layer disposed on the surface of the interlayer insulating layer;
A cured body of a filler filled in the through-hole portion;
A lid-like conductor that closes the opening of the through-hole portion ;
The filler is obtained by adding a curing agent and a filler having a maximum particle size of 5 μm or more and 60 μm or less to an epoxy resin, and has a glass transition point of 140 ° C. or more.
The value of the linear expansion of the substrate thickness direction of the cured product of the filler, from room Ri der 1.2% or less in a temperature range up to the solder reflow temperature, the linear expansion of the substrate thickness direction of the core substrate The value is 1.3% or less in the temperature range from room temperature to the solder reflow temperature,
The average thermal expansion coefficient of the interlayer insulating layer in the substrate thickness direction is 20 ppm / K or more and 60 ppm / K or less,
The absolute value of the difference between the average thermal expansion coefficient in the substrate thickness direction of the cured body of the filler and the average thermal expansion coefficient in the substrate thickness direction of the through-hole conductor is 20 ppm / K or less,
The absolute value of the difference between the average thermal expansion coefficient of the core substrate in the substrate thickness direction and the average thermal expansion coefficient of the through-hole conductor in the substrate thickness direction is 30 ppm / K or less. A multilayer wiring board characterized by   The multilayer wiring board according to claim 1, wherein the through-hole conductor is through-hole plating. The value of the linear expansion of the substrate thickness direction of the core substrate, or 0.8% Te temperature range smell from room temperature to solder reflow temperature 1. The multilayer wiring board according to claim 1 or 2, wherein the content is 3% or less.   4. The multilayer wiring board according to claim 1, wherein a filled via in which a via recess is filled with plating is disposed on a surface of the lid-like conductor. 5. 5. The viscosity of the filler when filling the through-hole portion is 300 Pa · s or less when the shear rate is 21 s ⁻¹ at 22 ± 3 ° C. 5. A multilayer wiring board according to the item.   The multilayer wiring board according to claim 1, wherein the surface of the through-hole conductor is a smooth surface with Ra <1 μm. The filler is obtained by adding a powdery curing agent for imparting thermosetting property and an inorganic filler having a maximum particle size of 5 μm or more and 60 μm or less to a polyfunctional epoxy resin having three or more functions. The multilayer wiring board according to any one of claims 1 to 6. A through hole portion having a first main surface and a second main surface, and having a through hole conductor provided on an inner wall surface of a through hole having a diameter of 200 μm or less that opens at the first main surface and the second main surface. A core substrate having,
An interlayer insulating layer disposed on at least one side of the first main surface and the second main surface of the core substrate;
A wiring layer disposed on the surface of the interlayer insulating layer;
A cured body of a filler filled in the through-hole portion;
A lid-like conductor that closes the opening of the through-hole portion ;
The filler is obtained by adding a curing agent and a filler having a maximum particle size of 5 μm or more and 60 μm or less to an epoxy resin, and has a glass transition point of 140 ° C. or more.
Wherein the value of the linear expansion of the substrate thickness direction of the cured body filler, the linear expansion of the substrate thickness direction of the core substrate in the temperature range from room temperature to solder reflow temperature in a temperature range of from room temperature to solder reflow temperature the absolute value of the difference between the value state, and are 0.1% or less,
The average thermal expansion coefficient of the interlayer insulating layer in the substrate thickness direction is 20 ppm / K or more and 60 ppm / K or less,
The absolute value of the difference between the average thermal expansion coefficient in the substrate thickness direction of the cured body of the filler and the average thermal expansion coefficient in the substrate thickness direction of the through-hole conductor is 20 ppm / K or less,
The absolute value of the difference between the average thermal expansion coefficient of the core substrate in the substrate thickness direction and the average thermal expansion coefficient of the through-hole conductor in the substrate thickness direction is 30 ppm / K or less. A multilayer wiring board characterized by

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