JP2003218529A - Wiring board - Google Patents

Wiring board

Info

Publication number
JP2003218529A
JP2003218529A JP2002011421A JP2002011421A JP2003218529A JP 2003218529 A JP2003218529 A JP 2003218529A JP 2002011421 A JP2002011421 A JP 2002011421A JP 2002011421 A JP2002011421 A JP 2002011421A JP 2003218529 A JP2003218529 A JP 2003218529A
Authority
JP
Japan
Prior art keywords
hole
conductor
wiring board
layer
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2002011421A
Other languages
Japanese (ja)
Other versions
JP3854510B2 (en
Inventor
Kazuhiro Suzuki
一広 鈴木
Yasuhiro Sugimoto
康宏 杉本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Niterra Co Ltd
Original Assignee
NGK Spark Plug Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NGK Spark Plug Co Ltd filed Critical NGK Spark Plug Co Ltd
Priority to JP2002011421A priority Critical patent/JP3854510B2/en
Publication of JP2003218529A publication Critical patent/JP2003218529A/en
Application granted granted Critical
Publication of JP3854510B2 publication Critical patent/JP3854510B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board that can prevent the fracture of a plated cap layer by reinforcing the cap layer, particularly, the boundary between a through hole conductor and a filled resin body and its vicinity of the cap layer to which stresses are apt to concentrate. <P>SOLUTION: In this wiring board 100, a via hole 121 is formed so that its center axis may become coincident with that C of a through hole 111. In addition, the diameter D2 of the bottom face 121b of the via hole 121 is set to 120 μm which is larger than the inside diameter D1 (=100 μm) of the through hole 111. Therefore, the via hole 121 includes a virtual through hole area E1 which is the extension of the through hole 111 on an insulating resin layer 120 side. In this wiring board 100, consequently, the boundary section 115b of the plated cap layer 115 which is the boundary between the through hole conductor 112 and packed resin body 113 and its vicinity is covered with and reinforced by a packed via conductor 122. <P>COPYRIGHT: (C)2003,JPO

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、配線基板に関し、
特に筒状のスルーホール導体とこれに接続する充填ビア
導体とを有する配線基板に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board,
In particular, the present invention relates to a wiring board having a tubular through-hole conductor and a filled via conductor connected thereto.

【0002】[0002]

【従来の技術】従来より、内側絶縁層の厚さ方向に貫通
するスルーホール内に筒状のスルーホール導体が形成さ
れ、さらに内側絶縁層の外側に積層された外側絶縁層の
厚さ方向に貫通するビアホール内に充填ビア導体が形成
された配線基板が知られている。なお、スルーホール導
体の貫通孔内には樹脂充填体が形成されており、さら
に、スルーホール導体と充填ビア導体とを接続するため
に、樹脂充填体及びスルーホール導体を覆うように蓋メ
ッキ層が形成されている。
2. Description of the Related Art Conventionally, a cylindrical through-hole conductor is formed in a through-hole penetrating in the thickness direction of an inner insulating layer, and further in the thickness direction of an outer insulating layer laminated outside the inner insulating layer. A wiring substrate is known in which a filled via conductor is formed in a penetrating via hole. A resin filling body is formed in the through hole of the through-hole conductor, and further, in order to connect the through-hole conductor and the filling via conductor, a lid plating layer covers the resin filling body and the through-hole conductor. Are formed.

【0003】[0003]

【発明が解決しようとする課題】一般に、樹脂の熱膨張
率は、金属の熱膨張率よりも大きい。従って、配線基板
では、スルーホール導体内の貫通孔内に充填された樹脂
充填体の熱膨張率が、スルーホール導体の熱膨張率より
も大きいために、配線基板の温度が高くなると樹脂充填
体の方がスルーホール導体よりも伸びる。一方、配線基
板の温度が下がると逆に樹脂充填体の方がスルーホール
導体よりも大きく縮む。このため、樹脂充填体及びスル
ーホール導体を覆うように形成されている蓋メッキ層に
応力がかかり、スルーホール導体と樹脂充填体との境界
付近で蓋メッキ層が破断してしまうことがあった。本発
明は、かかる現状に鑑みてなされたものであって、蓋メ
ッキ層のうち、特に応力が集中し易いスルーホール導体
と樹脂充填体との境界付近を補強し、蓋メッキ層の破断
を防止できる配線基板を提供する。
Generally, the coefficient of thermal expansion of resin is larger than that of metal. Therefore, in the wiring board, since the thermal expansion coefficient of the resin filling body filled in the through hole in the through hole conductor is larger than the thermal expansion coefficient of the through hole conductor, when the temperature of the wiring board becomes high, the resin filling body Is longer than the through-hole conductor. On the other hand, when the temperature of the wiring board decreases, the resin-filled body shrinks more than the through-hole conductor. For this reason, stress may be applied to the lid plating layer formed so as to cover the resin filling body and the through-hole conductor, and the lid plating layer may be broken near the boundary between the through-hole conductor and the resin filling body. . The present invention has been made in view of the above situation, and in the lid plating layer, the vicinity of the boundary between the through-hole conductor and the resin filling body where the stress is particularly likely to concentrate is reinforced to prevent breakage of the lid plating layer. Provided is a wiring board.

【0004】[0004]

【課題を解決するための手段、作用及び効果】その解決
手段は、1または複数の内側絶縁層を、その厚さ方向に
貫通するスルーホールと、上記スルーホールの内壁面に
形成され、内部に貫通孔を有する筒状のスルーホール導
体と、上記スルーホール導体内の上記貫通孔内に充填さ
れた樹脂充填体と、上記樹脂充填体を覆うと共に、上記
スルーホール導体と接続する蓋メッキ層と、上記内側絶
縁層の外側に積層された外側絶縁層と、上記スルーホー
ルと同軸であり、上記外側絶縁層の厚さ方向に貫通する
ビアホールと、上記ビアホール内に充填され、上記蓋メ
ッキ層と接続する充填ビア導体と、を備える配線基板で
あって、上記ビアホールのうち上記蓋メッキ層側の内径
が、上記スルーホールの内径以上である配線基板を要旨
とする。
Means for Solving the Problem, Action and Effect The means for solving the problem is to form a through hole that penetrates one or a plurality of inner insulating layers in the thickness direction and an inner wall surface of the through hole, and A cylindrical through-hole conductor having a through hole, a resin filler filled in the through hole in the through-hole conductor, and a lid plating layer for covering the resin filler and connecting with the through-hole conductor. An outer insulating layer laminated on the outer side of the inner insulating layer, a via hole coaxial with the through hole and penetrating in the thickness direction of the outer insulating layer, and filling the via hole with the lid plating layer. A wiring board comprising a filling via conductor to be connected, wherein the inner diameter of the via hole on the side of the lid plating layer is equal to or larger than the inner diameter of the through hole.

【0005】本発明の配線基板は、ビアホールをスルー
ホールと同軸に形成し、このビアホールのうち蓋メッキ
層側の内径をスルーホールの内径以上にしている。これ
により、蓋メッキ層のうち、特に応力が集中し易いスル
ーホール導体と樹脂充填体との境界付近が、充填ビア導
体に覆われて補強されるので、本発明の配線基板は、蓋
メッキ層の破断を防止できる。なお、内側絶縁層として
は、例えば、ガラスエポキシ複合材料など、ガラス織布
に樹脂を含浸させたガラス−樹脂複合材料を1層または
複数層積層したものや、このガラス−樹脂複合材料の層
に樹脂絶縁層を積層したものなどが挙げられる。
In the wiring board of the present invention, the via hole is formed coaxially with the through hole, and the inner diameter of the via hole on the lid plating layer side is made equal to or larger than the inner diameter of the through hole. As a result, in the lid plating layer, the vicinity of the boundary between the through-hole conductor where the stress is particularly likely to concentrate and the resin filling body is covered and reinforced by the filled via conductor, so that the wiring board of the present invention has the lid plating layer. Can be prevented from breaking. The inner insulating layer may be, for example, one or more laminated glass-resin composite materials obtained by impregnating glass woven cloth with resin, such as glass epoxy composite material, or layers of this glass-resin composite material. For example, a laminate of resin insulating layers may be used.

【0006】他の解決手段は、1または複数の内側絶縁
層を、その厚さ方向に貫通するスルーホールと、上記ス
ルーホールの内壁面に形成され、内部に貫通孔を有する
筒状のスルーホール導体と、上記スルーホール導体内の
上記貫通孔内に充填された樹脂充填体と、上記樹脂充填
体を覆うと共に、上記スルーホール導体と接続する蓋メ
ッキ層と、上記内側絶縁層の外側に積層された外側絶縁
層と、上記外側絶縁層の厚さ方向に貫通するビアホール
と、上記ビアホール内に充填され、上記蓋メッキ層と接
続する充填ビア導体と、を備える配線基板であって、上
記ビアホールは、上記スルーホールを上記外側絶縁層側
に延ばした仮想スルーホール領域を内部に含む配線基板
を要旨とする。
Another solution is a cylindrical through hole having a through hole penetrating one or a plurality of inner insulating layers in the thickness direction and an inner wall surface of the through hole and having a through hole therein. A conductor, a resin filler filled in the through hole in the through-hole conductor, a lid plating layer that covers the resin filler and is connected to the through-hole conductor, and is laminated outside the inner insulating layer. And a filled via conductor that is filled in the via hole and is connected to the lid plating layer, the via hole being formed in the via hole. The gist of the present invention is a wiring board which internally includes a virtual through hole region in which the through hole is extended to the outer insulating layer side.

【0007】本発明の配線基板は、ビアホールが、スル
ーホールを外側絶縁層側に延ばした仮想スルーホール領
域を内部に含んでいる。これにより、蓋メッキ層のう
ち、特に応力が集中し易いスルーホール導体と樹脂充填
体との境界付近が、充填ビア導体に覆われて補強される
ので、本発明の配線基板は、蓋メッキ層の破断を防止で
きる。
In the wiring board of the present invention, the via hole internally includes a virtual through hole region in which the through hole is extended to the outer insulating layer side. As a result, in the lid plating layer, the vicinity of the boundary between the through-hole conductor where the stress is particularly likely to concentrate and the resin filling body is covered and reinforced by the filled via conductor, so that the wiring board of the present invention has the lid plating layer. Can be prevented from breaking.

【0008】[0008]

【発明の実施の形態】本発明の実施形態を、図面を参照
しつつ説明する。図1に示す配線基板100は、コア基
板110(内側絶縁層)、コア主面110b側に積層さ
れた樹脂絶縁層120(外側絶縁層)、及びソルダーレ
ジスト層130を有する。さらに、図示しないが、コア
裏面側にも同様に、樹脂絶縁層、及びソルダーレジスト
層が積層されている。コア基板110は、厚さ800μ
mのガラス−エポキシ樹脂複合材料からなり、この厚さ
方向を貫通する内径D1=100μmのスルーホール1
11が多数形成されている。さらに、スルーホール11
1内とコア主面110b及び図示しないコア裏面のうち
スルーホール111の周縁部とには、厚さ18μmの円
筒状のスルーホール導体112が形成されている。さら
に、スルーホール導体112の貫通孔112b内には樹
脂充填体113が充填されている。
BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described with reference to the drawings. The wiring substrate 100 shown in FIG. 1 has a core substrate 110 (inner insulating layer), a resin insulating layer 120 (outer insulating layer) laminated on the core main surface 110b side, and a solder resist layer 130. Further, although not shown, a resin insulating layer and a solder resist layer are similarly laminated on the back surface side of the core. The core substrate 110 has a thickness of 800 μ
m glass-epoxy resin composite material, and a through hole 1 having an inner diameter D1 of 100 μm that penetrates in the thickness direction.
A large number of 11 are formed. Furthermore, through hole 11
A cylindrical through-hole conductor 112 having a thickness of 18 μm is formed inside 1 and on the peripheral surface of the through-hole 111 on the core main surface 110b and the core back surface (not shown). Further, a resin filling body 113 is filled in the through hole 112b of the through hole conductor 112.

【0009】コア基板110と樹脂絶縁層120との層
間には、樹脂充填体113を覆いつつスルーホール導体
112と接続する、厚さ15μmの蓋メッキ層115が
形成されている。樹脂絶縁層120は、厚さ30μmの
エポキシ樹脂からなり、多数のビアホール121が形成
されている。さらに、ビアホール121内には、蓋メッ
キ層115と接続する充填ビアホール導体122が形成
されている。さらに、樹脂絶縁層120とソルダーレジ
スト層130との層間には、充填ビアホール導体122
と接続する配線層132が形成されている。さらに、ソ
ルダーレジスト層130には、貫通孔131が形成され
ており、配線層132の一部を露出させてパッド132
bを形成している。配線基板100には、このパッド1
32bを利用して、図示しないICチップ等が搭載され
る。
Between the core substrate 110 and the resin insulation layer 120, a lid plating layer 115 having a thickness of 15 μm is formed so as to cover the resin filler 113 and connect to the through-hole conductor 112. The resin insulating layer 120 is made of an epoxy resin having a thickness of 30 μm and has a large number of via holes 121 formed therein. Further, in the via hole 121, a filled via hole conductor 122 connected to the lid plating layer 115 is formed. Further, a filled via-hole conductor 122 is provided between the resin insulating layer 120 and the solder resist layer 130.
A wiring layer 132 that is connected to the wiring layer is formed. Further, through holes 131 are formed in the solder resist layer 130, and a part of the wiring layer 132 is exposed to expose the pads 132.
b is formed. This pad 1 is provided on the wiring board 100.
An IC chip (not shown) or the like is mounted by using 32b.

【0010】さらに、本実施形態の配線基板100で
は、図1に示すように、ビアホール121は、その中心
軸がスルーホール111の中心軸Cに一致するように形
成されている。さらに、ビアホール121の底面121
bの直径D2を、スルーホール111の内径D1(=1
00μm)以上の大きさである120μmとしている。
従って、ビアホール121は、スルーホール111を樹
脂絶縁層120側(図1中上方)に延長した仮想スルー
ホール領域E1を内部に含む。これにより、本実施形態
の配線基板100では、蓋メッキ層115のうちスルー
ホール導体112と樹脂充填体113との境界付近であ
る境界部115bが、充填ビア導体122の底部122
bによって覆われる。なお、コア裏面側にも蓋メッキ
層、ビアホール導体等が、コア主面110b側と同様に
形成されている。
Further, in the wiring board 100 of the present embodiment, as shown in FIG. 1, the via hole 121 is formed so that its central axis coincides with the central axis C of the through hole 111. Further, the bottom surface 121 of the via hole 121
The diameter D2 of b is set to the inner diameter D1 of the through hole 111 (= 1
The size is set to 120 μm, which is larger than 00 μm).
Therefore, the via hole 121 internally includes a virtual through hole region E1 in which the through hole 111 is extended to the resin insulating layer 120 side (upper side in FIG. 1). As a result, in the wiring board 100 of the present embodiment, the boundary portion 115b of the lid plating layer 115 that is near the boundary between the through-hole conductor 112 and the resin filling body 113 is the bottom portion 122 of the filled via conductor 122.
covered by b. A lid plating layer, a via-hole conductor, etc. are formed on the back surface of the core in the same manner as on the core main surface 110b side.

【0011】ところで、配線基板100では、エポキシ
樹脂からなる樹脂充填体113の熱膨張率が約40pp
m、銅からなるのスルーホール導体112の熱膨張率が
約18ppmとなっている。従って、樹脂充填体113
の熱膨張率がスルーホール導体112の熱膨張率よりも
2倍以上大きいために、配線基板100の温度が上下す
ると、樹脂充填体113がスルーホール導体112に比
べて大きく伸縮する。このため、蓋メッキ層115に応
力がかかり、特にスルーホール導体112と樹脂充填体
113との境界付近に応力が集中する。しかしながら、
本実施形態の配線基板100では、蓋メッキ層115の
うちスルーホール導体112と樹脂充填体113との境
界付近である境界部115bが、充填ビア導体122に
覆われて補強されているので、蓋メッキ層115の破断
を防止することができる。さらに、本実施形態の配線基
板100は、蓋メッキ層115と非充填ビア導体122
との接触面積が大きいので、電気特性が良好となる。さ
らに、たとえ蓋メッキ層115が破断したとしても、ス
ルーホール導体112、蓋メッキ層115、及び充填ビ
ア導体122の導通を確保することができる。
In the wiring board 100, the coefficient of thermal expansion of the resin filler 113 made of epoxy resin is about 40 pp.
The coefficient of thermal expansion of the through-hole conductor 112 made of m and copper is about 18 ppm. Therefore, the resin filling body 113
Since the coefficient of thermal expansion of is greater than the coefficient of thermal expansion of the through-hole conductor 112 by a factor of two or more, the resin filler 113 expands and contracts more greatly than the through-hole conductor 112 when the temperature of the wiring board 100 rises and falls. For this reason, stress is applied to the lid plating layer 115, and particularly stress is concentrated near the boundary between the through-hole conductor 112 and the resin filling body 113. However,
In the wiring board 100 of the present embodiment, the boundary portion 115b of the lid plating layer 115, which is near the boundary between the through-hole conductor 112 and the resin filling body 113, is covered and reinforced by the filled via conductor 122, and thus the lid is formed. It is possible to prevent breakage of the plated layer 115. Further, the wiring board 100 of the present embodiment has the lid plating layer 115 and the unfilled via conductor 122.
Since the contact area with is large, the electrical characteristics are good. Further, even if the lid plating layer 115 is broken, the conduction of the through-hole conductor 112, the lid plating layer 115, and the filled via conductor 122 can be ensured.

【0012】このような配線基板100は、次のように
して製造する。なお、ここではコア裏面側についての説
明を省略するが、コア裏面側についてもコア主面110
b側と同時に形成するものとする。ガラス−エポキシ樹
脂複合材料からなり、両面に銅箔を張り付けた、厚さ約
1.0mmのコア基板110を用意する。そして、コア
基板100の所定の位置に、ドリルまたはレーザによっ
て、これを貫通する多数のスルーホール111を穿孔す
る。その後、公知の無電解Cuメッキ、及び電解Cuメ
ッキによって、スルーホール111内にスルーホール導
体112を形成する。次いで、スルーホール導体112
の貫通孔112b内に樹脂ペーストを印刷充填して熱硬
化させ、コア主面110bを研磨して樹脂充填体113
を形成する。次に、例えば、サブトラクティブ法など公
知の無電解Cuメッキ、電解Cuメッキ、及びエッチン
グ手法によって、コア主面110b上に、樹脂充填体1
13を覆いつつスルーホール導体112と接続するよう
な、直径200μm、厚さ15μmの蓋メッキ層115
を形成する。
Such a wiring board 100 is manufactured as follows. Although the description of the core back surface side is omitted here, the core main surface 110 is also described for the core back surface side.
It is formed at the same time as the b side. A core substrate 110 made of a glass-epoxy resin composite material and having a copper foil adhered on both sides and having a thickness of about 1.0 mm is prepared. Then, a large number of through holes 111 are formed at predetermined positions of the core substrate 100 by a drill or a laser. After that, the through-hole conductor 112 is formed in the through-hole 111 by known electroless Cu plating and electrolytic Cu plating. Then, through-hole conductor 112
A resin paste is printed and filled in the through holes 112b of the resin and thermally cured, and the core main surface 110b is polished to make the resin filler 113
To form. Next, for example, by a known electroless Cu plating method such as a subtractive method, an electrolytic Cu plating method, and an etching method, the resin filling body 1 is formed on the core main surface 110b.
The lid plating layer 115 having a diameter of 200 μm and a thickness of 15 μm so as to be connected to the through-hole conductor 112 while covering 13
To form.

【0013】次いで、コア主面110b及び蓋メッキ層
115上に、ビアホール121を有する樹脂絶縁層12
0を形成する。具体的には、未硬化感光性樹脂を貼り付
け、フォトリソグラフィ技術により、露光・現像・硬化
させて、ビアホール121を有する樹脂絶縁層120を
形成する。ここで、ビアホール121はスルーホール1
11と同軸に且つ、蓋メッキ層115に近づくにつれて
内径が小さくなるテーパ状に形成する。なお、ビアホー
ル121の底面121bの直径D2を120μmとし
た。その後、例えば、セミアディティブ法など公知の無
電解Cuメッキ、電解Cuメッキ及びエッチング手法に
よって、ビアホール121内に充填ビアホール導体12
2を形成し、樹脂絶縁層120の主面120bに配線層
132を形成する。次いで、ソルダーレジスト層130
を積層し、露光・現像して所定の位置に貫通孔131を
形成する。これにより、配線層132の一部が貫通孔1
31から露出して、パッド132bが形成される。この
ようにして、配線基板100が完成する。
Next, the resin insulation layer 12 having the via holes 121 on the core main surface 110b and the lid plating layer 115.
Form 0. Specifically, an uncured photosensitive resin is attached and exposed, developed and cured by a photolithography technique to form a resin insulating layer 120 having a via hole 121. Here, the via hole 121 is the through hole 1.
It is formed so as to be coaxial with 11 and have a tapered inner diameter as it approaches the lid plating layer 115. The diameter D2 of the bottom surface 121b of the via hole 121 was 120 μm. After that, the filled via-hole conductor 12 is filled in the via-hole 121 by a known electroless Cu plating, electrolytic Cu plating, or etching method such as a semi-additive method.
2 is formed, and the wiring layer 132 is formed on the main surface 120b of the resin insulating layer 120. Then, the solder resist layer 130
Are laminated, exposed and developed to form a through hole 131 at a predetermined position. As a result, a part of the wiring layer 132 is partially exposed to the through hole 1.
The pad 132b is formed by being exposed from 31. In this way, the wiring board 100 is completed.

【0014】(変形形態)次に、実施形態の変形形態で
ある配線基板200について、図面を参照しつつ説明す
る。上述した実施形態の配線基板100では、ビアホー
ル121とスルーホール111とを同軸に形成した。こ
れに対し、本変形形態の配線基板200は、ビアホール
をスルーホールと同軸に形成しない点で異なるが、その
他の部分についてはほぼ同様である。従って、実施形態
と異なる部分を中心に説明し、同様な部分については、
説明を省略または簡略化する。図2に示す配線基板20
0は、実施形態の配線基板100と同様に、コア基板2
10(内側絶縁層)、コア主面210b側に積層された
樹脂絶縁層220(外側絶縁層)、及びソルダーレジス
ト層230を有する。さらに、図示しないが、コア裏面
側にも同様に、樹脂絶縁層、及びソルダーレジスト層が
積層されている。
(Modification) Next, a wiring board 200 which is a modification of the embodiment will be described with reference to the drawings. In the wiring board 100 of the above-described embodiment, the via hole 121 and the through hole 111 are formed coaxially. On the other hand, the wiring board 200 of the present modification is different in that the via hole is not formed coaxially with the through hole, but is substantially the same in other parts. Therefore, the description will be focused on the parts different from the embodiment, and the similar parts will be described.
Omit or simplify the description. Wiring board 20 shown in FIG.
0 indicates the core substrate 2 as in the wiring substrate 100 of the embodiment.
10 (inner insulating layer), a resin insulating layer 220 (outer insulating layer) laminated on the core main surface 210b side, and a solder resist layer 230. Further, although not shown, a resin insulating layer and a solder resist layer are similarly laminated on the back surface side of the core.

【0015】コア基板210には、実施形態の配線基板
100と同様に、厚さ方向を貫通する内径100μmの
スルーホール211、スルーホール導体212、及び樹
脂充填体213が形成されている。コア基板210と樹
脂絶縁層220との層間には、実施形態の配線基板10
0と同様に、蓋メッキ層215が形成されている。樹脂
絶縁層220には、実施形態の配線基板100と異なる
ビアホール221及び充填ビアホール導体222が形成
されている。さらに、実施形態の配線基板100と同様
に、配線層232、パッド232bが形成されている。
Like the wiring board 100 of the embodiment, the core substrate 210 is provided with through holes 211 having an inner diameter of 100 μm, through holes conductors 212, and resin filling bodies 213 that penetrate through the thickness direction. Between the core substrate 210 and the resin insulating layer 220, the wiring substrate 10 of the embodiment is provided.
Like 0, the lid plating layer 215 is formed. A via hole 221 and a filled via hole conductor 222 different from those of the wiring board 100 of the embodiment are formed in the resin insulating layer 220. Further, a wiring layer 232 and a pad 232b are formed as in the wiring board 100 of the embodiment.

【0016】但し、本変形形態の配線基板200は、実
施形態の配線基板100と異なり、図2に示すように、
ビアホール221とスルーホール211とは同軸に形成
されていない。しかしながら、本変形形態の配線基板2
00は、ビアホール221が、スルーホール211を樹
脂絶縁層220側(図2中上方)に延ばした仮想スルー
ホール領域E2を内部に含んでいる。これにより、蓋メ
ッキ層215のうちスルーホール導体212と樹脂充填
体213との境界付近である境界部215bが、充填ビ
ア導体222に覆われて補強されるので、本変形形態の
配線基板200においても、蓋メッキ層215の破断を
防止することができる。さらに、本変形形態の配線基板
200は、蓋メッキ層215と充填ビア導体222との
接続部分が実施形態の配線基板100よりも大きいの
で、さらに電気特性が良好となる。
However, unlike the wiring board 100 according to the embodiment, the wiring board 200 according to the present modification is different from the wiring board 200 according to the embodiment as shown in FIG.
The via hole 221 and the through hole 211 are not formed coaxially. However, the wiring board 2 of the present modified embodiment
In 00, the via hole 221 includes a virtual through hole region E2 in which the through hole 211 is extended to the resin insulating layer 220 side (upper side in FIG. 2). As a result, the boundary portion 215b of the lid plating layer 215, which is in the vicinity of the boundary between the through-hole conductor 212 and the resin filling body 213, is covered and reinforced by the filled via conductor 222. Also, the lid plating layer 215 can be prevented from breaking. Furthermore, in the wiring board 200 of the present modification, the connection portion between the lid plating layer 215 and the filled via conductor 222 is larger than that of the wiring board 100 of the embodiment, so the electrical characteristics are further improved.

【0017】以上において、本発明を実施形態及び変形
形態に即して説明したが、本発明は上記実施形態等に限
定されるものではなく、その要旨を逸脱しない範囲で、
適宜変更して適用できることはいうまでもない。例え
ば、実施形態及び変形形態では、内側絶縁層を1層のコ
ア基板110,210として、これらを貫通するスルー
ホール111,211を形成したが、内側絶縁層を複数
の絶縁層として、この複数の絶縁層を貫通するスルーホ
ールを形成しても良い。また、実施形態及び変形形態で
は、コア基板110,210の両面に樹脂絶縁層12
0,220、充填ビア導体122,222等を形成した
が、コア基板110,210の主面110b,210b
側のみに形成しても良い。
Although the present invention has been described with reference to the embodiments and the modifications, the present invention is not limited to the above-mentioned embodiments and the like, and does not depart from the gist of the invention.
It goes without saying that it can be applied with appropriate changes. For example, in the embodiment and the modified embodiment, the inner insulating layer is the single-layer core substrate 110, 210 and the through holes 111, 211 are formed to penetrate through the inner substrate, but the inner insulating layer is formed as the plurality of insulating layers. You may form a through hole which penetrates an insulating layer. Further, in the embodiment and the modified embodiment, the resin insulating layer 12 is formed on both surfaces of the core substrates 110 and 210.
0, 220, filled via conductors 122, 222, etc. are formed, but the main surfaces 110b, 210b of the core substrates 110, 210 are not formed.
It may be formed only on the side.

【0018】[0018]

【図面の簡単な説明】[Brief description of drawings]

【図1】実施形態にかかる配線基板100の要部を示す
部分断面図である。
FIG. 1 is a partial cross-sectional view showing a main part of a wiring board 100 according to an embodiment.

【図2】変形形態にかかる配線基板200の要部を示す
部分断面図である。
FIG. 2 is a partial cross-sectional view showing a main part of a wiring board 200 according to a modification.

【符号の説明】[Explanation of symbols]

100,200 配線基板 110,210 コア基板(内側絶縁層) 111,211 スルーホール 112,212 スルーホール導体 112b,212b 貫通孔 113,213 樹脂充填体 115,215 蓋メッキ層 120,220 樹脂絶縁層(外側絶縁層) 121,221 ビアホール 122,222 充填ビア導体 D1 スルーホール111の内径 D2 ビアホール121の底面121bの直径(ビアホ
ールのうち蓋メッキ層側の内径) E1,E2 仮想スルーホール領域
100, 200 Wiring boards 110, 210 Core boards (inner insulating layer) 111, 211 Through holes 112, 212 Through hole conductors 112b, 212b Through holes 113, 213 Resin filling bodies 115, 215 Lid plating layers 120, 220 Resin insulating layers ( Outer insulating layer) 121,221 Via holes 122,222 Filled via conductor D1 Inner diameter D2 of through hole 111 Diameter of bottom surface 121b of via hole 121 (inner diameter of via hole on lid plating layer side) E1, E2 Virtual through hole regions

───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 5E314 AA24 CC01 FF01 FF08 FF17 GG11 5E317 AA24 AA26 BB12 CC15 CC25 CC32 CC33 CD27 CD32 GG05 GG09 GG14 5E346 AA06 AA12 AA15 AA22 AA32 AA35 AA43 AA51 BB16 CC08 CC32 DD23 DD24 EE18 FF07 FF15 GG15 GG17 GG28 HH11   ─────────────────────────────────────────────────── ─── Continued front page    F-term (reference) 5E314 AA24 CC01 FF01 FF08 FF17                       GG11                 5E317 AA24 AA26 BB12 CC15 CC25                       CC32 CC33 CD27 CD32 GG05                       GG09 GG14                 5E346 AA06 AA12 AA15 AA22 AA32                       AA35 AA43 AA51 BB16 CC08                       CC32 DD23 DD24 EE18 FF07                       FF15 GG15 GG17 GG28 HH11

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】1または複数の内側絶縁層を、その厚さ方
向に貫通するスルーホールと、 上記スルーホールの内壁面に形成され、内部に貫通孔を
有する筒状のスルーホール導体と、 上記スルーホール導体内の上記貫通孔内に充填された樹
脂充填体と、 上記樹脂充填体を覆うと共に、上記スルーホール導体と
接続する蓋メッキ層と、 上記内側絶縁層の外側に積層された外側絶縁層と、 上記スルーホールと同軸であり、上記外側絶縁層の厚さ
方向に貫通するビアホールと、 上記ビアホール内に充填され、上記蓋メッキ層と接続す
る充填ビア導体と、を備える配線基板であって、 上記ビアホールのうち上記蓋メッキ層側の内径が、上記
スルーホールの内径以上である配線基板。
1. A through hole penetrating one or a plurality of inner insulating layers in a thickness direction thereof, a cylindrical through hole conductor formed on an inner wall surface of the through hole, and having a through hole therein, A resin filling body filled in the through hole in the through-hole conductor, a lid plating layer that covers the resin filling body and is connected to the through-hole conductor, and an outer insulation layer laminated outside the inner insulation layer. A wiring board having a layer, a via hole coaxial with the through hole and penetrating in the thickness direction of the outer insulating layer, and a filled via conductor filled in the via hole and connected to the lid plating layer. The inner diameter of the via hole on the side of the lid plating layer is equal to or larger than the inner diameter of the through hole.
【請求項2】1または複数の内側絶縁層を、その厚さ方
向に貫通するスルーホールと、 上記スルーホールの内壁面に形成され、内部に貫通孔を
有する筒状のスルーホール導体と、 上記スルーホール導体内の上記貫通孔内に充填された樹
脂充填体と、 上記樹脂充填体を覆うと共に、上記スルーホール導体と
接続する蓋メッキ層と、 上記内側絶縁層の外側に積層された外側絶縁層と、 上記外側絶縁層の厚さ方向に貫通するビアホールと、 上記ビアホール内に充填され、上記蓋メッキ層と接続す
る充填ビア導体と、を備える配線基板であって、 上記ビアホールは、上記スルーホールを上記外側絶縁層
側に延ばした仮想スルーホール領域を内部に含む配線基
板。
2. A through hole penetrating one or a plurality of inner insulating layers in a thickness direction thereof, a cylindrical through hole conductor formed on an inner wall surface of the through hole and having a through hole therein, A resin filling body filled in the through hole in the through-hole conductor, a lid plating layer that covers the resin filling body and is connected to the through-hole conductor, and an outer insulation layer laminated outside the inner insulation layer. A wiring board comprising a layer, a via hole penetrating in a thickness direction of the outer insulating layer, and a filled via conductor filled in the via hole and connected to the lid plating layer, wherein the via hole is the through hole. A wiring board which internally includes a virtual through hole region in which a hole is extended to the outer insulating layer side.
JP2002011421A 2002-01-21 2002-01-21 Wiring board Expired - Fee Related JP3854510B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002011421A JP3854510B2 (en) 2002-01-21 2002-01-21 Wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002011421A JP3854510B2 (en) 2002-01-21 2002-01-21 Wiring board

Publications (2)

Publication Number Publication Date
JP2003218529A true JP2003218529A (en) 2003-07-31
JP3854510B2 JP3854510B2 (en) 2006-12-06

Family

ID=27648908

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002011421A Expired - Fee Related JP3854510B2 (en) 2002-01-21 2002-01-21 Wiring board

Country Status (1)

Country Link
JP (1) JP3854510B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005203764A (en) * 2003-12-16 2005-07-28 Ngk Spark Plug Co Ltd Multi-layer wiring board
JP2018114328A (en) * 2018-03-30 2018-07-26 株式会社ユニバーサルエンターテインメント Game machine
JP2019067812A (en) * 2017-09-28 2019-04-25 大日本印刷株式会社 Through-electrode substrate and manufacturing method thereof
JP2019067798A (en) * 2017-09-28 2019-04-25 大日本印刷株式会社 Through-electrode substrate and manufacturing method thereof

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005203764A (en) * 2003-12-16 2005-07-28 Ngk Spark Plug Co Ltd Multi-layer wiring board
JP4647990B2 (en) * 2003-12-16 2011-03-09 日本特殊陶業株式会社 Multilayer wiring board
JP2019067812A (en) * 2017-09-28 2019-04-25 大日本印刷株式会社 Through-electrode substrate and manufacturing method thereof
JP2019067798A (en) * 2017-09-28 2019-04-25 大日本印刷株式会社 Through-electrode substrate and manufacturing method thereof
JP7043768B2 (en) 2017-09-28 2022-03-30 大日本印刷株式会社 Through Electrode Substrate and Its Manufacturing Method
JP7087319B2 (en) 2017-09-28 2022-06-21 大日本印刷株式会社 Through Silicon Via Board and Its Manufacturing Method
JP2018114328A (en) * 2018-03-30 2018-07-26 株式会社ユニバーサルエンターテインメント Game machine

Also Published As

Publication number Publication date
JP3854510B2 (en) 2006-12-06

Similar Documents

Publication Publication Date Title
US8461459B2 (en) Flex-rigid wiring board and method for manufacturing the same
US8359738B2 (en) Method of manufacturing wiring board
JP4538373B2 (en) Manufacturing method of coreless wiring substrate and manufacturing method of electronic device having the coreless wiring substrate
US20080196931A1 (en) Printed circuit board having embedded components and method for manufacturing thereof
WO2012023332A1 (en) Electronic part and method of manufacturing same
US20120229990A1 (en) Multilayer printed wiring board and method for manufacturing multilayer printed wiring board
JP2008131039A (en) Manufacturing method of electronic element built-in type printed circuit board
US20100108371A1 (en) Wiring board with built-in electronic component and method for manufacturing the same
JP5202579B2 (en) Manufacturing method of printed circuit board with built-in electronic elements
KR102538908B1 (en) Printed circuit board and method for manufacturing the same
JP2016219478A (en) Wiring board and manufacturing method therefor
JP2016063130A (en) Printed wiring board and semiconductor package
US20160113110A1 (en) Printed wiring board
JP2002324958A (en) Printed-wiring board and manufacturing method thereof
US20150257268A1 (en) Printed wiring board and method for manufacturing printed wiring board
TW201444440A (en) Printed circuit board and fabricating method thereof
JP2000077850A (en) Multilayer wiring board and its manufacture
JP2003218529A (en) Wiring board
KR20160019297A (en) Printed circuit board and manufacturing method thereof
JP7148278B2 (en) Wiring board and its manufacturing method
JP2008091377A (en) Printed wiring board and its manufacturing method
JP2000261147A (en) Multilayer wiring board and manufacture thereof
JP2003218530A (en) Wiring board
EP2542041B1 (en) Method of manufacturing printed circuit board
JP2013098529A (en) Electronic component-embedded printed circuit board and method of manufacturing the same

Legal Events

Date Code Title Description
A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20051222

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20060124

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20060327

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20060822

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20060908

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090915

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090915

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100915

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100915

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110915

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110915

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120915

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120915

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130915

Year of fee payment: 7

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees