JP4566388B2 - 薄膜トランジスタ製造方法 - Google Patents

薄膜トランジスタ製造方法 Download PDF

Info

Publication number
JP4566388B2
JP4566388B2 JP2000343935A JP2000343935A JP4566388B2 JP 4566388 B2 JP4566388 B2 JP 4566388B2 JP 2000343935 A JP2000343935 A JP 2000343935A JP 2000343935 A JP2000343935 A JP 2000343935A JP 4566388 B2 JP4566388 B2 JP 4566388B2
Authority
JP
Japan
Prior art keywords
gate
film
pattern
auxiliary
channel transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2000343935A
Other languages
English (en)
Japanese (ja)
Other versions
JP2001177107A5 (enExample
JP2001177107A (ja
Inventor
長 元 黄
東 煥 金
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of JP2001177107A publication Critical patent/JP2001177107A/ja
Publication of JP2001177107A5 publication Critical patent/JP2001177107A5/ja
Application granted granted Critical
Publication of JP4566388B2 publication Critical patent/JP4566388B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0231—Manufacture or treatment of multiple TFTs using masks, e.g. half-tone masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0312—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes
    • H10D30/0314—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes of lateral top-gate TFTs comprising only a single gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

Landscapes

  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Liquid Crystal (AREA)
JP2000343935A 1999-11-11 2000-11-10 薄膜トランジスタ製造方法 Expired - Lifetime JP4566388B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1999-49938 1999-11-11
KR1019990049938A KR100362703B1 (ko) 1999-11-11 1999-11-11 박막트랜지스터 제조방법

Publications (3)

Publication Number Publication Date
JP2001177107A JP2001177107A (ja) 2001-06-29
JP2001177107A5 JP2001177107A5 (enExample) 2006-11-24
JP4566388B2 true JP4566388B2 (ja) 2010-10-20

Family

ID=19619573

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000343935A Expired - Lifetime JP4566388B2 (ja) 1999-11-11 2000-11-10 薄膜トランジスタ製造方法

Country Status (3)

Country Link
US (1) US6340609B1 (enExample)
JP (1) JP4566388B2 (enExample)
KR (1) KR100362703B1 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6140160A (en) * 1997-07-28 2000-10-31 Micron Technology, Inc. Method for fabricating a simplified CMOS polysilicon thin film transistor and resulting structure
GB2399998B (en) * 2001-02-01 2005-04-13 Fujitsu Ltd Communications systems
KR100900543B1 (ko) * 2002-11-14 2009-06-02 삼성전자주식회사 박막 트랜지스터 기판의 다결정 규소 박막 트랜지스터 및그의 형성 방법
KR100719933B1 (ko) * 2006-04-06 2007-05-18 비오이 하이디스 테크놀로지 주식회사 다결정 실리콘 채널을 갖는 박막 트랜지스터의 제조방법
US8153513B2 (en) * 2006-07-25 2012-04-10 Silicon Genesis Corporation Method and system for continuous large-area scanning implantation process

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07112069B2 (ja) * 1985-09-18 1995-11-29 株式会社東芝 表示装置
JPH02226727A (ja) * 1989-02-28 1990-09-10 Oki Electric Ind Co Ltd Ｌｄｄ型ｍｏｓ半導体装置の製造方法
US5849601A (en) * 1990-12-25 1998-12-15 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and method for manufacturing the same
JPH0555258A (ja) * 1991-08-29 1993-03-05 Sharp Corp 薄膜トランジスタの製造方法
JP2809247B2 (ja) * 1992-02-12 1998-10-08 シャープ株式会社 薄膜半導体素子の製造方法
JP3257086B2 (ja) * 1992-11-12 2002-02-18 セイコーエプソン株式会社 相補性薄膜半導体装置の製造方法
EP0923138B1 (en) * 1993-07-26 2002-10-30 Seiko Epson Corporation Thin -film semiconductor device, its manufacture and display sytem
JP3139896B2 (ja) * 1993-11-05 2001-03-05 株式会社東芝 半導体レイアウト方法
JP3578424B2 (ja) * 1995-09-13 2004-10-20 シャープ株式会社 アクティブマトリクス基板の製造方法
JP3476320B2 (ja) * 1996-02-23 2003-12-10 株式会社半導体エネルギー研究所 半導体薄膜およびその作製方法ならびに半導体装置およびその作製方法
KR100495794B1 (ko) * 1997-10-17 2005-09-28 삼성전자주식회사 액정표시장치용박막트랜지스터
JPH1197705A (ja) * 1997-09-23 1999-04-09 Semiconductor Energy Lab Co Ltd 半導体集積回路

Also Published As

Publication number Publication date
US6340609B1 (en) 2002-01-22
KR20010046242A (ko) 2001-06-05
KR100362703B1 (ko) 2002-11-29
JP2001177107A (ja) 2001-06-29

Similar Documents

Publication Publication Date Title
EP0923134B1 (en) Active matrix circuit board and method of manufacturing it
US7402468B2 (en) Flat panel display and method of fabricating the same
KR100355713B1 (ko) 탑 게이트 방식 티에프티 엘시디 및 제조방법
KR100831881B1 (ko) 박막 반도체 장치
JPWO2002095834A1 (ja) 薄膜トランジスタ及びアクティブマトリクス型表示装置及びそれらの製造方法
CN107533981A (zh) 半导体装置以及其制造方法
KR100697263B1 (ko) 탑 게이트형 폴리실리콘 박막트랜지스터 제조방법
JP4038309B2 (ja) 半導体装置の製造方法、アクティブマトリクス基板の製造方法
US6963083B2 (en) Liquid crystal display device having polycrystalline TFT and fabricating method thereof
KR100307457B1 (ko) 박막 트랜지스터의 제조 방법
US7015080B2 (en) Manufacturing method of semiconductor device
US6429079B1 (en) Semiconductor device and manufacturing method thereof
JP4566388B2 (ja) 薄膜トランジスタ製造方法
CN1319177C (zh) 薄膜晶体管、其制造方法以及使用它的液晶装置和衬底
KR20040092916A (ko) 박막 트랜지스터 및 이를 이용한 표시장치
US7176491B2 (en) Semiconductor device
US7112476B2 (en) Polycrystalline silicon liquid crystal display device and fabrication method thereof
JP2003075870A (ja) 平面表示装置およびその製造方法
JP4510396B2 (ja) 薄膜トランジスタの製造方法
JP3949650B2 (ja) アクティブマトリクス型表示装置の作製方法
GB2459666A (en) Thin film transistor with low leakage current
JPH11163353A (ja) ポリシリコン薄膜トランジスタ及びそれを用いたアクティブマトリクス型液晶表示装置
JP2004022875A (ja) 表示装置
KR20040058699A (ko) 박막 트랜지스터 어레이 기판의 제조 방법
KR101001983B1 (ko) 액정표시패널의 제조장치

Legal Events

Date Code Title Description
RD03 Notification of appointment of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7423

Effective date: 20061004

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20061005

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20061005

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20061006

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20100303

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20100309

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100608

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20100706

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20100804

R150 Certificate of patent or registration of utility model

Ref document number: 4566388

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130813

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130813

Year of fee payment: 3

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313111

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130813

Year of fee payment: 3

R371 Transfer withdrawn

Free format text: JAPANESE INTERMEDIATE CODE: R371

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313111

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

EXPY Cancellation because of completion of term