JP4533155B2 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
- Publication number
- JP4533155B2 JP4533155B2 JP2005005506A JP2005005506A JP4533155B2 JP 4533155 B2 JP4533155 B2 JP 4533155B2 JP 2005005506 A JP2005005506 A JP 2005005506A JP 2005005506 A JP2005005506 A JP 2005005506A JP 4533155 B2 JP4533155 B2 JP 4533155B2
- Authority
- JP
- Japan
- Prior art keywords
- metal material
- layer
- element isolation
- insulating film
- conductive layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- Electrodes Of Semiconductors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005005506A JP4533155B2 (ja) | 2005-01-12 | 2005-01-12 | 半導体装置及びその製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005005506A JP4533155B2 (ja) | 2005-01-12 | 2005-01-12 | 半導体装置及びその製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2006196610A JP2006196610A (ja) | 2006-07-27 |
| JP2006196610A5 JP2006196610A5 (enExample) | 2008-02-21 |
| JP4533155B2 true JP4533155B2 (ja) | 2010-09-01 |
Family
ID=36802455
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2005005506A Expired - Fee Related JP4533155B2 (ja) | 2005-01-12 | 2005-01-12 | 半導体装置及びその製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP4533155B2 (enExample) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006324342A (ja) * | 2005-05-17 | 2006-11-30 | Renesas Technology Corp | 半導体装置およびその製造方法 |
| US7675097B2 (en) * | 2006-12-01 | 2010-03-09 | International Business Machines Corporation | Silicide strapping in imager transfer gate device |
| KR100817719B1 (ko) | 2006-12-27 | 2008-03-27 | 동부일렉트로닉스 주식회사 | Cmos 트랜지스터용 폴리실리콘 구조물 및 이의 제조방법 |
| JP5414053B2 (ja) * | 2007-12-07 | 2014-02-12 | 独立行政法人物質・材料研究機構 | 金属電極及びこれを用いた半導体素子 |
| JP2009176997A (ja) * | 2008-01-25 | 2009-08-06 | Panasonic Corp | 半導体装置及びその製造方法 |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002217313A (ja) * | 2000-11-30 | 2002-08-02 | Texas Instruments Inc | 金属及び対応する金属珪化物から形成した各ゲートを有する相補形トランジスタ |
| JP2004228547A (ja) * | 2002-11-29 | 2004-08-12 | Sony Corp | 半導体装置およびその製造方法 |
| EP1593155A1 (en) * | 2003-02-03 | 2005-11-09 | Koninklijke Philips Electronics N.V. | Method of manufacturing a semiconductor device and semiconductor device obtained by means of such a method |
| US7316950B2 (en) * | 2003-04-22 | 2008-01-08 | National University Of Singapore | Method of fabricating a CMOS device with dual metal gate electrodes |
| JP2008510296A (ja) * | 2004-08-13 | 2008-04-03 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | デュアル・ゲートcmosの製造 |
-
2005
- 2005-01-12 JP JP2005005506A patent/JP4533155B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2006196610A (ja) | 2006-07-27 |
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