JP4515160B2 - Wiring board with built-in capacitor, capacitor element with built-in wiring board - Google Patents

Description

  The present invention relates to a wiring board having a capacitor as a built-in device (capacitor built-in wiring board) and a capacitor element with a built-in wiring board, and particularly suitable for increasing the capacitance of the capacitor and the wiring board built-in. Type capacitor element.

Examples of conventional capacitor built-in wiring boards and wiring board built-in capacitor elements include those described in Non-Patent Document 1 below. The wiring board and capacitor element have a structure in which a resin layer having a high relative dielectric constant is used as a dielectric, and the upper and lower sides of the high relative dielectric constant resin layer are sandwiched between wiring layers. The upper and lower wiring layers become both electrodes as a capacitor by predetermined patterning. In this structure, the capacitance can be increased by using a material having a higher relative dielectric constant as the resin layer serving as the dielectric of the capacitor.
Shimada et al., “Development of wiring board with built-in capacitor for RF module”, Journal of Japan Institute of Electronics Packaging, 2002, Vol. 5, No. 7, p. 636-640

  However, when trying to increase the capacitance further by using a material having a high dielectric constant that can be used in the process of an organic material printed wiring board, the area as a capacitor, that is, the area of both electrodes is usually reduced. It is necessary to increase the area, and the area where another wiring pattern is formed is pressed. Therefore, in applications that require miniaturization as a wiring board, the actual area that can be used as a capacitor is usually limited. For this reason, contribution to the reduction in size and weight of electronic devices in recent years is limited as a capacitor built-in wiring board.

  The present invention has been made in view of such circumstances, and further increases the capacitance of the capacitor in a wiring board having a capacitor as a built-in device (capacitor-containing wiring board) and a capacitor element with a built-in wiring board. An object is to provide a capacitor built-in wiring board and a wiring board built-in capacitor element.

In order to solve the above problems, a capacitor built-in wiring board according to the present invention includes a first dielectric resin layer that is a board substrate as a wiring board, and a first dielectric resin layer positioned on the first dielectric resin layer. An electrode plate, a second electrode plate located on a surface of the first dielectric resin layer opposite to a surface on which the first electrode plate is located, and the first dielectric resin layer A first wiring pattern electrically independent of the second electrode plate, located on a surface of the dielectric resin layer opposite to the surface on which the first electrode plate is located; The second dielectric resin layer, which is a board substrate as the wiring board, is laminated on the first dielectric resin layer so as to sandwich the second electrode plate and the first wiring pattern. A third electrode plate located on the surface of the second dielectric resin layer opposite to the surface on which the second electrode plate is located; and A second wiring pattern which is located on a surface opposite to the surface on which the second electrode plate is located on the dielectric resin layer, and is electrically independent from the third electrode plate And a third dielectric resin, which is a board substrate as the wiring board, laminated on the second dielectric resin layer so as to sandwich the third electrode plate and the second wiring pattern. A layer, a fourth electrode plate located on the surface of the third dielectric resin layer opposite to the surface on which the third electrode plate is located, and the first wiring pattern First and second interlayer connectors that respectively penetrate the first and second dielectric resin layers so as to relay and electrically connect the first and third electrode plates, and the second Through the second and third dielectric resin layers so that the second and fourth electrode plates are electrically connected by relaying the wiring pattern. And the second electrode plate has a convex shape on the side of the second dielectric resin layer, not on the side of the first dielectric resin layer. The third electrode plate is located in a convex shape on the second dielectric resin layer side, not on the third dielectric resin layer side .

In addition, the capacitor element with a built-in wiring board according to the present invention includes a first dielectric resin layer which is a board substrate as a wiring board, and a first electrode plate positioned on the first dielectric resin layer. A second electrode plate located on a surface of the first dielectric resin layer opposite to the surface on which the first electrode plate is located; and the first dielectric resin layer A first wiring pattern located on a surface opposite to the surface on which the first electrode plate is located and electrically independent from the second electrode plate; A second dielectric resin layer, which is a board substrate as the wiring board, laminated on the dielectric resin layer so as to sandwich the second electrode plate and the first wiring pattern; A third electrode plate located on a surface of the second dielectric resin layer opposite to the surface on which the second electrode plate is located, and the second dielectric resin. A second wiring pattern located on a surface opposite to the surface on which the second electrode plate is located and electrically independent from the third electrode plate; A third dielectric resin layer, which is a board substrate as the wiring board, laminated on the dielectric resin layer so as to sandwich the third electrode plate and the second wiring pattern; and A fourth electrode plate located on a surface of the dielectric resin layer 3 opposite to the surface on which the third electrode plate is located, and the first wiring pattern being relayed to the first electrode pattern. 1. First and second interlayer connectors that respectively penetrate the first and second dielectric resin layers and the second wiring pattern are relayed so as to electrically connect the first and third electrode plates. And the second and fourth dielectric resin layers penetrate the third and third dielectric resin layers respectively so as to electrically connect the second and fourth electrode plates. The second electrode plate is located not on the first dielectric resin layer side but on the second dielectric resin layer side, and is located on the second dielectric resin layer side. The electrode plate is located in a convex shape on the second dielectric resin layer side, not on the third dielectric resin layer side .

  That is, in both the capacitor built-in wiring board and the wiring board built-in type capacitor element, a dielectric resin layer exists as a plate base material between each electrode plate as a capacitor. A plurality of interlayer connection bodies penetrate through the dielectric resin layers and connect the electrode plates so that they are electrically separated from each other in the layer direction. Therefore, both electrodes of the electrode plate as a capacitor have a structure in which the facing area can be increased according to the number of stacked electrode plates. Therefore, it is possible to further increase the capacitance of the capacitor without increasing the area.

  According to the present invention, in a wiring board having a capacitor as a built-in device and a capacitor element with a built-in wiring board, the facing area of the capacitor electrode plate is substantially increased without increasing the area as the device, and The capacity can be further increased.

As an embodiment of the present invention, each of the first, second, third, and fourth interlayer connectors is made of a conductive composition and has an axis that coincides with the layer direction. It can be said that it is the shape where the diameter is changing. For example, a conductive bump made of a conductive composition is formed on a metal foil that is a previous stage of an electrode plate, and the formed conductive bump is passed through the dielectric resin layer to form an interlayer. This is the case of a connected body.

Further, as an embodiment, each of the first, second, third, and fourth interlayer connectors is made of a conductive composition and has an axis that coincides with the layer direction and has a diameter in the direction of the axis. It can be assumed that the shape is unchanged. This is the case, for example, when a via hole is formed in the dielectric resin layer with a laser, the conductive composition is filled in the formed via hole, and a metal foil is laminated and integrated thereon.

As an embodiment, each of the first, second, third, and fourth interlayer connectors is made of metal and has a columnar or frustum shape having an axis that coincides with the layer direction. It can be. For example, the metal plate which is the previous stage of the electrode plate is etched or plated on the metal foil to form conductive bumps, and the formed conductive bumps penetrate the dielectric resin layer. This is a case where an interlayer connection body is obtained.

Further, as an aspect, wherein the first electrode plate comprise are wiring layers, the wiring layer, and the first dielectric side provided with the resin layer and the insulating layer laminated on the opposite side of the insulating layer, the second wiring layer, wherein interlayer connecting said second wiring layer and the wiring layer through an insulating layer laminated on the side opposite to the side where the wiring layer is located And a fifth interlayer connection body. This is a multi-layer wiring structure.

Here, the fifth interlayer connector may be configured to connect the wiring layer in a portion not removed as a pattern and the second wiring layer in a portion not removed as a pattern. That is, the fifth interlayer connection body is made of a conductive composition and has a shape that has an axis that coincides with the layer direction and whether or not the diameter changes in the direction of the axis. Such is the case. In another case, the fifth interlayer connection body is made of metal and has a columnar or frustum shape having an axis coinciding with the layer direction.

  In the former, for example, a conductive bump made of a conductive composition is formed on a metal foil that is a previous stage of the second wiring layer, and the formed conductive bump is passed through the insulating layer. This is a case where the second interlayer connector is used. Alternatively, a via hole is formed in the insulating layer with a laser, the formed via hole is filled with a conductive plastic material, and a metal foil is laminated and integrated thereon. In the latter case, for example, a conductive bump is formed by etching a metal plate, which is a previous stage of the second wiring layer, or plating on a metal foil, and penetrating the formed conductive bump into the insulating layer. This is a case where the second interlayer connector is obtained.

Further, the fifth interlayer connection body may be formed of a conductive composition and has a cylindrical shape whose axial direction matches the layer direction. This is, for example, a configuration in which a via hole is formed in the insulating layer with a laser and the formed via hole is filled with a conductive composition. Furthermore, the fifth interlayer connection body may be made of a metal, has a truncated cone shape in which the axial direction coincides with the layer direction, and the inside of the truncated cone is empty. This is the case, for example, when a frustoconical via hole is formed in the insulating layer by a laser, and a conductive layer is formed on the inner wall surface of the formed via hole by plating.

In the fifth interlayer connector, a portion of the wiring layer that is the first electrode plate may be used as a connection portion in the interlayer connection to the second wiring layer. According to this, the electrode plate also functions as a land for interlayer connection, which can contribute to the improvement of the wiring pattern placement efficiency.

  Based on the above, embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a process diagram schematically showing a manufacturing process of a capacitor built-in wiring board and a wiring board built-in capacitor element according to an embodiment of the present invention. FIG. 2 and FIG. 3 are continuations of the previous drawings, respectively, and are process diagrams schematically showing the manufacturing process of the capacitor built-in wiring board and the wiring board built-in capacitor element according to one embodiment of the present invention. is there. In each figure, the process proceeds in order from (a). In these drawings, the same reference numerals are given to the same components.

  First, as shown in FIG. 1A, a copper foil 13 having a thickness of, for example, 5 μm (= the stage before becoming a capacitor electrode plate) is prepared, and a conductive composition is applied to a predetermined position on the main surface. A conical bump 14 (for example, a bottom diameter of 0.1 mm and a height of 35 μm) is formed by screen printing, for example. In screen printing, for example, a metal screen mask in which cylindrical through holes are formed is used, and the conductive composition prepared in a paste form is transferred onto the copper foil 13 from the through holes. Then, the bump 14 is dried after the transfer. As the conductive composition, for example, a conductive filler such as silver particles dispersed in a resin can be used.

  Next, a dielectric resin sheet having a thickness of, for example, 20 μm and a high relative dielectric constant (relative dielectric constant of several tens: 50, for example) is placed on the bumped copper foil, and heated and pressed to form the bumps 14 on the dielectric resin. It is laminated and integrated while passing through the sheet. Thereby, the thing of the state as shown in FIG.1 (b) which penetrates the dielectric resin layer 11 by a dielectric resin sheet and the head of the bump 14 is exposed can be obtained. The high dielectric constant as described above of the dielectric resin layer 11 can be obtained by, for example, a structure in which fine particles of barium titanate, which is a high dielectric constant substance, are dispersed as a filler in the resin. In addition, the broken line part of the head part of the bump 14 in FIG. 1B indicates that there are both cases where the head part is crushed and plastically deformed at this stage and when it is not.

  Next, a copper foil 12 (= the stage before becoming an electrode plate of a capacitor: thickness, for example, 5 μm) is arranged facing the dielectric resin layer 11 side of the laminate in the state shown in FIG. These are integrated by a laminating press. As a result of this integration, the dielectric resin layer 11 is completely cured, and the bumps 14 have an overall shape of a truncated cone (generally, a shape whose diameter changes in the axial direction due to plastic deformation). The copper foil 12 facing each other is pressed and electrically connected. The direction of the axis of the truncated cone coincides with the stacking direction. Thereby, the double-sided copper-clad dielectric resin sheet 1 (through the dielectric resin layer 11 as shown in the upper side of FIG. 1C) is connected between the copper layers 12 and 13 by the bumps 14 at predetermined positions. Can be obtained).

  In this embodiment, as shown in FIG. 1C, three double-sided copper-clad dielectric resin sheets 1 (double-sided copper-clad dielectric resin sheets 1, 2, and 3) prepared by the above-described steps are prepared. . Note that the bumps 14, 24, and 34, which are interlayer connection bodies inherent in the double-sided copper-clad dielectric resin sheets 1, 2, and 3, do not necessarily have a thick vertical relationship as shown in the figure. Either may be thick. Reference numerals 22, 23, 32, and 33 are copper foils similar to the copper foils 12 and 13, and reference numerals 21 and 31 are dielectric resin layers similar to the dielectric resin layer 11.

  Next, as shown in FIG. 1 (d), the copper foils (copper layers) 12, 13, 22, 23, 32, 33 on both sides of each of the double-sided copper-clad dielectric resin sheets 1, 2, 3 are predetermined. These are patterned to form patterned copper layers 12a, 13a, 22a, 23a, 32a, 33a. As shown in the figure, the patterned copper layers 12a, 13a, etc. leave at least the connection portions (lands) to the bumps 14, 24, 34 and the portions of the electrode plates as capacitors. Of course, a necessary wiring pattern may be formed. The patterning of the copper foil (copper layer) 12, 13, 22, 23, 32, 33 can be performed by etching using, for example, a well-known photolithography method.

  Next, as shown in FIG. 1 (e), conical bumps 41 and 51 (51) made of a conductive composition are respectively formed at predetermined positions on the patterned copper layer 13a and the patterned copper layer 32a. For example, a bottom diameter of 0.1 mm and a height of 40 μm are formed by screen printing, for example. The conductive composition and screen printing are the same as described with reference to FIG.

  Next, as shown in FIG. 2A, high relative dielectric constant resin sheets 4 and 5 are disposed between the dielectric resin sheets each having a patterned copper layer. Each of the high dielectric constant resin sheets 4 and 5 has a thickness of, for example, 30 μm and a relative dielectric constant of several tens (for example, 50). And as shown to Fig.2 (a), after aligning each sheet | seat, it heat-presses in the lamination direction and integrates (FIG.2 (b)). As a result, the bumps 41 and 51 are brought into pressure contact with and electrically connected to the patterned copper layers 22a and 23a that pass through and face the high relative dielectric constant resin sheets 4 and 5, respectively.

  The important point in FIG. 2B is that the copper layers 12a, 13a, 22a, 23a, 32a, and 33a serving as capacitor electrode plates are alternately arranged in the layer direction by the bumps 41 and 51 and the bumps 14, 24, and 34. Is electrically connected to another node. Thereby, in this embodiment, the laminated board provided with the capacitor which has a multilayer (6 layers) electrode board can be obtained. The thickness (total thickness) of this laminated board is, for example, 130 μm.

  When laminated and integrated as shown in FIG. 2B, the patterned copper layers 13a, 22a, 23a, and 32a are convex on the high relative dielectric constant resin sheets 4 and 5, respectively. Therefore, unlike the dielectric resin layers 11, 21, and 31 of the double-sided copper-clad dielectric resin sheets 1, 2, and 3, the high relative dielectric constant resin sheets 4 and 5 exhibit plasticity by this heating press. It is more preferable to use one. According to this, it is easy to control the space | interval between each copper layer 13a, 22a, 23a, 32a which will function as an electrode plate of a capacitor to predetermined. Such interval control is important for making the capacitance value as a capacitor without variation. The capacitance value depends on the electrode spacing.

  The laminated plate shown in FIG. 2B has an electrode plate as a capacitor and a dielectric, but is also a plate substrate as a wiring board. In that sense, as already described, the patterning in each of the copper layers 12a, 13a, 22a, 23a, 32a, 33a is the patterning for forming the electrode plate of the capacitor and the bumps 14, 24, 34, 41, 51. In addition to patterning to form a land, an arbitrary wiring pattern may be included.

  Moreover, the function shown as a capacitor built-in wiring board can be exhibited in the form shown in FIG. In other words, the outermost patterned copper layers 12a and 33a are each wiring layer as a so-called double-sided board, and a predetermined node in the wiring layer pattern on both sides functions as a capacitor. In addition, the electrode plate as a capacitor is composed of patterned copper layers 12a, 13a, 22a, 23a, 32a, 33a. With such a laminated structure, the facing area of the capacitor electrode plate can be increased, and the capacitance can be increased more than that obtained in a planar area.

  In the example described above, the electrode plate as a capacitor has a structure composed of a total of 6 layers of 3 layers + 3 layers. However, from the same concept, the minimum is 2 layers + 1 layers. It is possible to manufacture even more layers exceeding 6 layers. For example, in the case of a total of three layers, the following procedure can be followed. First, a sheet similar to the double-sided copper-clad dielectric resin sheet 1 is prepared, and the copper layers on both sides thereof are patterned in a predetermined pattern. Then, a conical bump made of a conductive composition is formed by screen printing at a predetermined position on the copper layer on one side. Next, a dielectric resin sheet having a high relative dielectric constant is placed opposite to the bump-forming surface side of the double-sided copper-clad dielectric resin sheet with bumps, and heated and pressurized to allow the bumps to penetrate the latter dielectric resin sheet. Laminate and integrate. Next, a copper foil is arranged facing the latter dielectric resin sheet, and these are integrated by a laminating press. Finally, a predetermined pattern is formed on the laminated copper foil.

  Further, in the form shown in FIG. 2B, the following bump forming method may be adopted instead of forming the bumps 14, 24, and 34 by screen printing as shown in FIG. it can. One of them is a method of forming a columnar, frustum-shaped or conical conductive bump (so-called etching bump) by preparing a metal (for example, copper) plate and etching the plate. In the region where the conductive bump is not formed, the thickness is reduced by etching in the thickness direction of the plate, and the conductive bump is formed so as not to be etched.

  Alternatively, a metal foil (for example, a copper foil) having a thickness similar to that of the copper foil 13 is prepared, and a columnar, frustum-shaped or conical conductive bump (so-called plated bump) is formed on the metal foil by plating. It is a method of forming. In any of the etching and plating methods, the formed metal bumps can be used for the subsequent steps by handling them instead of the conductive bumps 14, 24, 34 by screen printing. That is, as a result, the configuration and configuration as shown in FIG. 2B are obtained, and the bump as the interlayer connection body has the axis direction coinciding with the stacking direction.

  Furthermore, in the form shown in FIG. 2B, instead of the double-sided copper-clad dielectric resin sheets 1, 2, and 3 as shown in FIG. It can also be used. In this process, for example, first, a dielectric resin sheet is prepared, a via hole is formed at a predetermined position by, for example, laser processing, and the conductive composition is filled in the via hole. And it arrange | positions copper foil facing each of both surfaces of this dielectric resin sheet, and integrates it with a lamination press. Thus, the interlayer connection body has a cylindrical shape whose axis direction coincides with the stacking direction (that is, a shape whose diameter does not change in the axis direction). In addition, it can replace with the bumps 41 and 51 by applying the formation process of such an interlayer connection body to the high relative dielectric constant resin sheets 4 and 5.

  The form shown in FIG. 2 (b) is an embodiment as a capacitor built-in wiring board as described above, but a process example in which the capacitor built-in wiring board is subsequently used as a core board to form a multilayer wiring board is shown in FIG. Will be described with reference to FIG. First, as shown in FIG. 3A, substantially conical bumps 73 and 74 made of a conductive composition are printed at predetermined positions on copper foils 71 and 72 having a thickness of 18 μm, for example, by screen printing, for example. ·Form. In screen printing, for example, a metal screen mask in which cylindrical through holes are formed is used, and the conductive composition prepared in a paste form is transferred onto the copper foils 71 and 72 from the through holes. Then, the bumps 73 and 74 are dried after the transfer. As the conductive composition, for example, a conductive filler such as silver particles dispersed in a resin can be used.

  Next, a prepreg made of glass epoxy resin with a thickness of, for example, 60 μm is disposed on the bumped copper foil, and the glass epoxy resin is softened and pressurized while heating to a temperature at which the curing reaction does not proceed rapidly, The conductive bumps 73 and 74 are laminated and integrated while penetrating the prepreg. Thereby, the thing as shown in FIG.3 (b) which penetrates the insulating layers 75 and 76 by a prepreg and the head of the conductive bumps 73 and 74 is exposed can be obtained. In FIG. 3B, the broken line portions of the head portions of the conductive bumps 73 and 74 indicate that there are both cases where the head portion is crushed and plastically deformed at this stage, and when it is not.

  Next, as shown in FIG. 3C, bumps 73 and 74 and copper foils 71 and 72 with insulating layers 75 and 76 are laminated on both surfaces of the capacitor built-in wiring board shown in FIG. Integrated with a heating press. By this integration, the insulating layers 75 and 76 are completely cured, and the conductive bumps 73 and 74 as a whole have a truncated cone shape (generally, the diameter changes in the axial direction due to plastic deformation). Shape) and pressed and electrically connected to the patterned copper layers 12a and 33a facing each other. The direction of the axis of the truncated cone coincides with the stacking direction.

  The conductive bumps 73 and 74 serve as vias (interlayer connection bodies) for interlayer connection between the copper layers 12a and 33a in portions not removed as a pattern and the copper foils 71 and 72 in portions not removed as a pattern. In particular, as shown in FIG. 3C, it may be arranged at a position directly connected to a portion of an electrode plate as a capacitor. Such direct connection eliminates the need to separately provide capacitor connection lands on the patterned copper layers 12a and 33a. This is preferable in terms of pattern layout.

  Next, as shown in FIG. 4, the copper foils 71 and 72 which are the outermost layers after lamination are etched using a well-known photolithography method, for example, to form wiring patterns (second wiring layers) 71a and 72a. To do. Thereby, a multilayered capacitor built-in wiring board can be obtained. FIG. 4 is a cross-sectional view showing a schematic configuration of a capacitor built-in wiring board and a wiring board built-in capacitor element according to an embodiment of the present invention. 3 can be further multilayered as a wiring board by further continuing the process shown in FIG. 3 to the wiring board shown in FIG. Such multi-layering can be continued in the same manner.

  One of the advantages of this embodiment is that there are few restrictions on the layout of the multilayer wiring board. That is, the wiring patterns 71a and 72a can be used in the same manner regardless of whether or not the conductive bumps 73 and 74 are arranged on the inner side. For example, it is also easy to arrange conductive bumps on the conductive bumps. Although there is no such advantage, instead of the interlayer connection by the conductive bumps 73 and 74, a through hole is formed in the entire wiring board shown in FIG. Of course, a connection body is also possible.

  The capacitance of the capacitor was measured in the capacitor built-in wiring board having the configuration shown in FIG. 4 obtained by the above process. As a result, a value of 110 pF per 1 mm square could be obtained. This is about five times the value of the conventional one having a high relative dielectric constant resin layer. As shown in FIG. 4, the high relative dielectric constant resin layer has five layers (11, 4,. 21, 5, 31), which is almost the same as the theoretical value.

  In the above embodiment, instead of forming the conductive bumps 73 and 74 by screen printing as shown in FIG. 3A, the following method for forming the conductive bumps may be employed. One of them is a method of forming a columnar, frustum-shaped or conical conductive bump (so-called etching bump) by preparing a metal (for example, copper) plate and etching the plate. In the region where the conductive bump is not formed, the thickness is reduced by etching in the thickness direction of the plate, and the conductive bump is formed so as not to be etched.

  Alternatively, a metal foil (for example, a copper foil) having a thickness similar to that of the copper foils 71 and 72 is prepared, and a conductive bump (so-called plating bump) having a columnar shape, a frustum shape, or a conical shape as a whole by plating on the metal foil. ). In any of the etching and plating methods, the formed metal conductive bumps can be used for the subsequent steps by handling them instead of the conductive bumps 73 and 74 by screen printing. That is, as a result, the configuration and form as shown in FIG. 4 are obtained, and the conductive bump as the interlayer connection body has the axis direction coincident with the stacking direction.

  Next, a capacitor built-in wiring board according to another embodiment of the present invention will be described with reference to FIG. FIG. 5 is a cross-sectional view showing a schematic configuration of a capacitor built-in wiring board according to another embodiment of the present invention, in which parts corresponding to those already described are denoted by the same reference numerals. The description of that part is omitted. As shown in the figure, this capacitor built-in wiring board has columnar interlayer connectors 83 and 84 whose axial directions coincide with the stacking direction as interlayer connectors instead of the conductive bumps 73 and 74 of FIG. is there.

  Such a structure can be manufactured by the following processes, for example. The steps shown in FIGS. 1A to 2B are the same. Subsequently, the insulating layers 75 and 76 and the insulating layers 75 and 76 in which the copper foils, which are the previous stage of the wiring patterns 71a and 72a, are laminated separately or in advance, respectively, are shown in FIG. 2 (b). Laminated on both sides of the capacitor built-in wiring board and integrated by pressing and heating press.

  Next, the copper foil which is the outermost layer after lamination is etched using a well-known photolithography method, for example, to form wiring patterns (second wiring layers) 71a and 72a. At this time, the copper foil is also removed by etching at portions where the interlayer connectors 83 and 84 are to be formed. After this etching, for example, predetermined positions of the insulating layers 75 and 76 are laser processed using the formed wiring patterns 71a and 72a as masks to form via holes reaching the patterned copper layers 12a and 33a. Furthermore, a conductive composition can be filled in the formed via hole to obtain a structure as shown in FIG. In this embodiment, it is somewhat difficult to use the part directly above the interlayer connectors 83 and 84 as a component mounting land or an arrangement position of an interlayer connector in the case of further stacking, but the manufacturing process is simple.

  Next, a capacitor built-in wiring board according to still another embodiment of the present invention will be described with reference to FIG. FIG. 6 is a cross-sectional view showing a schematic configuration of a capacitor built-in wiring board according to still another embodiment of the present invention, and the same reference numerals are given to the same parts as those already described. The description of that part is omitted. As shown in the figure, this capacitor built-in wiring board is a columnar shape whose axial direction coincides with the laminating direction as shown in FIG. 5 as an interlayer connection body replacing the conductive bumps 73 and 74 of FIG. That is, it has interlayer connection bodies 93 and 94 having a shape whose diameter does not change in the axial direction. However, unlike the case shown in FIG. 5, these interlayer connectors 93 and 94 are connected to the portions where the outer wiring patterns 71 and 72a are not removed.

  Such a structure can be manufactured by the following processes, for example. The steps shown in FIGS. 1A to 2B are the same. Subsequently, the insulating layers 75 and 76 are laminated on both surfaces of the capacitor built-in wiring board shown in FIG. 2B, and are integrated by pressing and heating press. Next, laser processing is performed on predetermined positions of the insulating layers 75 and 76 to form via holes reaching the patterned copper layers 12a and 33a. Further, the conductive compositions 93 and 94 are filled in the formed via holes.

  Subsequently, a copper foil, which is a previous stage of the wiring patterns 71a and 72a, is laminated on the insulating layers 75 and 76, and integrated by pressing and heating press. Finally, the copper foil, which is the outermost layer after lamination, is etched using a well-known photolithography method, for example, to form wiring patterns (second wiring layers) 71a and 72a. In this manufacturing method, the process is slightly more complicated than the embodiment shown in FIG. 4, but similarly, there are less restrictions on layout as a multilayer wiring board.

  Or it can also manufacture as follows. 1 (a) to 2 (b) are the same, and then insulating layers 75 and 76 are prepared, and through holes are formed at predetermined positions by laser processing. Then, the through hole is filled with a conductive paste. Subsequently, the insulating layers 75 and 76, and the copper foil, which is the previous stage of the wiring patterns 71a and 72a, are disposed and laminated on both sides of the capacitor built-in wiring board shown in FIG. Integration by heating press. Finally, the copper foil, which is the outermost layer after lamination, is etched using a well-known photolithography method, for example, to form wiring patterns (second wiring layers) 71a and 72a. In this manufacturing method, only one lamination and integration process is required to form the outer layer, and the process becomes simpler.

  Next, a capacitor built-in wiring board according to still another embodiment of the present invention will be described with reference to FIG. FIG. 7 is a cross-sectional view showing a schematic configuration of a capacitor built-in wiring board according to still another embodiment of the present invention, and the same reference numerals are given to the same parts as those already described. The description of that part is omitted. As shown in the figure, this capacitor built-in wiring board has truncated cone-shaped interlayer connectors 103 and 104 whose axial directions coincide with the layer direction as interlayer connectors instead of the conductive bumps 73 and 74 of FIG. It is. The frustoconical interlayer connectors 103 and 104 are empty inside, and are therefore recessed when viewed from above.

  Such a structure can be manufactured by the following processes, for example. The steps shown in FIGS. 1A to 2B are the same. Subsequently, the process proceeds in the same manner as in the embodiment shown in FIG. 5, and predetermined positions of the insulating layers 75 and 76 are laser processed to form via holes reaching the patterned copper layers 12a and 33a. In this laser processing, processing is adjusted so that the via hole has a truncated cone shape.

  Next, a conductive plating layer (metal layer) is formed on the inner wall of each via hole to obtain interlayer connectors 103 and 104. For this formation, for example, a well-known two-step plating layer forming method of electroless plating and electrolytic plating can be used. Finally, the copper foil which is the outermost layer is etched using a known photolithography method, for example, to form wiring patterns (second wiring layers) 71a and 72a. As in the embodiment shown in FIG. 5, this embodiment is not suitable for the case where the portion immediately above the interlayer connection bodies 103 and 104 is used as a component mounting land or an arrangement position of the interlayer connection body when further stacking. It is simple as a manufacturing process.

The process drawing which shows the manufacturing process of the capacitor built-in wiring board which concerns on one Embodiment of this invention, and a wiring board built-in type capacitor element in a typical cross section. FIG. 2 is a continuation diagram of FIG. 1, and is a process diagram schematically showing a manufacturing process of a capacitor built-in wiring board and a wiring board built-in capacitor element according to an embodiment of the present invention. FIG. 3 is a continuation diagram of FIG. 2, and is a process diagram schematically showing a manufacturing process of the capacitor built-in wiring board and the wiring board built-in capacitor element according to one embodiment of the present invention. 1 is a cross-sectional view showing a schematic configuration of a capacitor built-in wiring board and a wiring board built-in capacitor element according to an embodiment of the present invention. Sectional drawing which shows the typical structure of the wiring board with a built-in capacitor which concerns on another embodiment of this invention. Sectional drawing which shows the typical structure of the wiring board with a built-in capacitor which concerns on another embodiment of this invention. Sectional drawing which shows the typical structure of the wiring board with a built-in capacitor which concerns on another embodiment of this invention.

Explanation of symbols

  1, 2, 3 ... double-sided copper-clad dielectric resin sheet, 4, 5 ... high relative dielectric constant resin sheet, 11, 21, 31 ... dielectric resin layer, 12, 13, 22, 23, 32, 33 ... copper foil (Copper layer), 12a, 13a, 22a, 23a, 32a, 33a ... patterned copper layer, 14, 24, 34 ... bump (interlayer connection), 41, 51 ... bump, 71, 72 ... copper foil, 71a, 72a ... wiring pattern, 73, 74 ... conductive bump, 75, 76 ... insulating layer, 83, 84 ... interlayer connection filled with conductive composition, 93, 94 ... interlayer connection filled with conductive composition, 103, 104 ... Interlayer connection by plating.

Claims (13)

A first dielectric resin layer which is a board substrate as a wiring board ;
A first electrode plate located on the first dielectric resin layer;
A second electrode plate located on the surface of the first dielectric resin layer opposite to the surface on which the first electrode plate is located;
First electrically independent of the second electrode plate, which is located on the surface of the first dielectric resin layer opposite to the surface on which the first electrode plate is located. Wiring pattern of
A second dielectric resin layer, which is a board substrate as the wiring board, laminated on the first dielectric resin layer so as to sandwich the second electrode plate and the first wiring pattern; ,
A third electrode plate located on the surface of the second dielectric resin layer opposite to the surface on which the second electrode plate is located;
A second electrically independent of the third electrode plate, which is located on the surface of the second dielectric resin layer opposite to the surface on which the second electrode plate is located. Wiring pattern of
A third dielectric resin layer, which is a board substrate as the wiring board, laminated on the second dielectric resin layer so as to sandwich the third electrode plate and the second wiring pattern; ,
A fourth electrode plate located on the surface of the third dielectric resin layer opposite to the surface on which the third electrode plate is located;
First and second interlayers respectively penetrating the first and second dielectric resin layers so as to relay the first wiring pattern and electrically connect the first and third electrode plates. Connected body,
Third and fourth layers that respectively penetrate the second and third dielectric resin layers so as to electrically connect the second and fourth electrode plates through the second wiring pattern. A connection body,
The second electrode plate is located in a convex shape on the second dielectric resin layer side instead of on the first dielectric resin layer side;
The wiring board with a built-in capacitor , wherein the third electrode plate is located in a convex shape on the second dielectric resin layer side, not on the third dielectric resin layer side . Each of the first, second, third, and fourth interlayer connectors is made of a conductive composition, and has an axis that coincides with the layer direction and has a diameter that changes in the direction of the axis. The capacitor built-in wiring board according to claim 1, wherein: Each of the first, second, third, and fourth interlayer connectors is made of a conductive composition and has an axis that coincides with the layer direction and the diameter does not change in the direction of the axis. The capacitor built-in wiring board according to claim 1, wherein: The first, second, third, and fourth interlayer connectors are each made of metal and have a columnar or frustum shape having an axis that coincides with the layer direction. The capacitor built-in wiring board according to 1. A wiring layer including the first electrode plate ;
An insulating layer laminated on the side opposite from said wiring layer, provided with the said first dielectric resin layer side,
A second wiring layer above the insulating layer, the side where the wiring layer is located which is laminated on the opposite side,
The capacitor built-in wiring board according to claim 1, further comprising: a fifth interlayer connection body that connects the wiring layer and the second wiring layer through the insulating layer. 6. The fifth interlayer connector connects the wiring layer in a portion not removed as a pattern and the second wiring layer in a portion not removed as a pattern. Capacitor built-in wiring board. 7. The fifth interlayer connector is made of a conductive composition, and has a shape that has an axis that coincides with the layer direction and has a diameter that changes in the direction of the axis. Capacitor built-in wiring board. The fifth interlayer connector is made of a conductive composition and has a shape that has an axis that coincides with the layer direction and has a diameter that does not change in the direction of the axis. Capacitor built-in wiring board. 7. The capacitor built-in wiring board according to claim 6, wherein the fifth interlayer connection body is made of metal and has a columnar or frustum shape having an axis coinciding with the layer direction. 6. The capacitor built-in wiring board according to claim 5 , wherein the fifth interlayer connection body is made of a conductive composition and has a cylindrical shape whose axis direction coincides with the layer direction. 6. The fifth interlayer connector is made of metal, has a truncated cone shape in which an axial direction coincides with a layer direction, and the inside of the truncated cone is empty. Capacitor built-in wiring board. 6. The fifth interlayer connection body, wherein a portion of the wiring layer that is the first electrode plate serves as a connection portion in an interlayer connection to the second wiring layer. Capacitor built-in wiring board. A first dielectric resin layer which is a board substrate as a wiring board ;
A first electrode plate located on the first dielectric resin layer;
A second electrode plate located on the surface of the first dielectric resin layer opposite to the surface on which the first electrode plate is located;
First electrically independent of the second electrode plate, which is located on the surface of the first dielectric resin layer opposite to the surface on which the first electrode plate is located. Wiring pattern of
A second dielectric resin layer, which is a board substrate as the wiring board, laminated on the first dielectric resin layer so as to sandwich the second electrode plate and the first wiring pattern; ,
A third electrode plate located on the surface of the second dielectric resin layer opposite to the surface on which the second electrode plate is located;
A second electrically independent of the third electrode plate, which is located on the surface of the second dielectric resin layer opposite to the surface on which the second electrode plate is located. Wiring pattern of
A third dielectric resin layer, which is a board substrate as the wiring board, laminated on the second dielectric resin layer so as to sandwich the third electrode plate and the second wiring pattern; ,
A fourth electrode plate located on the surface of the third dielectric resin layer opposite to the surface on which the third electrode plate is located;
First and second interlayers respectively penetrating the first and second dielectric resin layers so as to relay the first wiring pattern and electrically connect the first and third electrode plates. Connected body,
Third and fourth layers that respectively penetrate the second and third dielectric resin layers so as to electrically connect the second and fourth electrode plates through the second wiring pattern. A connection body,
The second electrode plate is located in a convex shape on the second dielectric resin layer side instead of on the first dielectric resin layer side;
The wiring board built-in type capacitor element , wherein the third electrode plate is located on the second dielectric resin layer side instead of the third dielectric resin layer side .

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