KR101018100B1 - Multilayer ceramic substrate, Method of forming conductive vias having multi-electrode and Method of fabricating multilayer ceramic substrate using the same - Google Patents

Abstract

The present invention relates to a multilayer ceramic substrate, a method of forming a conductive via having multiple electrodes, and a method of manufacturing the multilayer ceramic substrate. The multilayer ceramic substrate according to an embodiment of the present invention includes a ceramic laminate in which a plurality of ceramic layers are laminated; At least one of the plurality of ceramic layers has a circuit portion consisting of at least one conductive via and a conductive line formed in the ceramic layer, at least one of the conductive vias, so as to be electrically insulated from each other in other regions of the inner wall of the via hole of the conductive via By having a plurality of via electrode elements formed along the thickness direction of the ceramic layer, multiple signal lines may be formed of one conductive via.

Via Hole, Conductive Vias, Multiple Signal Lines

Description

Multilayer ceramic substrate, Method of forming conductive vias having multi-electrode and Method of fabricating multilayer ceramic substrate using the same

The present invention relates to a multilayer ceramic substrate, a method of forming a conductive via having multiple electrodes, and a method of manufacturing a multilayer ceramic substrate using the same, and in particular, a multilayer ceramic substrate capable of improving design freedom by forming multiple electrodes in one conductive via. The present invention relates to a method of forming a conductive via having multiple electrodes and a method of manufacturing a multilayer ceramic substrate using the same.

In general, MLC (Multi Layer Ceramic) substrates (hereinafter, referred to as multilayer ceramic substrates) such as HTCC and LTCC can implement a three-dimensional interlayer circuit, and thus have high design flexibility, thereby enabling active devices such as semiconductor IC chips. And passive components such as capacitors, inductors and resistors, or as simple semiconductor IC packages. More specifically, the multilayer ceramic substrate is widely used to construct various electronic components such as PA module substrates, RF diode switches, filters, chip antennas, various package components, and composite devices.

The multilayer ceramic substrate is manufactured by firing an electrode pattern and conductive vias for interlayer connection on each individual sheet, stacking sheets according to a desired circuit pattern, and then firing the electrode patterns and the conductive vias. Via formation is very important as it is signaled through. If the vias are not made as originally designed, performance of the substrate itself will be impossible.

In addition, the utilization of multilayer ceramic substrates is gradually increasing in the miniaturized and highly functional high frequency component market. In accordance with these requirements, as the structure of the multilayer ceramic substrate is compounded and refined, the size of the internal electrode pattern and the conductive via structure is gradually reduced, and the size thereof is decreasing.

Thus, a method of manufacturing a multilayer ceramic substrate according to a conventional method will be described first. First, a plurality of ceramic green sheets are manufactured by mixing a ceramic and a binder. After fabricating the ceramic green sheet, the via hole should be punched in the correct position in consideration of the entire ceramic substrate. The punching process may first print an electrode pattern serving as a signal line and punch a via hole, or print an electrode pattern serving as a signal line after forming a via hole first.

After the via hole is formed, a via fill in which an electrode material is filled in the via hole is performed. The green ceramic substrate is manufactured by stacking the ceramic green sheets individually made in a predetermined arrangement order. The green ceramic substrate is fired to complete the multilayer ceramic substrate.

In the multilayer ceramic substrate manufactured as described above, one via is connected to one signal line to manufacture a signal. At this time, the size of the via and the method for filling the electrode material are important parameters that determine the number of vias that can be formed in the entire layer and the number and spacing of electrode patterns connected thereto. In other words, when the via size is increased, designable elements are reduced in one layer of the ceramic substrate, and the design freedom of line width is reduced, making it difficult to manufacture a highly integrated substrate. On the other hand, if the via size is too small, the degree of integration is improved but via punching is difficult, and it is difficult to properly fill the electrode material, resulting in via failure.

The present invention is to improve the above-mentioned conventional problems, an object of the present invention is to provide a multilayer ceramic substrate, a method of forming a conductive via having multiple electrodes and a multilayer ceramic substrate using the same can improve the design freedom of the multilayer ceramic substrate To provide a method.

In order to achieve the above technical problem, a multilayer ceramic substrate according to an embodiment of the present invention, a ceramic laminate in which a plurality of ceramic layers are laminated; At least one of the plurality of ceramic layers has a circuit portion consisting of at least one conductive via and a conductive line formed in the ceramic layer, at least one of the conductive vias, so as to be electrically insulated from each other in other regions of the inner wall of the via hole of the conductive via And a plurality of via electrode elements formed along the thickness direction of the ceramic layer.

In this case, the plurality of via electrode elements may be formed in two portions facing each other in the via holes of the conductive vias, or the plurality of via electrode elements may be formed in three or more via holes of the conductive vias. The plurality of via electrode elements may include at least one metal of Ag, Cu, Mo, Ni, and Ag-Pd.

In addition, at least one of the conductive vias may have a dielectric or insulating material filled in the via holes of the conductive vias so that the plurality of via electrode elements are electrically insulated from each other, or coated on the plurality of via electrode elements. Or an insulating material, wherein the dielectric or insulating material is the same material as the material of the ceramic layer or is different from the material of the ceramic layer.

In addition, the plurality of via electrode elements may be electrically connected to a plurality of conductive lines, respectively, and catch pads formed on an upper surface of the conductive via in which the plurality of via electrode elements are formed.

On the other hand, the conductive via forming method having a multi-electrode according to another embodiment of the present invention, forming a via hole penetrating the upper and lower surfaces in the ceramic green sheet; And forming a plurality of via electrode elements along the thickness direction of the ceramic green sheet so as to be spaced apart from each other in different regions of the inner wall of the via hole.

In this case, the forming of the plurality of via electrode elements may include forming a first mask layer on the ceramic green sheet to open a portion of an inner wall of the via hole; And removing the first mask layer after forming a via electrode element on an inner wall of the open via hole, and forming the plurality of via electrode elements. Forming a second mask layer such that another area of the inner wall of the via hole spaced apart from the inner wall of the via hole is opened; And removing the second mask layer after forming a via electrode element in the other open area.

The method may further include forming a fourth mask layer on the ceramic green sheet to open a portion of the via hole adjacent to the plurality of via electrode elements except for the upper surfaces of the plurality of via electrode elements; And removing the fourth mask layer after coating the plurality of via electrode elements with a dielectric or insulating material to electrically insulate the plurality of via electrode elements from each other.

The method may further include forming a third mask layer on the ceramic green sheet such that regions of the via holes other than the plurality of via electrode elements are opened; And removing the third mask layer after filling the open area with a dielectric or insulating material.

The method may further include forming catch pads on upper surfaces of the plurality of via electrode elements, respectively.

On the other hand, the method of manufacturing a multilayer ceramic substrate according to another embodiment of the present invention, forming at least one via hole penetrating the upper and lower surfaces in at least some of the ceramic green sheet of the plurality of ceramic green sheets; Forming a plurality of via electrode elements along the thickness direction of the ceramic green sheet so as to be spaced apart from each other in different regions of the inner wall of the via hole; Forming conductive lines electrically connected to the plurality of via electrode elements, respectively; Stacking the plurality of ceramic green sheets to form a micro multilayered ceramic substrate having a desired circuit portion; And firing the green multilayer ceramic substrate.

In this case, the forming of the plurality of via electrode elements may include forming a mask layer on the ceramic green sheet to open a portion of an inner wall of the via hole; And removing the mask layer after forming a via electrode element on an inner wall of the open via hole, and forming the plurality of via electrode elements, wherein the via hole element is formed on the ceramic green sheet. Forming a mask layer to open an inner wall of another region spaced apart from the inner wall; And removing the mask layer after forming a via electrode element on the inner wall of the other open area.

The method may further include forming a mask layer on the ceramic green sheet to open a portion of the via hole adjacent to the plurality of via electrode elements, except for the upper surfaces of the plurality of via electrode elements. Forming a; And removing the mask layer after coating the plurality of via electrode elements with a dielectric or insulating material such that the plurality of via electrode elements are electrically insulated from each other.

The method may further include forming a mask layer on the ceramic green sheet to open an area of the via hole except for the plurality of via electrode elements before the forming of the conductive line; And removing the mask layer after filling the open area with a dielectric or insulating material.

The method may further include forming catch pads on upper surfaces of the plurality of via electrodes, respectively.

According to the present invention, by dividing one conductive via to form multiple signal lines, the number of electrode patterns connecting interlayer signals through one conductive via can be increased, thereby increasing the number of signal lines that can be formed in the entire layer. Increasing may reduce the number of layers in the multilayer ceramic substrate or reduce the size of the entire substrate. Through this method, it is possible to manufacture a multilayer ceramic substrate having a high degree of integration by increasing the degree of freedom in designing the multilayer ceramic substrate.

Hereinafter, with reference to the accompanying drawings will be described embodiments of the present invention; However, embodiments of the present invention may be modified in various other forms, and the scope of the present invention is not limited to the embodiments described below. In addition, the embodiments of the present invention are provided to more completely explain the present invention to those skilled in the art. Accordingly, the shape and size of elements in the drawings may be exaggerated for clarity.

A method of forming a conductive via having multiple electrodes according to the present invention includes forming a via hole penetrating the upper and lower surfaces of a ceramic green sheet; And forming a plurality of via electrode elements along the thickness direction of the ceramic green sheet so as to be spaced apart from each other in different areas of the inner wall of the via hole. The plurality of via electrode elements may be electrically insulated from each other. Coating a plurality of via electrode elements with a dielectric or insulating material, or filling a dielectric or insulating material therein with one of the via holes;

1 is a vertical cross-sectional view for each process for explaining a method of forming a conductive via having a multiple electrode according to an exemplary embodiment of the present invention. Here, the conductive via according to the present invention is formed to have a plurality of via electrode elements, but for convenience of description, the description will be given to forming two via electrode elements.

As shown in FIG. 1A, a via hole 120 penetrating the upper and lower surfaces of the ceramic green sheet 110 is formed. Here, the ceramic green sheet 110 is manufactured through the following process.

First, a predetermined resin, a dispersant, and a mixed solvent are added to the glass-ceramic powder. The glass-ceramic powder can be dispersed by adding a predetermined amount of the dispersant. An acrylic resin may be used as the resin, and toluene and ethanol may be used as the mixed solvent. This mixed solution is subjected to dispersion, slurrying, filtration and defoaming processes using a ball mill, and formed into a ceramic green sheet having a desired thickness using a doctor blade method. The ceramic green sheet is cut to a certain size and used.

Thereafter, the via hole 120 is formed by performing a punching process on the ceramic green sheet 110.

Subsequently, as shown in FIG. 1B, the first mask layer 121 is formed on the ceramic green sheet 110 having the via holes 120 so as to open one inner wall of the via holes 120. Here, the first mask layer 121 is a metal mask and has a pattern 122 in which one side inner wall of the via hole 120 is opened.

Thereafter, via electrodes are formed along the thickness direction of the ceramic green sheet using metal paste only on one inner wall of the via hole 120 opened by the first mask layer 121. Here, the method of filling the inner wall of one side of the via hole using a through fill method. By using the through-fill method, a metal paste is applied along an inner wall of one side of the via hole 120 to form a via electrode element only in an inner portion of the via hole 120.

After forming the first via electrode element 130a only on one inner wall of the via hole 120, the first mask layer 121 is removed. In this case, the metal paste for forming the via electrode element may contain at least one metal of Ag, Cu, Mo, Ni, and Ag-Pd, and preferably, Ag is used.

Subsequently, as shown in FIG. 1C, the second mask is opened on the ceramic green sheet 110 on which the first via electrode element 130a is formed to open the inner wall of another region spaced apart from the inner wall of one side of the via hole 120. Form layer 123. Here, the second mask layer 123 is the same metal mask as the first mask layer 121 and has a pattern 124 in which an inner wall of another region spaced apart from one inner wall of the via hole 120 is opened.

Thereafter, the second via electrode element 130b is formed using the metal paste only on the inner wall of another region spaced apart from the inner wall of one side of the via hole 120 opened by the second mask layer 123. Here, the filling method of the metal paste is the same as the method of forming the first via electrode element 130a. Using the through-fill method, the second via electrode element 130b is formed by applying a metal paste along an inner wall of another region spaced apart from an inner wall of one side of the via hole 120. Thereafter, the second mask layer 123 is removed.

In this case, the first via electrode element 130a and the second via electrode element 130b are formed in the via hole 120 so as to be spaced apart from each other, and are not connected to each other on the circumferential surface of the via hole 120. Is formed. For example, the first via electrode element 130a may be formed on one inner wall of the via hole 120, and the second via electrode element 130b may be formed on the other inner wall to face each other, but is not limited thereto. It only needs to be spaced apart and electrically insulated.

Subsequently, as shown in FIG. 1D, when the first via electrode element 130a and the second via electrode element 130b are formed in the via hole 120 to be spaced apart from each other, the first via of the via hole 120 is formed. A third mask layer 125 is formed on the ceramic green sheet 110 in order to fill the inside of the via hole 120 except for the electrode element 130a and the second via electrode element 130b with a dielectric or insulating material. . Here, the third mask layer 125 is a metal mask and has a pattern 126 in which the regions except for the first via electrode element 130a and the second via electrode element 130b are opened in the via hole 120.

Thereafter, the dielectric or insulating material 140 is filled in the area opened by the third mask layer 125. Here, the filling method of the dielectric or insulating material uses a via fill method. By using the via fill method, the via electrode elements are electrically filled with the dielectric or insulating material 140 by filling the inside of the via hole 120 except for the first via electrode element 130a and the second via electrode element 130b. Insulated. Thereafter, the third mask layer 125 is removed. In this case, the dielectric or insulating material 140 electrically insulates the first via electrode element 130a and the second via electrode element 130b so that a conductive line connected to the via electrode element and two signal lines are formed. do.

As a result, as shown in FIG. 1E, a conductive via having multiple electrodes, such as the first via electrode element 130a and the second via electrode element 130b, is completed in the ceramic green sheet 110.

As described above, the conductive via having multiple electrodes according to the present invention is not limited to the first via electrode element and the second via electrode element shown in FIG. 1, and the ceramic green sheet may be spaced apart from different regions of the circumferential surface of the via hole. A plurality of via electrode elements may be formed along the thickness direction, which will be described in detail with reference to FIG. 4.

In addition, the conductive via having the multi-electrode according to the present invention has been described as being filled with a dielectric or insulating material 140 in the via hole so that each via electrode element is electrically insulated from each other, but is not limited thereto. It may be formed in a form coated on the electrode elements (130a, 130b). In addition, since the plurality of via electrode elements according to the present invention are formed to be electrically insulated from each other, a dielectric or insulating material may not be formed. Each such embodiment is shown in detail in FIG.

On the other hand, the method of manufacturing a multilayer ceramic substrate according to the present invention, forming at least one via hole penetrating the upper and lower surfaces in at least some of the ceramic green sheet of the plurality of ceramic green sheets; Forming a plurality of via electrode elements along the thickness direction of the ceramic green sheet so as to be spaced apart from each other in different regions of the inner wall of the via hole; Forming conductive lines electrically connected to the plurality of via electrode elements, respectively; Stacking the plurality of ceramic green sheets to form a micro multilayered ceramic substrate having a desired circuit portion; And firing the microcrystalline multilayer ceramic substrate, wherein the plurality of via electrode elements are electrically insulated from each other or coated with a dielectric or insulating material on the plurality of via electrode elements of the via holes. Filling the inside of the dielectric or insulating material; further comprises.

2 is a vertical cross-sectional view for each process for explaining a method of manufacturing a multilayer ceramic substrate according to one embodiment of the present invention. Here, the manufacturing method forms a conductive via using the method of forming a conductive via having the multiple electrodes described with reference to FIG. 1. In addition, the conductive via according to the present invention is formed to have a plurality of via electrode elements, but for convenience of description, the description will be given to forming two via electrode elements.

As illustrated in FIG. 2A, after the plurality of ceramic green sheets are manufactured, the via holes 220 are formed in some ceramic green sheets 210. Here, the ceramic green sheet 210 is the same as the manufacturing process of the ceramic green sheet 110 described in FIG.

The via holes 220 are formed in each ceramic green sheet 210 through a punching process according to a circuit pattern to be designed.

Subsequently, as illustrated in FIG. 2B, a plurality of via electrodes are disposed along the thickness direction of the ceramic green sheet 210 so as to be spaced apart from each other in different regions of the inner wall of the via hole 220 formed in each ceramic green sheet 210. A conductive via having multiple electrodes is formed by filling a dielectric or insulating material inside of the via holes so that the element and the plurality of via electrode elements are electrically insulated from each other. Here, the conductive via having multiple electrodes is manufactured through the process described with reference to FIG. 1.

Specifically, first, the first via electrode element 230a is formed on one inner wall of the via hole 220, and the second via electrode element 230b is formed on the inner wall of another region spaced apart from the one inner wall. In this case, the first via electrode element 230a and the second via electrode element 230b are formed along the thickness direction of the ceramic green sheet to be spaced apart from each other along the circumferential surface of the via hole 220.

Then, the dielectric or insulating material 240 is filled to electrically insulate the first via electrode element 230a and the second via electrode element 230b. Here, the dielectric or insulating material 240 is filled in the via hole 220 except for the region in which the first via electrode element 230a and the second via electrode element 230b are formed.

The dielectric or insulating material 240 may be a material having the same composition as that of the ceramic green sheet 210, but is not limited thereto. The dielectric or insulating material 240 may be configured to be different from the ceramic green sheet 210. The material may be used, or a dielectric material may be used within the limits of permittivity considered in electrode design.

As such, when conductive vias having multiple electrodes are formed in each ceramic green sheet 210, catch pads 250a and 250b are formed on upper surfaces of the first via electrode element 230a and the second via electrode element 230b, respectively. do.

When the plurality of ceramic green sheets are stacked, the catch pads 250a and 250b serve to widen the cross-sectional area of the conductive vias, thereby facilitating the stacking of the conductive vias and the connection between the conductive vias and the conductive lines. These catch pads 250a and 250b are not necessary components in the present invention and may be omitted.

Thereafter, conductive lines 260 electrically connected to the conductive vias are formed according to the circuit pattern to be designed. In this case, conductive lines 260 are formed in the first via electrode element 230a and the second via electrode element 230b of the conductive via, respectively, to form first and second signal lines independent of each other.

Here, the conductive pattern 260 is formed by screen printing, and uses the same material as the metal paste for forming the first via electrode element 230a and the second via electrode element 230b, wherein the metal paste is Ag , Cu, Mo, Ni, and Ag-Pd may contain at least one metal, preferably Ag is preferably used.

Meanwhile, in the present invention, the conductive lines 260 are formed after the conductive vias are formed. However, the conductive lines 260 are not limited thereto. Before the conductive vias are formed, the conductive patterns may be first formed on the ceramic green sheet having the via holes. have.

Subsequently, as shown in FIG. 2 (c), a plurality of ceramic green sheets 210 in which conductive lines and conductive vias having multiple electrodes are formed are laminated according to the circuit pattern to be designed, and thus a multi-layered multilayer having a circuit portion is provided. To form a ceramic substrate. That is, in the multi-layered ceramic substrate, the first via electrode element 230a and the second via electrode element 230b are electrically connected to the conductive line 260, and are electrically connected to the circuit portions of the different ceramic green sheets, respectively. Form first and second signal lines that are electrically independent.

Then, the green multilayer ceramic substrate is fired. At this time, the firing process of the microcrystalline multilayer ceramic substrate may perform non-shrinkage firing. For this purpose, although not illustrated, the firing is performed after laminating a ceramic green sheet for suppressing shrinkage on the uppermost surface of the microcrystalline multilayer ceramic substrate. By doing so, shrinkage in the main surface direction can be suppressed. The shrinkage inhibiting ceramic green sheet includes a non-sinterable material that starts firing at a temperature higher than the firing start temperature of the ceramic green sheet 210. When the firing process is finished, the restraining layer is easily removed by a cleaning process using an etchant. do.

Subsequently, as illustrated in FIG. 2 (d), the multilayer ceramic substrate having completed firing forms conductive lines so as to be electrically connected to the first via electrode and the second via electrode formed in one conductive via, respectively. A second signal line is formed.

That is, the multilayer ceramic substrate has a circuit portion formed of conductive vias and conductive lines formed in at least some ceramic layers of the plurality of ceramic layers, and at least one of the conductive vias is electrically insulated from each other in another region of the inner wall of the via hole of the conductive via. And a plurality of via electrode elements spaced apart from each other and formed along the thickness direction of the ceramic layer, and a dielectric or insulating material filled in the via holes of the conductive vias.

Therefore, the present invention can form a plurality of signal lines with one conductive via by forming a conductive via having multiple electrodes, thereby increasing the design freedom of the multilayer ceramic substrate, thereby manufacturing a highly integrated multilayer ceramic substrate.

FIG. 3 is a plan view illustrating the top surface A of the conductive via formed in the multilayer ceramic substrate illustrated in FIG. 2D.

As shown in FIG. 3, catch pads 250a and 250b are formed on upper surfaces A of the conductive vias, respectively, and on the upper surfaces of the first and second via electrode elements formed on both sides of the conductive via, respectively. Conductive lines 260 are formed to overlap 250a and 250b. At this time, the catch pads 250a and 250b are illustrated as having a semicircular shape, but the present invention is not limited thereto, and the catch pads 250a and 250b may have any shape as long as they can electrically connect the first via electrode element and the second via electrode element to the conductive line. It is possible.

The conductive line 260 is formed to overlap the catch pads 250a and 250b, but is not limited thereto. The conductive line 260 may be formed to be electrically connected to the via electrode element. As such, two signal lines are formed by conductive lines 260 respectively connected to the first via electrode element and the second via electrode element of the conductive via.

4 is a plan view illustrating a top surface A ′ of a conductive via having multiple electrodes according to another embodiment of the present invention.

As shown in FIG. 4, in the conductive via according to the present invention, not only two via electrode elements but also three or more via electrode elements may be formed, and conductive lines are formed in each via electrode element.

That is, a plurality of via electrode elements (not shown) are formed along the thickness direction of the ceramic layer so as to be spaced apart from each other on the inner wall of the via hole, and catch pads 470a, 470b, and 470c are formed on the upper surface of each via electrode element. And conductive lines 460 are formed on the catch pads 470a, 470b, and 470c and are electrically connected to the via electrode elements.

FIG. 5 is a vertical cross-sectional view of another embodiment of a conductive via having multiple electrodes manufactured according to the method of forming a conductive via shown in FIG. 1.

As shown in FIG. 5 (a), when the conductive via having multiple electrodes according to the present invention is formed such that the plurality of via electrode elements 530a and 530b are electrically insulated from each other in the via hole formed in the ceramic layer 510, It may not form a dielectric or insulating material.

As shown in FIG. 5B, conductive vias having multiple electrodes according to the present invention are spaced apart from each other so that the plurality of via electrode elements 530a and 530b are electrically insulated from each other in via holes formed in the ceramic layer 510. And the via electrode elements 530a and 530b may be formed to have a dielectric or insulating material 540 coated in such a manner that the via electrode elements 530a and 530b are electrically insulated from each other.

In this case, the method of coating with a dielectric or insulating material is the same as the method of forming the first and second via electrode elements described in FIGS. 1 and 2. However, a fourth mask layer for coating a dielectric or insulating material on the via electrode elements 530a and 530b is formed such that adjacent portions are opened while excluding the top surface of each via electrode element among the via holes formed in the ceramic green sheet. Then, the plurality of via electrode elements are coated with a dielectric or insulating material such that the plurality of via electrode elements are electrically insulated from each other, and then the fourth mask layer is removed and fired. As a result, a conductive via having multiple electrodes as shown in Fig. 5B is formed.

It is intended that the invention not be limited by the foregoing embodiments and the accompanying drawings, but rather by the claims appended hereto. It will be apparent to those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. something to do.

1 is a vertical cross-sectional view for each process for explaining a method of forming a conductive via having a multiple electrode according to an exemplary embodiment of the present invention.

2 is a vertical cross-sectional view for each process for explaining a method of manufacturing a multilayer ceramic substrate according to another embodiment of the present invention.

FIG. 3 is a plan view illustrating the top surface A of the conductive via formed in the multilayer ceramic substrate illustrated in FIG. 2D.

4 is a plan view illustrating a top surface A ′ of a conductive via having multiple electrodes according to another embodiment of the present invention.

FIG. 5 is a vertical cross-sectional view of another embodiment of a conductive via having multiple electrodes manufactured according to the method of forming a conductive via shown in FIG. 1.

Claims (22)

A ceramic laminate in which a plurality of ceramic layers are stacked; A circuit portion including at least one conductive via and conductive lines formed in at least some ceramic layers of the plurality of ceramic layers, At least one of the conductive vias is spaced apart from each other to be electrically insulated from another area of the inner wall of the via hole of the conductive via, and has a plurality of via electrode elements formed along the thickness direction of the ceramic layer. The method of claim 1, And the plurality of via electrode elements are formed in two portions of the via via of the corresponding conductive via facing each other. The method of claim 1, And the plurality of via electrode elements are formed in at least three via holes of the corresponding conductive vias. The method of claim 1, The plurality of via electrode elements include at least one metal of Ag, Cu, Mo, Ni, and Ag-Pd. The method of claim 1, Wherein at least one of the conductive vias further has a dielectric or insulating material filled inside the via hole of the conductive via so that the plurality of via electrode elements are electrically insulated from each other. The method of claim 1, At least one of the conductive vias further has a dielectric or insulating material coated on the plurality of via electrode elements such that the plurality of via electrode elements are electrically insulated from each other. The method according to claim 5 or 6, The dielectric or insulating material is a multilayer ceramic substrate, characterized in that the same material as the constituent material of the ceramic layer. The method according to claim 5 or 6, The dielectric or insulating material is a multilayer ceramic substrate, characterized in that the material different from the constituent material of the ceramic layer. The method of claim 1, And the plurality of via electrode elements are each electrically connected to a plurality of conductive lines. The method of claim 1, And a catch pad formed on an upper surface of the conductive via in which the plurality of via electrode elements are formed. Forming a via hole penetrating the upper and lower surfaces of the ceramic green sheet; And And forming a plurality of via electrode elements spaced apart from each other in the other region of the inner wall of the via hole to be electrically insulated from each other and along the thickness direction of the ceramic green sheet. The method of claim 11, Forming the plurality of via electrode elements, Forming a first mask layer on the ceramic green sheet to open a portion of the inner wall of the via hole; And And removing the first mask layer after forming a via electrode element on a portion of inner walls of the open via hole. The method of claim 12, Forming the plurality of via electrode elements, Forming a second mask layer on the ceramic green sheet so that other regions of the inner wall of the via hole spaced apart from the partial inner wall are opened; And And removing the second mask layer after forming a via electrode element in the other open area. The method according to claim 11 or 13, Forming a fourth mask layer on the ceramic green sheet to open some regions adjacent to the plurality of via electrode elements except for the plurality of via electrode elements in the via holes; And And removing the fourth mask layer after coating the plurality of via electrode elements with a dielectric or insulating material such that the plurality of via electrode elements are electrically insulated from each other, the conductive material having multiple electrodes. How to Form Vias. The method according to claim 11 or 13, Forming a third mask layer on the ceramic green sheet to open an area except the plurality of via electrode elements in the via hole; And And removing the third mask layer after filling the open region with a dielectric or insulating material such that the plurality of via electrode elements are electrically insulated from each other, forming the conductive via having multiple electrodes. Way. The method of claim 11, And forming catch pads on upper surfaces of the plurality of via electrode elements, respectively. Forming at least one via hole through the upper and lower surfaces of at least some of the plurality of ceramic green sheets; Forming a plurality of via electrode elements along the thickness direction of the ceramic green sheet so as to be spaced apart from each other in different regions of the inner wall of the via hole; Forming conductive lines electrically connected to the plurality of via electrode elements, respectively; Stacking the plurality of ceramic green sheets to form a micro multilayered ceramic substrate having a desired circuit portion; And Firing the microcrystalline multilayer ceramic substrate. The method of claim 17, Forming the plurality of via electrode elements, Forming a first mask layer on the ceramic green sheet to open a portion of the inner wall of the via hole; And And removing the first mask layer after forming a via electrode element on the inner wall of the open via hole. The method of claim 18, Forming the plurality of via electrode elements, Forming a second mask layer on the ceramic green sheet to open inner walls of other regions spaced apart from the inner walls of the via holes; And And removing the second mask layer after forming a via electrode element on the inner wall of the other open area. The method of claim 17 or 19, Before forming the conductive line, forming a fourth mask layer on the ceramic green sheet to open a portion of the via holes adjacent to the plurality of via electrode elements except for the plurality of via electrode elements; And And removing the fourth mask layer after coating the plurality of via electrode elements with a dielectric or insulating material to electrically insulate the plurality of via electrode elements from each other. Way. The method of claim 17 or 19, Before forming the conductive line, forming a third mask layer on the ceramic green sheet such that regions of the via holes other than the plurality of via electrode elements are opened; And And removing the third mask layer after filling the open area with a dielectric or insulating material to electrically insulate the plurality of via electrode elements from each other. The method of claim 17, Forming a catch pad on the upper surface of the plurality of via electrodes, respectively; The method of manufacturing a multilayer ceramic substrate further comprising.

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