JP4410574B2 - データビットストリーム中にテストジッタを注入するためのシステムおよび方法 - Google Patents

データビットストリーム中にテストジッタを注入するためのシステムおよび方法 Download PDF

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Publication number
JP4410574B2
JP4410574B2 JP2004025173A JP2004025173A JP4410574B2 JP 4410574 B2 JP4410574 B2 JP 4410574B2 JP 2004025173 A JP2004025173 A JP 2004025173A JP 2004025173 A JP2004025173 A JP 2004025173A JP 4410574 B2 JP4410574 B2 JP 4410574B2
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Japan
Prior art keywords
voltage
jitter
current
output
differential
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Expired - Lifetime
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JP2004025173A
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English (en)
Japanese (ja)
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JP2004242304A5 (https=
JP2004242304A (ja
Inventor
フランシィス・ジョセフ
クラウス・ディ・ヒィリゲス
チェリル・エル・オウエン
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Verigy Singapore Pte Ltd
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Verigy Singapore Pte Ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/24—Testing correct operation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/0272—Arrangements for coupling to multiple lines, e.g. for differential transmission

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Electronic Switches (AREA)
  • Manipulation Of Pulses (AREA)
JP2004025173A 2003-02-06 2004-02-02 データビットストリーム中にテストジッタを注入するためのシステムおよび方法 Expired - Lifetime JP4410574B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/360,159 US7184469B2 (en) 2003-02-06 2003-02-06 Systems and methods for injection of test jitter in data bit-streams

Publications (3)

Publication Number Publication Date
JP2004242304A JP2004242304A (ja) 2004-08-26
JP2004242304A5 JP2004242304A5 (https=) 2007-04-05
JP4410574B2 true JP4410574B2 (ja) 2010-02-03

Family

ID=32771369

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004025173A Expired - Lifetime JP4410574B2 (ja) 2003-02-06 2004-02-02 データビットストリーム中にテストジッタを注入するためのシステムおよび方法

Country Status (3)

Country Link
US (1) US7184469B2 (https=)
JP (1) JP4410574B2 (https=)
DE (1) DE10348327B4 (https=)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7315574B2 (en) * 2004-05-03 2008-01-01 Dft Microsystems, Inc. System and method for generating a jittered test signal
US7480329B2 (en) * 2004-10-29 2009-01-20 Agilent Technologies, Inc. Method of finding data dependent timing and voltage jitter for different bits in an arbitrary digital signal in accordance with selected surrounding bits
US7369605B2 (en) * 2004-12-15 2008-05-06 Spirent Communications Method and device for injecting a differential current noise signal into a paired wire communication link
JP4806679B2 (ja) * 2005-06-01 2011-11-02 株式会社アドバンテスト ジッタ発生回路
JP4384207B2 (ja) * 2007-06-29 2009-12-16 株式会社東芝 半導体集積回路
US8194721B2 (en) * 2008-05-23 2012-06-05 Integrated Device Technology, Inc Signal amplitude distortion within an integrated circuit
US8179952B2 (en) * 2008-05-23 2012-05-15 Integrated Device Technology Inc. Programmable duty cycle distortion generation circuit

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3325730A (en) * 1963-12-23 1967-06-13 Hughes Aircraft Co Pulse time jitter measuring system
US3937945A (en) * 1974-06-25 1976-02-10 The United States Of America As Represented By The United States National Aeronautics And Space Administration Office Of General Counsel-Code Gp Apparatus for simulating optical transmission links
US6466072B1 (en) * 1998-03-30 2002-10-15 Cypress Semiconductor Corp. Integrated circuitry for display generation
DE60100114T2 (de) 2001-04-03 2003-10-02 Agilent Technologies Inc., A Delaware Corp. Filter zur Einspeisung von datenabhängigem Jitter und Pegelgeräusch
US6847232B2 (en) * 2001-11-08 2005-01-25 Texas Instruments Incorporated Interchangeable CML/LVDS data transmission circuit
US6958640B2 (en) * 2003-12-31 2005-10-25 Intel Corporation Interpolation delay cell for 2ps resolution jitter injector in optical link transceiver

Also Published As

Publication number Publication date
DE10348327A1 (de) 2004-08-26
US20040156429A1 (en) 2004-08-12
DE10348327B4 (de) 2009-06-25
US7184469B2 (en) 2007-02-27
JP2004242304A (ja) 2004-08-26

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