DE10348327B4 - Systeme und Verfahren zum Einbringen von Test-Jitter in Daten-Bit-Ströme - Google Patents

Systeme und Verfahren zum Einbringen von Test-Jitter in Daten-Bit-Ströme Download PDF

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Publication number
DE10348327B4
DE10348327B4 DE10348327A DE10348327A DE10348327B4 DE 10348327 B4 DE10348327 B4 DE 10348327B4 DE 10348327 A DE10348327 A DE 10348327A DE 10348327 A DE10348327 A DE 10348327A DE 10348327 B4 DE10348327 B4 DE 10348327B4
Authority
DE
Germany
Prior art keywords
jitter
voltage
test
output signal
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE10348327A
Other languages
German (de)
English (en)
Other versions
DE10348327A1 (de
Inventor
Francis Sunnyvale Joseph
Klaus D. Mountain View Hilliges
Cheryl L. Cupertino Owen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantest Singapore Pte Ltd
Original Assignee
Verigy Singapore Pte Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Verigy Singapore Pte Ltd filed Critical Verigy Singapore Pte Ltd
Publication of DE10348327A1 publication Critical patent/DE10348327A1/de
Application granted granted Critical
Publication of DE10348327B4 publication Critical patent/DE10348327B4/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/24—Testing correct operation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/0272—Arrangements for coupling to multiple lines, e.g. for differential transmission

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Electronic Switches (AREA)
  • Manipulation Of Pulses (AREA)
DE10348327A 2003-02-06 2003-10-17 Systeme und Verfahren zum Einbringen von Test-Jitter in Daten-Bit-Ströme Expired - Fee Related DE10348327B4 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/360159 2003-02-06
US10/360,159 US7184469B2 (en) 2003-02-06 2003-02-06 Systems and methods for injection of test jitter in data bit-streams

Publications (2)

Publication Number Publication Date
DE10348327A1 DE10348327A1 (de) 2004-08-26
DE10348327B4 true DE10348327B4 (de) 2009-06-25

Family

ID=32771369

Family Applications (1)

Application Number Title Priority Date Filing Date
DE10348327A Expired - Fee Related DE10348327B4 (de) 2003-02-06 2003-10-17 Systeme und Verfahren zum Einbringen von Test-Jitter in Daten-Bit-Ströme

Country Status (3)

Country Link
US (1) US7184469B2 (https=)
JP (1) JP4410574B2 (https=)
DE (1) DE10348327B4 (https=)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7315574B2 (en) * 2004-05-03 2008-01-01 Dft Microsystems, Inc. System and method for generating a jittered test signal
US7480329B2 (en) * 2004-10-29 2009-01-20 Agilent Technologies, Inc. Method of finding data dependent timing and voltage jitter for different bits in an arbitrary digital signal in accordance with selected surrounding bits
US7369605B2 (en) * 2004-12-15 2008-05-06 Spirent Communications Method and device for injecting a differential current noise signal into a paired wire communication link
JP4806679B2 (ja) * 2005-06-01 2011-11-02 株式会社アドバンテスト ジッタ発生回路
JP4384207B2 (ja) * 2007-06-29 2009-12-16 株式会社東芝 半導体集積回路
US8194721B2 (en) * 2008-05-23 2012-06-05 Integrated Device Technology, Inc Signal amplitude distortion within an integrated circuit
US8179952B2 (en) * 2008-05-23 2012-05-15 Integrated Device Technology Inc. Programmable duty cycle distortion generation circuit

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3325730A (en) * 1963-12-23 1967-06-13 Hughes Aircraft Co Pulse time jitter measuring system
US3937945A (en) * 1974-06-25 1976-02-10 The United States Of America As Represented By The United States National Aeronautics And Space Administration Office Of General Counsel-Code Gp Apparatus for simulating optical transmission links
EP1162739A1 (en) * 2001-04-03 2001-12-12 Agilent Technologies, Inc. (a Delaware corporation) Filter injecting data dependent jitter and level noise
US6466072B1 (en) * 1998-03-30 2002-10-15 Cypress Semiconductor Corp. Integrated circuitry for display generation

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6847232B2 (en) * 2001-11-08 2005-01-25 Texas Instruments Incorporated Interchangeable CML/LVDS data transmission circuit
US6958640B2 (en) * 2003-12-31 2005-10-25 Intel Corporation Interpolation delay cell for 2ps resolution jitter injector in optical link transceiver

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3325730A (en) * 1963-12-23 1967-06-13 Hughes Aircraft Co Pulse time jitter measuring system
US3937945A (en) * 1974-06-25 1976-02-10 The United States Of America As Represented By The United States National Aeronautics And Space Administration Office Of General Counsel-Code Gp Apparatus for simulating optical transmission links
US6466072B1 (en) * 1998-03-30 2002-10-15 Cypress Semiconductor Corp. Integrated circuitry for display generation
EP1162739A1 (en) * 2001-04-03 2001-12-12 Agilent Technologies, Inc. (a Delaware corporation) Filter injecting data dependent jitter and level noise

Also Published As

Publication number Publication date
DE10348327A1 (de) 2004-08-26
US20040156429A1 (en) 2004-08-12
JP4410574B2 (ja) 2010-02-03
US7184469B2 (en) 2007-02-27
JP2004242304A (ja) 2004-08-26

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8127 New person/name/address of the applicant

Owner name: VERIGY (SINGAPORE) PTE. LTD., SINGAPORE, SG

8364 No opposition during term of opposition
R082 Change of representative

Representative=s name: SCHOPPE, ZIMMERMANN, STOECKELER, ZINKLER & PAR, DE

Representative=s name: SCHOPPE, ZIMMERMANN, STOECKELER, ZINKLER & PARTNER

R081 Change of applicant/patentee

Owner name: ADVANTEST (SINGAPORE) PTE. LTD., SG

Free format text: FORMER OWNER: VERIGY (SINGAPORE) PTE. LTD., SINGAPORE, SG

Effective date: 20120515

R082 Change of representative

Representative=s name: SCHOPPE, ZIMMERMANN, STOECKELER, ZINKLER, SCHE, DE

Effective date: 20120515

Representative=s name: SCHOPPE, ZIMMERMANN, STOECKELER, ZINKLER & PAR, DE

Effective date: 20120515

R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee