JP4327144B2 - Pll回路におけるアクティブフィルタ。 - Google Patents

Pll回路におけるアクティブフィルタ。 Download PDF

Info

Publication number
JP4327144B2
JP4327144B2 JP2005289043A JP2005289043A JP4327144B2 JP 4327144 B2 JP4327144 B2 JP 4327144B2 JP 2005289043 A JP2005289043 A JP 2005289043A JP 2005289043 A JP2005289043 A JP 2005289043A JP 4327144 B2 JP4327144 B2 JP 4327144B2
Authority
JP
Japan
Prior art keywords
charge pump
circuit
filter
voltage
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2005289043A
Other languages
English (en)
Japanese (ja)
Other versions
JP2007104132A (ja
JP2007104132A5 (https=
Inventor
確 長谷川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Semiconductor Ltd
Original Assignee
Fujitsu Semiconductor Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Semiconductor Ltd filed Critical Fujitsu Semiconductor Ltd
Priority to JP2005289043A priority Critical patent/JP4327144B2/ja
Priority to US11/318,608 priority patent/US7782144B2/en
Publication of JP2007104132A publication Critical patent/JP2007104132A/ja
Publication of JP2007104132A5 publication Critical patent/JP2007104132A5/ja
Application granted granted Critical
Publication of JP4327144B2 publication Critical patent/JP4327144B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H03L7/0893Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump the up-down pulses controlling at least two source current generators or at least two sink current generators connected to different points in the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Networks Using Active Elements (AREA)
JP2005289043A 2005-09-30 2005-09-30 Pll回路におけるアクティブフィルタ。 Expired - Fee Related JP4327144B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2005289043A JP4327144B2 (ja) 2005-09-30 2005-09-30 Pll回路におけるアクティブフィルタ。
US11/318,608 US7782144B2 (en) 2005-09-30 2005-12-28 Active filter in PLL circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005289043A JP4327144B2 (ja) 2005-09-30 2005-09-30 Pll回路におけるアクティブフィルタ。

Publications (3)

Publication Number Publication Date
JP2007104132A JP2007104132A (ja) 2007-04-19
JP2007104132A5 JP2007104132A5 (https=) 2007-07-12
JP4327144B2 true JP4327144B2 (ja) 2009-09-09

Family

ID=37901323

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005289043A Expired - Fee Related JP4327144B2 (ja) 2005-09-30 2005-09-30 Pll回路におけるアクティブフィルタ。

Country Status (2)

Country Link
US (1) US7782144B2 (https=)
JP (1) JP4327144B2 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010252094A (ja) * 2009-04-16 2010-11-04 Renesas Electronics Corp Pll回路
US10014867B1 (en) * 2016-12-28 2018-07-03 AUCMOS Technologies USA, Inc. Low-jitter phase-locked loop circuit

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03136522A (ja) 1989-10-23 1991-06-11 Mitsubishi Electric Corp 位相同期回路
US5297231A (en) * 1992-03-31 1994-03-22 Compaq Computer Corporation Digital signal processor interface for computer system
JP2778421B2 (ja) 1993-09-07 1998-07-23 日本電気株式会社 チャージポンプ型位相同期ループ
JP2919321B2 (ja) 1995-10-27 1999-07-12 埼玉日本電気株式会社 Pllシンセサイザ
JPH1168560A (ja) 1997-08-20 1999-03-09 Nec Corp Pll周波数シンセサイザおよびチャージポンプ回路
US6040742A (en) * 1997-09-02 2000-03-21 Lucent Technologies Inc. Charge-pump phase-locked loop with DC current source
US6611160B1 (en) * 2000-11-21 2003-08-26 Skyworks Solutions, Inc. Charge pump having reduced switching noise
WO2003098807A1 (en) 2002-05-22 2003-11-27 Matsushita Electric Industrial Co.,Ltd. Low-pass filter for a pll, phase-locked loop and semiconductor integrated circuit
US6963232B2 (en) * 2003-08-11 2005-11-08 Rambus, Inc. Compensator for leakage through loop filter capacitors in phase-locked loops
JP2005094427A (ja) 2003-09-18 2005-04-07 Renesas Technology Corp 通信用半導体集積回路
JP2005167536A (ja) 2003-12-02 2005-06-23 Renesas Technology Corp 通信用半導体集積回路および無線通信システム
US7015735B2 (en) 2003-12-19 2006-03-21 Renesas Technology Corp. Semiconductor integrated circuit having built-in PLL circuit
TWI233265B (en) * 2004-06-18 2005-05-21 Via Tech Inc Phase locked loop circuit
US7427900B2 (en) * 2004-12-30 2008-09-23 Silicon Laboratories Inc. Integrated PLL loop filter and charge pump

Also Published As

Publication number Publication date
US20070075788A1 (en) 2007-04-05
JP2007104132A (ja) 2007-04-19
US7782144B2 (en) 2010-08-24

Similar Documents

Publication Publication Date Title
US7689191B2 (en) Semiconductor integrated circuit having built-in PLL circuit
US7405627B2 (en) PLL frequency synthesizer
US8854094B2 (en) Phase locked loop
JP2011142668A (ja) ループフィルタ部品を低減するために二重経路およびデュアルバラクタを用いるタイプii位相ロックループ
TWI684329B (zh) 用於迴路電路之基於電壓調節器的迴路濾波器以及迴路濾波方法
US7180377B1 (en) Method and apparatus for a hybrid phase lock loop frequency synthesizer
US11777507B2 (en) Phase-locked loop (PLL) with direct feedforward circuit
CN101325416A (zh) 电压控制振荡器与锁相环
US7741889B2 (en) Phase locked loop with phase rotation for spreading spectrum
US7327195B2 (en) PLL frequency synthesizer
CN1839548B (zh) 锁相环滤波器
US20090237036A1 (en) Frequency synthesizer and loop filter used therein
CN101753138B (zh) 双环路频率综合器及其相位噪声分析方法
JP4327144B2 (ja) Pll回路におけるアクティブフィルタ。
JP2001320235A (ja) 電圧制御発振器
KR100918860B1 (ko) 루프필터 보상회로를 구비하는 주파수 합성기
JP3659630B2 (ja) 電圧参照回路およびそれを用いた半導体回路装置
US7277519B2 (en) Frequency and phase correction in a phase-locked loop (PLL)
US20110227617A1 (en) Phase locked loop circuit and system having the same
US7750741B2 (en) PLL circuit and semiconductor device
US7408418B2 (en) Phase locked loop circuit having reduced lock time
CN209805792U (zh) 锁相环频率综合器
US20070103247A1 (en) Pll transient response control system and communication system
CN119010893A (zh) 压控振荡器、锁相环
JP2004343508A (ja) 周波数変換装置

Legal Events

Date Code Title Description
A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070525

A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A712

Effective date: 20080730

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20081009

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20081021

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20081222

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20090224

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20090423

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20090609

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20090610

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120619

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120619

Year of fee payment: 3

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

S533 Written request for registration of change of name

Free format text: JAPANESE INTERMEDIATE CODE: R313533

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120619

Year of fee payment: 3

R371 Transfer withdrawn

Free format text: JAPANESE INTERMEDIATE CODE: R371

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

S533 Written request for registration of change of name

Free format text: JAPANESE INTERMEDIATE CODE: R313533

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120619

Year of fee payment: 3

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120619

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130619

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140619

Year of fee payment: 5

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313113

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313111

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees