JP4210207B2 - 高周波用配線基板 - Google Patents
高周波用配線基板 Download PDFInfo
- Publication number
- JP4210207B2 JP4210207B2 JP2003397233A JP2003397233A JP4210207B2 JP 4210207 B2 JP4210207 B2 JP 4210207B2 JP 2003397233 A JP2003397233 A JP 2003397233A JP 2003397233 A JP2003397233 A JP 2003397233A JP 4210207 B2 JP4210207 B2 JP 4210207B2
- Authority
- JP
- Japan
- Prior art keywords
- conductor
- ground conductor
- wiring board
- line
- line conductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Non-Reversible Transmitting Devices (AREA)
Description
4a,4b・・・線路導体
7・・・・・・・高抵抗体部
8・・・・・・・同一面接地導体
9・・・・・・・接続導体
10・・・・・・・接地導体
Claims (4)
- 誘電体基板と、
該誘電体基板の一主面に形成された高周波信号伝送用の線路導体と、
前記誘電体基板の一主面における前記線路導体の片側に、前記線路導体に沿って該線路導体と所定の間隔をもって配置された線状の同一面接地導体と、
前記誘電体基板の他主面に形成された接地導体と、
該接地導体と前記同一面接地導体とを電気的に接続する接続導体と、
前記線路導体の一端部と前記同一面接地導体の一端部とを電気的に接続する高抵抗体部とを具備しており、
前記線路導体と前記接地導体との間の距離をHとし、前記線路導体と前記同一面接地導体との間の距離をSとしたときに、S<H/2である高周波用配線基板。 - 前記同一面接地導体は、高抵抗体部との接続部から他端部までの長さが0.5mm以上である請求項1記載の高周波用配線基板。
- 前記線路導体は、前記同一面接地導体に隣接した部位がその他の部位よりも細い請求項1または請求項2記載の高周波用配線基板。
- 前記線路導体、前記同一面接地導体、および前記高抵抗体部は、それぞれ直線状に延在し、
前記同一面接地導体は、前記線路導体に平行に配置され、
前記高抵抗体部の延在方向は、前記同一面接地導体および前記線路導体の延在方向に垂直である請求項1乃至請求項3のいずれかに記載の高周波用配線基板。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003397233A JP4210207B2 (ja) | 2003-11-27 | 2003-11-27 | 高周波用配線基板 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003397233A JP4210207B2 (ja) | 2003-11-27 | 2003-11-27 | 高周波用配線基板 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005159127A JP2005159127A (ja) | 2005-06-16 |
JP4210207B2 true JP4210207B2 (ja) | 2009-01-14 |
Family
ID=34722440
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2003397233A Expired - Fee Related JP4210207B2 (ja) | 2003-11-27 | 2003-11-27 | 高周波用配線基板 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4210207B2 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008085699A (ja) * | 2006-09-28 | 2008-04-10 | Kyocera Corp | 高周波用終端抵抗基板および電子装置 |
US20100308940A1 (en) * | 2008-01-30 | 2010-12-09 | Kyocera Corporation | High Frequency Wiring Board, Package for Housing Electronic Component, Electronic Device, and Communication Apparatus |
-
2003
- 2003-11-27 JP JP2003397233A patent/JP4210207B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2005159127A (ja) | 2005-06-16 |
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