JP4203925B2 - 樹脂封止型半導体装置 - Google Patents
樹脂封止型半導体装置 Download PDFInfo
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- JP4203925B2 JP4203925B2 JP2005070667A JP2005070667A JP4203925B2 JP 4203925 B2 JP4203925 B2 JP 4203925B2 JP 2005070667 A JP2005070667 A JP 2005070667A JP 2005070667 A JP2005070667 A JP 2005070667A JP 4203925 B2 JP4203925 B2 JP 4203925B2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16245—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
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- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
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- H01L2225/1029—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support the support being a lead frame
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- H—ELECTRICITY
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- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
- H01L2225/1047—Details of electrical connections between containers
- H01L2225/1058—Bump or bump-like electrical connections, e.g. balls, pillars, posts
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
- H01L2924/1533—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate
- H01L2924/15331—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate being a ball array, e.g. BGA
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- H01—ELECTRIC ELEMENTS
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
- H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
- H01L2924/18161—Exposing the passive side of the semiconductor or solid-state body of a flip chip
Description
インナーリードの第1の導電性バンプと接触する部分に凸部が形成され、前記 凸部が前記第1の導電性バンプに食い込んで接続していることを特徴とする請求項1に記載の樹脂封止型半導体装置。
2 枠部
3 開口領域
4 ダイパッド
5 吊りリード部
6 インナーリード
7 半導体素子
8 電極
9 金属細線
10 封止樹脂
11 パッケージ
12 外部端子
13 封止金型
14 リードフレーム
15 フレーム枠
16 インナーリード
17 突出部
18 段差
19 第1の半導体チップ
20 第1の電極
21 第1の導電性バンプ
22 ボール電極
23 第2の電極
24 第2の導電性バンプ
25 第2の半導体チップ
26 封止樹脂
27 第1の樹脂封止型半導体装置
28 第2の樹脂封止型半導体装置
29 封止金型
30 シート
Claims (9)
- 第1の半導体チップと、前記第1の半導体チップの第1の電極に形成された第1の導電性バンプと、その表面が前記第1の導電性バンプに接続し、前記第1の半導体チップの周辺よりも外方まで延在する複数のインナーリードと、前記複数のインナーリードの表面において、前記第1の半導体チップの周辺よりも外方に設けられた突出部と、前記突出部の外側に設けられた段差部と、前記複数のインナーリードの先端部によって囲まれた領域内で、前記第1の半導体チップの第2の電極と第2の導電性バンプによって電気的に接続され、前記第1の半導体チップの周辺よりも内側に位置する第2の半導体チップと、前記第1の半導体チップの表面、前記第2の半導体チップの表面、前記第1の導電性バンプ、前記第2の導電性バンプおよび前記段差部を封止した封止樹脂とからなり、前記突出部の表面は前記封止樹脂の外面および前記第1の半導体チップの裏面と同一面であることを特徴とする樹脂封止型半導体装置。
- 第1の半導体チップの裏面と封止樹脂の外面とは同一面であることを特徴とする請求項1に記載の樹脂封止型半導体装置。
- インナーリードの裏面と封止樹脂の外面とは同一面であることを特徴とする請求項1に記載の樹脂封止型半導体装置。
- インナーリードは内側の先端部に向かって、突出部側に徐々に傾いていることを特徴とする請求項1に記載の樹脂封止型半導体装置。
- 突出部にボール電極が形成されていることを特徴とする請求項1に記載の樹脂封止型半導体装置。
- インナーリードの突出部の表面の一部に絶縁性薄膜が形成され、前記突出部の表面のうち、前記絶縁性薄膜が形成された部分を除いた部分が外部端子であることを特徴とする請求項1に記載の樹脂封止型半導体装置。
- 請求項1に記載の樹脂封止型半導体装置を積載した樹脂封止型半導体装置であって、第1の樹脂封止型半導体装置のインナーリードの裏面と第2の樹脂封止型半導体装置の突出部とが電気的に接続されていることを特徴とする樹脂封止型半導体装置。
- 樹脂封止型半導体装置が3個以上積載されたことを特徴とする請求項7に記載の樹脂封止型半導体装置。
- インナーリードの第1の導電性バンプと接触する部分に凸部が形成され、前記凸部が前記第1の導電性バンプに食い込んで接続していることを特徴とする請求項1に記載の樹脂封止型半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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JP2005070667A JP4203925B2 (ja) | 2005-03-14 | 2005-03-14 | 樹脂封止型半導体装置 |
Applications Claiming Priority (1)
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JP2005070667A JP4203925B2 (ja) | 2005-03-14 | 2005-03-14 | 樹脂封止型半導体装置 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2002319747A Division JP3736516B2 (ja) | 2002-11-01 | 2002-11-01 | リードフレームおよびその製造方法ならびに樹脂封止型半導体装置およびその製造方法 |
Publications (2)
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JP2005167292A JP2005167292A (ja) | 2005-06-23 |
JP4203925B2 true JP4203925B2 (ja) | 2009-01-07 |
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JP2005070667A Expired - Fee Related JP4203925B2 (ja) | 2005-03-14 | 2005-03-14 | 樹脂封止型半導体装置 |
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Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007042786A (ja) * | 2005-08-02 | 2007-02-15 | Sony Corp | マイクロデバイス及びそのパッケージング方法 |
CN100395888C (zh) * | 2005-09-30 | 2008-06-18 | 矽品精密工业股份有限公司 | 半导体封装件及其制法 |
JP2007165836A (ja) * | 2005-11-18 | 2007-06-28 | Shinko Electric Ind Co Ltd | 半導体装置 |
JP5553960B2 (ja) * | 2007-10-25 | 2014-07-23 | スパンション エルエルシー | 半導体装置及びその製造方法 |
KR102605701B1 (ko) * | 2022-06-20 | 2023-11-29 | 해성디에스 주식회사 | 반도체 패키지 및 이의 제조 방법 |
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- 2005-03-14 JP JP2005070667A patent/JP4203925B2/ja not_active Expired - Fee Related
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