JP4187352B2 - Build-up multilayer printed wiring board and manufacturing method of build-up multilayer printed wiring board - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a build-up multilayer printed wiring board that can be used for a package substrate on which an electronic component such as an IC chip is placed. In particular, a build-up multilayer printed wiring board and a build-up multilayer printed wiring board formed by building up an interlayer resin insulation layer on a core substrate. the method of manufacturing the present invention relates.
[0002]
[Prior art]
Conventionally, a build-up multilayer printed wiring board is manufactured by, for example, a method disclosed in JP-A-9-130050.
That is, an interlayer resin insulation layer is laminated on a core substrate in which through holes are formed, and a circuit pattern is formed on the interlayer resin insulation layer. By repeating this, a build-up multilayer printed wiring board is obtained.
[0003]
[Problems to be solved by the invention]
Currently, when a through hole is formed in a core substrate, a through hole is formed by a drill. For this reason, 300 μm is the minimum limit as the diameter of the through hole, and the density of the through hole could not be increased by more than the value determined by the drill diameter. For this reason, a method of drilling a through hole with a laser in the core substrate has been studied. However, since the core substrate has a thickness of about 1 mm, it is difficult to form a fine through hole.
[0004]
On the other hand, in a multilayer printed wiring board used as a package substrate, it is necessary to efficiently dissipate heat generated in the IC chip. Here, the multilayer printed wiring board is formed by laminating an interlayer resin insulating layer and a wiring layer of several tens of μm on a core substrate made of a laminated resin board of about 1 mm. For this reason, the core substrate occupies most of the thickness of the multilayer printed wiring board. That is, the core substrate is a cause of increasing the thickness of the multilayer printed wiring board and lowering the thermal conductivity.
[0005]
The present invention has been made to solve the above problems, it is an object with can enhance the arrangement density of the through-hole build-up can be thinned multilayer printed wiring board and the build-up multilayer printed It is providing the manufacturing method of a wiring board.
[0007]
[Means for Solving the Problems]
In order to solve the above-described problem, in claim 1,
In a build-up multilayer printed wiring board formed by building up an interlayer resin insulation layer on a core substrate having conductor circuits formed on the front and back surfaces ,
The core board is made by sandwiching a resin of the circuit pattern 2 layers, a non-through hole leading to the circuit pattern formed on the resin Rukoto be filled with plating, technical characterized in that a through hole And
[0008]
A second aspect of the present invention is a manufacturing method of a build-up multilayer printed wiring board, comprising at least the following steps (A) to ( D ):
(A) A step of forming a resin insulating layer on a resin insulating layer having a circuit pattern formed on the upper surface to form a core substrate;
(B) forming a non-through hole in the resin insulating layer of the core substrate that reaches the circuit pattern with a laser;
(C) filling the non-through holes of the resin insulation layer with plating to form through holes ;
(D) A step of building up an interlayer resin insulation layer on the core substrate .
[0009]
A third aspect of the present invention is a method for producing a build-up multilayer printed wiring board, comprising at least the following steps (A) to ( E ):
(A) forming a circuit pattern by etching a metal layer of a single-sided metal-clad resin plate formed by laminating a metal layer on a resin insulating layer ;
(B) on the circuit pattern, the step of the paste core substrate resin film made of a resin insulating layer;
(C) forming a non-through hole in the resin insulating layer of the core substrate that reaches the circuit pattern with a laser;
(D) filling the non-through holes of the resin insulating layer with plating to form through holes ;
(E) A step of building up an interlayer resin insulation layer on the core substrate .
[0010]
A fourth aspect of the present invention is a method for producing a build-up multilayer printed wiring board, comprising at least the following steps (A) to ( F ):
(A) forming a circuit pattern by etching a metal layer of a single-sided metal-clad resin plate formed by laminating a metal layer on a resin insulating layer ;
(B) A step of applying a resin on the circuit pattern and then polishing to flatten the circuit pattern;
(C) A step of attaching a resin film to be a resin insulating layer on the circuit pattern to form a core substrate;
(D) forming a non-through hole in the resin insulating layer of the core substrate that reaches the circuit pattern with a laser;
(E) filling the non-through holes of the resin insulating layer with plating to form through holes ;
(F) A step of building up an interlayer resin insulation layer on the core substrate .
[0011]
In claim 1 of the multilayer printed wiring board and a method for manufacturing a multilayer printed wiring board according to claim 2, in order to maintain the strength of the core substrate by sandwiching the circuit pattern with a resin, it is possible to form a thin core substrate, multilayer The thickness of the printed wiring board can be reduced. Further, since a non-through hole reaching the circuit pattern may be formed in the resin layer, the depth of the through hole drilled by the laser is less than half that of the conventional core substrate. Therefore, a fine non-through hole can be easily formed by a laser, and a small-diameter through hole can be formed, so that the degree of integration of the multilayer printed wiring board can be increased. Furthermore, since the core substrate is a multilayer, it is possible to Torimawasu the wiring circuit pattern between the resin constituting the core substrate, it is possible to reduce the number of layers of the multilayer printed wiring board.
[0012]
In the method for producing a multilayer printed wiring board according to claims 3 and 4 , since the strength of the core substrate is maintained by sandwiching the circuit pattern with resin, the core substrate can be formed thin, and the thickness of the multilayer printed wiring board is reduced. be able to. Further, since a non-through hole reaching the circuit pattern may be formed in the resin layer, the depth of the through hole drilled by the laser is less than half that of the conventional core substrate. Therefore, a fine non-through hole can be easily formed by a laser, and a small-diameter through hole can be formed, so that the degree of integration of the multilayer printed wiring board can be increased. Furthermore, since the core substrate is multilayered, wiring can be routed with a circuit pattern between the resins constituting the core substrate, and the number of layers of the multilayer printed wiring board can be reduced.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
First, the configuration of the multilayer printed wiring board according to the first embodiment of the present invention will be described with reference to FIG. 6 showing a sectional view.
As shown in FIG. 6, in the multilayer printed wiring board 10, conductor circuits 34, 34 are formed on the front and back surfaces of the core substrate 30, and interlayer resin insulation layers 40, 40 are further formed on the conductor circuits 34, 34. Is formed. The interlayer resin insulation layer 40 is provided with vias 52 and conductor circuits 54, and solder resists 60, 60 are formed on the interlayer resin insulation layers 40, 40. Solder bumps 68 are formed on the via 52 and the conductor circuit 54 through the opening 62.
[0014]
In the multilayer printed wiring board of the present embodiment, the core substrate 30 includes a metal layer (circuit pattern) 18 sandwiched between the lower insulating layer 14 and the upper insulating layer 20. Here, the through holes 36 are formed by providing the vias 32 so as to correspond to the upper and lower sides of the circuit pattern 18. On the other hand, the wirings are routed through the circuit pattern 18 by shifting the positions of the upper and lower vias 32 of the circuit pattern 18.
[0015]
In this embodiment, since the strength is maintained by sandwiching the metal layer (circuit pattern) 18 between the resins (insulating layers) 20 and 14, the core substrate 30 can be formed thin, and the thickness of the multilayer printed wiring board is reduced. , Heat conductivity can be increased.
[0016]
In the present embodiment, a non-through hole 22 reaching the metal layer 18 is formed in the lower insulating layer 14 and the upper insulating layer 20 of the core substrate 30 by laser processing, and the via 32 is formed by filling with plating. Here, since the non-through hole 22 reaching the metal layer 18 may be formed in the lower insulating layer 14 and the upper insulating layer 20, the depth of the through hole drilled by the laser is half that of the conventional core substrate. It becomes the following. That is, in the prior art, it was necessary to drill through holes for through holes in a substrate corresponding to the thickness of the lower insulating layer 14 and the upper insulating layer 20 added. On the other hand, in the present embodiment, since the through holes may be separately formed in the lower insulating layer 14 and the upper insulating layer 20, the depth of the through holes is halved. Therefore, a fine non-through hole can be easily formed by a laser, and a small-diameter through hole can be formed, so that the degree of integration of the multilayer printed wiring board can be increased.
[0017]
Furthermore, since the core substrate 30 is multilayered, wiring can be routed by the metal layer (circuit pattern) 18 between the lower insulating layer 14 and the upper insulating layer 20 constituting the core substrate, and the number of layers of the multilayer printed wiring board Can be reduced.
[0018]
Next, a method for manufacturing the multilayer printed wiring board described above with reference to FIG. 6 will be described with reference to FIGS.
(1) A single-sided copper-clad board 10 in which a copper foil 122 having a thickness of 5 to 50 μm is laminated on the upper surface of a substrate (lower insulating layer) 14 made of a resin having a thickness of 30 to 200 μm is used as a starting material (step of FIG. A)). Here, the lower insulating layer 14 does not have a core material such as glass cloth or aramid cloth other than a glass cloth or an aramid cloth dipped in epoxy, BT (bismaleimide triazine), polyimide or olefin. A resin or a resin film laminated with a reinforcing resin layer can be used.
[0019]
First, the circuit pattern 18 is formed on the upper surface of the substrate 14 by etching the single-sided copper-clad plate 10 into a pattern (step (B)). Then, a film 20α made of a resin having a thickness of 30 to 200 μm is pressed and pasted on the circuit pattern 18 (step (C)). Here, as the resin film 20α, epoxy resin, BT, polyimide, olefin soaked in the above-described glass cloth or araimide cloth, and further, a resin having no core material such as glass cloth, araimide cloth, or the like is used. Can do. That is, the lower insulating layer 14 and the upper insulating layer 20 can be made of the same material or different materials, but the characteristics of the multilayer printed wiring board are the same material and structure (core material). Or not) is desirable. On the other hand, if materials of different materials / configurations are used, the range of materials selection is expanded. In addition, the intensity | strength of the core board | substrate 30 can be raised by comprising the lower insulating layer 14 and the upper insulating layer 20 with resin which has core materials, such as glass cloth and an aramid cloth. On the other hand, by not using the core material, metal migration through the core material is eliminated, and insulation between the through holes can be maintained for a long time. Here, although the resin film is affixed, it is also possible to harden after apply | coating resin instead of this.
[0020]
Thereafter, the resin film 20α is heated and cured to form the upper insulating layer 20, and then an opening diameter of 100 to 250 μm reaching the circuit 18 pattern in the upper insulating layer 20 and the lower insulating layer 14 by a CO 2 laser, a YAG laser or an excimer laser. The non-through hole 22 is formed (step (D)). In the present embodiment, since the upper insulating layer 20 and the lower insulating layer 14 are as thin as 30 to 200 μm, fine holes can be formed with a laser.
[0021]
After the desmear treatment, a palladium catalyst is applied and immersed in an electroless plating solution to deposit an electroless plating film 24 having a thickness of 15 μm uniformly on the surface of the core substrate 30 (step (E)). Here, electroless plating is used, but a metal film such as copper or nickel can be formed by sputtering. Sputtering is disadvantageous in terms of cost, but has an advantage of improving adhesion with the resin.
[0022]
Subsequently, a photosensitive dry film is pasted on the surface of the core substrate 30, a mask is placed, exposure and development are performed, and a plating resist 26 having a thickness of 15 μm is formed (step (F) in FIG. 2). Then, the core substrate 30 is immersed in an electroless plating solution, and an electric current is passed through the electroless plating film 24 to form the electrolytic plating 28 on the non-formed portion of the resist 26. At this time, the electrolytic plating 28 is filled so as to flatten the surface of the non-through hole 22 (step (G)).
[0023]
Then, the resist 26 is stripped and removed with 5% KOH, and then etched with a mixed solution of sulfuric acid and hydrogen peroxide to dissolve and remove the electroless plating film 24 under the plating resist, and consists of the electroless plating 24 and the electrolytic copper plating 28. A conductor circuit 34 and a via 32 having a thickness of 18 μm (10 to 30 μm) are obtained (step (H)). In the present embodiment, the through hole 36 is formed by providing the via 32 so as to correspond to the upper and lower sides of the circuit pattern 18. On the other hand, the wirings are routed through the circuit pattern 18 by shifting the positions of the upper and lower vias 32 of the circuit pattern 18.
[0024]
Further, it is immersed in chromic acid for 3 minutes, and the surface of the core substrate 30 between the conductor circuits 34 is etched by 1 μm to remove the palladium catalyst on the surface. Further, a roughened surface (not shown) is formed on the surface of the conductor circuit 34 and the via 32 by an etching solution containing a second copper complex and an organic acid, and Sn substitution is performed on the surface.
[0025]
A thermosetting resin 36α made of epoxy, BT, polyimide, olefin, or the like is applied to the surface of the core substrate 30 and dried (prebaked) (step (I)). Next, a non-through hole 42 having an opening diameter of 100 to 250 μm reaching the conductor circuit 34 and the via 32 is formed in the resin 36α by a CO 2 laser, a YAG laser or an excimer laser, and then heated to heat the interlayer resin having the non-through hole 42 The insulating layer 40 is formed (step (J) in FIG. 3). As the resin constituting the interlayer resin insulating layer, the same resin as that of the lower insulating layer 14 and the upper insulating layer 20 described above can be used, or a different resin can be used. In addition to a thermosetting resin, a mixture of a thermosetting resin and a thermoplastic resin can be used, and a filler such as silicon or resin can be further mixed therein. Here, the surface of an interlayer resin insulation layer can also be roughened by mixing a soluble filler and dissolving the filler with a chemical solution. In addition, although resin is apply | coated here, a resin film can also be used similarly to the upper insulating layer 20. FIG.
[0026]
After the desmear treatment, a palladium catalyst is applied and immersed in an electroless plating solution to deposit an electroless plating film 44 having a thickness of 15 μm uniformly on the surface of the interlayer resin insulation layer 40 (step (K)). .
[0027]
Subsequently, a plating resist resist 46 is formed on the surface of the electroless plating film 44 (step (L)). Then, electrolytic plating 48 is formed on the portion where the resist 46 is not formed (step (G) in FIG. 4).
[0028]
Then, after the resist 46 is peeled and removed, etching is performed to dissolve and remove the electroless plating film 42 under the plating resist, and a conductor circuit 54 having a thickness of 18 μm (10 to 30 μm) made of the electroless plating 42 and the electrolytic copper plating 48. And the via | veer 52 is obtained (process (N)). Thereafter, a roughened layer (not shown) is provided on the surfaces of the conductor circuit 54 and the via 52.
[0029]
Solder bumps are formed on the multilayer printed wiring board described above. A solder resist composition is applied to both sides of the substrate in a thickness of 20 μm, dried, and then a 5 mm thick photomask film (not shown) on which a circular pattern (mask pattern) is drawn is adhered. And exposed to ultraviolet light for development. Further, heat treatment is performed to form a solder resist layer (thickness 20 μm) 60 having openings 62 in solder pad portions (including via holes and land portions thereof) (step (O) in FIG. 5).
[0030]
Thereafter, an electroless nickel plating solution having a pH of 4.5 comprising nickel chloride 2.3 × 10 −1 mol / l, sodium hypophosphite 2.8 × 10 −1 mol / l, sodium citrate 1.6 × 10 −1 mol / l The nickel plating layer 64 having a thickness of 5 μm is formed in the opening 62 by dipping for 20 minutes. Furthermore, the substrate was made of potassium gold cyanide 7.6 × 10-3 mol / l, ammonium chloride 1.9 × 10-1 mol / l, sodium citrate 1.2 × 10-1 mol / l, sodium hypophosphite 1.7 × 10-1 mol / l. A gold plating layer 66 having a thickness of 0.03 μm is formed on the nickel plating layer 64 by immersing in an electroless gold plating solution of 1 for 7.5 minutes at 80 ° C. (step (P)).
[0031]
Then, a solder paste is filled in the opening 62 of the solder resist layer 60 (not shown). Thereafter, the solder filled in the opening 62 is reflowed at 200 ° C. to form solder bumps (solder bodies) 68 (see FIG. 6).
[0032]
After flux cleaning, the substrate is divided and cut into an appropriate size with an apparatus having a router, and then a check circuit for inspecting a short circuit and disconnection of the printed wiring board is performed to obtain a desired printed wiring board.
[0033]
Next, a method for manufacturing a multilayer printed wiring board according to the second embodiment of the present invention will be described with reference to FIG.
This second embodiment is the same as steps (A) and (B) of the first embodiment described above. However, in the first embodiment, the film 20 to be the upper insulating layer 20 is directly attached in the step (C). On the other hand, in the second embodiment, as shown in the step (A) of FIG. 7, first, the resin 19 is applied on the circuit pattern 18, and the resin is semi-cured until it reaches the B stage state. The film 20α is pressure-bonded by a press (step (B)). The core substrate of the second embodiment is excellent in surface smoothness as compared with the first embodiment.
[0034]
Next, a method for manufacturing a multilayer printed wiring board according to the third embodiment of the present invention will be described with reference to FIG.
This third embodiment is the same as step (A) of the second embodiment described above. However, in 2nd Embodiment, the film 20 used as the upper-layer insulating layer 20 was directly affixed on the resin 19 at the process (B). On the other hand, in the third embodiment, as shown in step (A) of FIG. 8, after the resin 19 is applied on the circuit pattern 18, the resin is semi-cured until it reaches the B stage state. Thereafter, the resin 19 is smoothed by buffing by belt sander polishing using # 600 belt polishing paper (manufactured by Sankyo Rikagaku) (step (B)). Next, heat treatment is performed to cure the resin 19. Thereafter, the film 20α is pressure-bonded by a press (step (C)). The core substrate of the second embodiment is further excellent in surface smoothness as compared with the second embodiment.
[0035]
In the third embodiment, after forming the via 32 and the conductor circuit 34 in the core substrate 30 (step (H) in FIG. 2), before applying the resin 40α to be an interlayer resin insulating layer (step in FIG. 2). (I)), the surface of the via 32 and the conductor circuit 34 can be smoothed by applying and polishing the resin described above.
[0036]
Next, a method for manufacturing a multilayer printed wiring board according to the fourth embodiment of the present invention will be described with reference to FIGS.
In the fourth embodiment, as the single-sided copper-clad plate 110, a copper foil 12 having a thickness (100 μm) thicker than that of the first embodiment is used (step (A) in FIG. 9). First, a mask is attached to the outer periphery of the single-sided copper-clad plate 110, and etching is performed to reduce the thickness of the copper foil at the central portion to about 30 μm (step (B)). FIG. 10A shows a plan view of the single-sided copper-clad plate 110 shown in step (B). Here, the figure of the process (B) of FIG. 9 is equivalent to the XX cross section in FIG. 10 (A), ie, the right end part vicinity.
[0037]
Next, the copper foil 12 is pattern-etched to form a circuit pattern 18 at the center, and the copper foil 12 is left at a thickness of 100 μm at the outer periphery (step (C)). FIG. 10B shows a plan view of the single-sided copper-clad plate 110 in the step (C). As shown in the figure, the copper foil 12 remains on the outer periphery of the single-sided copper-clad plate 110, and nine circuit patterns 70 are formed on the inner side of the copper foil 12. This circuit pattern 70 represents a set of circuit patterns 18 shown in FIG.
[0038]
The single-sided copper-clad board 110 of this embodiment is for 9 pieces, and after the formation of an interlayer resin insulation layer and a circuit in the following steps as in the first embodiment, it is cut and nine multilayer prints are made. A wiring board is formed. At the time of this cutting, the remaining outer peripheral portion of the copper foil 12 is discarded.
[0039]
In the multilayer printed wiring board according to the fourth embodiment, the thick copper foil 12 is left on the outer periphery of the lower insulating layer 14 to maintain strength, so that a thin circuit pattern (metal layer) 18, the lower insulating layer 14, and Even when the upper insulating layer 20 (core substrate) is used, the core substrate is not warped in the manufacturing process.
[Brief description of the drawings]
FIG. 1 is a manufacturing process diagram of a multilayer printed wiring board according to a first embodiment of the present invention.
FIG. 2 is a manufacturing process diagram of the multilayer printed wiring board according to the first embodiment of the present invention.
FIG. 3 is a manufacturing process diagram of the multilayer printed wiring board according to the first embodiment of the present invention.
FIG. 4 is a manufacturing process diagram of the multilayer printed wiring board according to the first embodiment of the present invention.
FIG. 5 is a manufacturing process diagram of the multilayer printed wiring board according to the first embodiment of the present invention.
FIG. 6 is a cross section of the multilayer printed wiring board according to the first embodiment of the present invention.
FIG. 7 is a manufacturing process diagram of the multilayer printed wiring board according to the second embodiment of the present invention.
FIG. 8 is a manufacturing process diagram of the multilayer printed wiring board according to the third embodiment of the present invention.
FIG. 9 is a manufacturing process diagram of the multilayer printed wiring board according to the fourth embodiment of the present invention.
FIGS. 10A and 10B are plan views of a copper-clad laminate constituting a multilayer printed wiring board according to a fourth embodiment of the present invention.
[Explanation of symbols]
10 Single-sided copper-clad plate 12 Copper foil (metal layer)
14 Substrate 18 Circuit Pattern 20 Upper Insulating Layer 22 Non-Through Hole 24 Electroless Plating Film 26 Resist 28 Electroplating 30 Core Substrate 32 Via 34 Conductor Circuit 36 Through Hole 40 Interlayer Resin Insulating Layer 42 Non-Through Hole 44 Electroless Plating Film 46 Resist 48 Electrolytic plating 52 Via 54 Conductor circuit 60 Solder resist 62 Opening 64 Nickel plating film 66 Gold plating film 68 Solder bump

Claims (11)

In a build-up multilayer printed wiring board formed by building up an interlayer resin insulation layer on a core substrate having conductor circuits formed on the front and back surfaces ,
Build the core board is made by sandwiching a resin of the circuit pattern two layers, which in Rukoto to fill the non-through hole leading to the circuit pattern formed on the resin by plating, characterized in that the through hole Up multilayer printed wiring board. A method for producing a build-up multilayer printed wiring board comprising at least the following steps (A) to ( D ):
(A) A step of forming a resin insulating layer on a resin insulating layer having a circuit pattern formed on the upper surface to form a core substrate;
(B) forming a non-through hole in the resin insulating layer of the core substrate that reaches the circuit pattern with a laser;
(C) filling the non-through holes of the resin insulation layer with plating to form through holes ;
(D) A step of building up an interlayer resin insulation layer on the core substrate . A method for producing a build-up multilayer printed wiring board comprising at least the following steps (A) to ( E ):
(A) forming a circuit pattern by etching a metal layer of a single-sided metal-clad resin plate formed by laminating a metal layer on a resin insulating layer ;
(B) A step of attaching a resin film to be a resin insulating layer on the circuit pattern to form a core substrate;
(C) forming a non-through hole in the resin insulating layer of the core substrate that reaches the circuit pattern with a laser;
(D) filling the non-through holes of the resin insulating layer with plating to form through holes ;
(E) A step of building up an interlayer resin insulation layer on the core substrate . A method for producing a build-up multilayer printed wiring board comprising at least the following steps (A) to ( F ):
(A) forming a circuit pattern by etching a metal layer of a single-sided metal-clad resin plate formed by laminating a metal layer on a resin insulating layer ;
(B) A step of applying a resin on the circuit pattern and then polishing to flatten the circuit pattern;
(C) A step of attaching a resin film to be a resin insulating layer on the circuit pattern to form a core substrate;
(D) forming a non-through hole in the resin insulating layer of the core substrate that reaches the circuit pattern with a laser;
(E) filling the non-through holes of the resin insulating layer with plating to form through holes ;
(F) A step of building up an interlayer resin insulation layer on the core substrate . The build-up multilayer printed wiring board according to claim 1, wherein the resin has a core material. The build-up multilayer printed wiring board according to claim 1, wherein the interlayer resin insulation layer is a resin having no core material. The build-up multilayer printed wiring board according to claim 1, wherein the resin has a thickness of 30 to 200 μm. The build-up multilayer printed wiring board according to claim 1, wherein the core substrate has vias that are displaced in positions above and below the circuit pattern. The buildup multilayer printed wiring board according to claim 5, wherein the interlayer resin insulation layer has a core material. The method for manufacturing a build-up multilayer printed wiring board according to claim 2, wherein the resin insulating layer has a core material. The method for manufacturing a buildup multilayer printed wiring board according to claim 10, wherein the interlayer resin insulation layer has a core material.

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