JP4975913B2 - Multilayer printed circuit board - Google Patents

Description

【００９４】
表１から分かるように、実施例１，２および参考例１，２によれば、絶縁層中の芯材として従来のガラス繊維に替えて、アラミドフィルム等の有機ポリマーをそれぞれ使用したので、レーザによる孔あけ作業時にバイアホール形成用開口の形成不良を起こすことがなく、めっき金属を均一に成長させることができるので、めっき高さのばらつきを０．２％以下に抑えることができ、また、加熱・膨張によるバイアホールとパッドとの間の位置ずれを５μｍ未満に抑えることができた。
【００９５】
一方、比較例１によれば、めっき高さのばらつきが１２％の範囲であり、また、加熱・膨張によるバイアホールとパッドとの間の位置ずれは、２０μｍの範囲であることが確認された。
【００９６】
【発明の効果】
以上説明したように、本発明の多層化プリント配線板は、それぞれ絶縁性基材の一方の面に導体層を形成された少なくとも２枚の片面プリント回路基板と、絶縁性基材の両方の面に導体層を形成されたコア用プリント回路基板とを具え、
前記コア用プリント回路基板の両方の面に接着剤層を介して前記片面プリント回路基板の他方の面を積層されて加熱プレスされてなり、その絶縁性基材は、アラミドフィルムからなる芯材と、その芯材の両面にワニスタンクで積層されたエポキシ樹脂層とから横成され、かつ、前記絶縁性基材は、その厚さを４０μｍ〜４００μｍとされるとともに、その絶縁性基材の面方向の線熱膨張係数を＋１０ｐｐｍ／℃〜−１０ｐｐｍ／℃の範囲とされ、前記片面プリント回路基板は、前記絶縁性基材に形成されて前記導体層に接続されためっき充填バイアホールと、そのめっき充填バイアホール上に形成されて前記絶縁性基材の表面から前記接着剤層へ突出する導電性バンプとを有することとしたから、バイアホール開口の形成不良を起こすことがなく、開口内にめっき金属を均一に成長させることができるので、めっき高さのばらつきを最大限に抑制することができ、プリント回路基板の積層時の各導体回路間の接触不良を大幅に減少させることができる。
【００９７】
また、加熱・膨張による熱膨張量を極力小さく抑えることができるので、プレス圧による絶縁性基材の最終的な厚みの変動や、バイアホール開口の位置ずれを最小限に抑えることができ、バイアホールランド径や配線ピッチを小さくして配線密度を向上させることができる。
【図面の簡単な説明】
【図１】 (a)〜(f)は、本発明の一実施形態に係る両面回路基板の製造工程を示す図である。
【図２】 (a)〜(f)は、本発明の一実施形態に係る片面回路基板の製造工程を示す図である。
【図３】図１に示す両面回路基板をコアとして、図２に示す片面回路基板を積層して形成した多層化回路基板を示す図である。
【符号の説明】
１０ 銅張積層板
１２ 絶緑性基材
１４ 銅箔
１６ ＰＥＴフィルム
１７ ＰＥＴフィルム
１８ バイアホール形成用開口
２０ バイアホール
２２ 導電性バンプ
２４ 銅箔
２６、２８ 導体回路
３０ エッチング保護フィルム
３２ 導体回路
３４ 接着剤層[0001]
BACKGROUND OF THE INVENTION
  The present invention,Suitable for manufacturingMultilayeredThe present invention relates to a printed circuit board.
[0002]
[Prior art]
Conventionally, a general insulating base material used for a printed circuit board is a plate-like material obtained by, for example, impregnating an epoxy resin into a glass cloth formed by forming glass fiber yarn into a cloth shape, and drying and curing it. Is formed. After a copper foil is laminated on one or both sides of the insulating base material, a printed circuit board is manufactured by etching the copper foil to form a conductor circuit having a predetermined wiring pattern.
[0003]
In order to laminate a plurality of such printed circuit boards, for example, an adhesive layer made of a thermosetting resin is provided between adjacent printed circuit boards, or a prepreg in a semi-cured state is disposed. In general, the adhesive layer or the prepreg is cured and laminated by heating and pressing.
[0004]
In order to electrically connect the printed circuit boards of each layer, for example, after forming an opening for forming a via hole by irradiating a laser beam on an insulating substrate of the printed circuit board, a plating film or the like is formed in the opening. A conductive paste is filled so as to contact a pad formed on an adjacent printed circuit board.
[0005]
[Problems to be solved by the invention]
By the way, according to the prior art, when the metal plating is filled in the opening for forming the via hole as described above, the plating height may vary, and the reliability of the electrical connection between the stacked printed circuit boards may occur. There was a problem of lowering the sex.
[0006]
The reason is that when the resin part of the insulating substrate is irradiated with the laser beam, the resin can easily evaporate and easily make holes, but the laser beam is applied to the part where the glass cloth exists. In this case, the drilling speed becomes slower than the case where the resin portion is irradiated, and the glass fiber yarn remains in the via hole and protrudes into the hole. Therefore, the plated metal cannot be grown uniformly, and the plating height varies.
[0007]
In addition, when the printed circuit boards are stacked and heated as described above, it is inevitable that the thermal expansion / shrinkage accompanying heating / cooling occurs in each printed circuit board. For this reason, a positional shift occurs between the printed circuit boards, and the position of the via hole and the pad shifts. As a result, there is a problem that the electrical connection between the layers is not sufficient.
[0008]
Such misregistration caused by thermal expansion / contraction is particularly remarkable as the printed circuit board is made thinner. The reason is considered that the thinner the substrate, the lower the proportion of glass fiber as the core material, and the greater the contribution due to the thermal expansion of the resin in the printed circuit board.
[0009]
  The present invention has been made in view of the above-described problems of the prior art, and the object of the present invention is that when a printed circuit board is multilayered, contact failure of a conductor circuit provided on the board or No misalignmentMultilayeredIt is to provide a printed circuit base slope.
[0010]
[Means for Solving the Problems]
  Therefore, as a result of intensive studies to achieve the above object, the present inventor has completed the present invention having the following contents.
  That is, the present inventionMultilayeredPrinted circuit board
  RespectivelyInsulating substrateOne ofA conductor layer is formed on the surface ofIsTheAt least two sidesPrinted circuit boardAnd a core printed circuit board having a conductor layer formed on both sides of the insulating substrate,
  Multi-layered by laminating the other side of the single-sided printed circuit board via an adhesive layer on both sides of the core printed circuit board and hot pressingIn printed circuit boards,
  The insulating base material is composed of a core material made of an aramid film and an epoxy resin layer laminated on both surfaces of the core material with a varnish tank,
  Insulating substrateIs thatThe thickness is 40 μm to 400 μmIsIn addition, the linear thermal expansion coefficient in the surface direction of the insulating base material is within the range of +10 ppm / ° C. to −10 ppm / ° C.Is,
  The single-sided printed circuit board is formed on the insulating base material and connected to the conductor layer by a plating filled via hole, and formed on the plating filled via hole, the adhesive from the surface of the insulating base material With conductive bumps protruding into the layerIt is characterized by that.
[0011]
According to such a configuration, since the core material made of an organic polymer is used as a reinforcing material in the insulating layer instead of the conventional glass fiber, the core material in the insulating layer is made by laser energy in the same manner as the impregnating resin. Easily melts and evaporates. Therefore, there is no formation failure of the via hole opening, and as a result, the plated metal can be grown uniformly and the variation in the plating height can be reduced. Therefore, it is possible to reduce the contact failure between the conductor circuits when the printed circuit boards are laminated.
[0012]
In addition, since the linear thermal expansion coefficient of the insulating base material of the printed circuit board is in the range of +10 ppm / ° C. to −10 ppm / ° C., the printed circuit board is affected by expansion and contraction when the printed circuit board is laminated and heated and pressed. As a result, the positional displacement between the pad provided on the printed circuit board and the conductive material does not occur. Moreover, when forming a via hole forming opening on an insulating base material by laser irradiation, an opening having a desired shape can be formed.
Therefore, the connection reliability of the multilayer circuit board formed by laminating and multilayering these printed circuit boards can be remarkably improved.
The linear thermal expansion coefficient is more preferably in the range of +5 ppm / ° C. to −5 ppm / ° C.
[0013]
  As a combination of the core material and the resin impregnated with it, an aramid film is used as the core material, and an epoxy resin is used as the resin to be impregnated with it.To do.The reason is that these resins themselves have sufficient strength and the linear expansion coefficient can be easily controlled.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
  Of the present inventionMultilayeredThe characteristic of the insulating base material used in the printed circuit board consists of a core material made of an organic polymer and a resin layer laminated on the core material, and the linear thermal expansion coefficient of the insulating base material is +10 ppm / ° C.- It is in the range of −10 ppm / ° C.
[0015]
  The insulating base material includes a core material made of an organic polymer and the core material.LaminatedIt is a hard insulating substrate made of a resin layer and completely cured.
  As a reinforcing material in the insulating base material, a core material made of an organic polymer is used instead of the conventional glass fiber, and the core material is easily melted and evaporated by laser irradiation in the same manner as the impregnating resin. No formation defects occur. As a result, plating metal can be uniformly grown in the opening, so that variations in plating height can be suppressed to the maximum, and contact failure between each conductor circuit during printed circuit board lamination can be reduced. Can do.
[0016]
In addition, by using a hard material with a linear expansion coefficient in the range of +10 ppm / ° C. to −10 ppm / ° C., the amount of thermal expansion can be suppressed as small as possible. In this case, it is possible to minimize the final thickness variation of the insulating base material due to the press pressure and the displacement of the via hole opening, and to reduce the via hole land diameter and wiring pitch to reduce the wiring density. Can be improved.
[0017]
  Furthermore, in the present inventionSuch a core printed circuit board and one sideMultiple printed circuit boardsWhenAfter laminating the layers, even when these are heated and multilayered, the amount of thermal expansion during the heat pressing can be kept small,For coreViahole land on the printed circuit board,Single side printed circuit boardIt is possible to prevent the occurrence of a relative misalignment with the conductive material filled in the via hole opening.
  Therefore, the present inventionSuch a core printed circuit board and one sidePrinted circuit boardWhenLaminatedHot pressFormed by multilayeringOf the present inventionMultilayeredPrintCircuit boardIsConnection reliability can be significantly improved.
[0018]
  Of the present inventionMultilayeredIn the printed circuit board, an aramid film is used as the core material.
[0019]
  Also in the core materialLaminatedAs a resin to make the core materialLaminatedWhen the thermal expansion coefficient of the insulating layer is within the range of +10 ppm / ° C. to −10 ppm / ° C.UseFor example, epoxy commonly used in insulating material of printed circuit boardsResinCan be used.
  The resin may be added with a curing accelerator, a colorant, an antioxidant, an outer-surface impermeant, a transition agent, a filler and the like as required, and a dielectric constant (ε). And a resin having as low an electrical property (tan δ) as possible is preferable.
[0020]
  Insulating base materialInThe epoxy resin on the aramid filmLaminatedLet it heat cure completely,40˜400 μm,An epoxy base material with an aramid film as the core is usedThe
  The reason is,40If the thickness is less than μm, the strength is reduced and handling becomes difficult, and the reliability with respect to electrical insulation is reduced. If the thickness exceeds 400 μm, formation of fine via holes becomes difficult and the substrate itself is thick. Because it becomes.
[0021]
  According to the present inventionMultilayeredWhen manufacturing a printed circuit board, first, a copper foil is attached to one surface of the insulating base, and if necessary, a light-transmitting resin film is adhered to the surface opposite to the copper foil application surface, Thereafter, laser irradiation is performed on the resin film to form a via hole forming opening reaching the copper foil surface of the insulating substrate.
[0022]
By the laser irradiation, an opening is also formed in the light-transmitting resin film, and this opening can function as a mask used for plating filling or conductive paste filling when forming a conductive bump. After the conductive bump is formed on the material, it has an adhesive layer that can be peeled off.
[0023]
This resin film is preferably formed from a PET film having a pressure-sensitive adhesive layer thickness of 1 to 20 μm and a film thickness of 10 to 50 μm, for example.
The reason is that depending on the thickness of the PET film, the protruding amount of the conductive bumps from the surface of the insulating base material is determined. Therefore, if the thickness is less than 10 μm, the protruding amount is too small and connection failure tends to occur. If the thickness exceeds 50 μm, the molten plated metal or conductive paste spreads too much at the connection interface, so that a fine pattern cannot be formed.
[0024]
Via hole openings formed on an aramid (film) epoxy substrate having a thickness in the above range have a pulse energy of 0.5 to 100 mJ, a pulse width of 1 to 100 μs, a pulse interval of 0.5 ms or more, and a shot. It is preferably formed by a carbon dioxide laser that is irradiated under the condition of a number of 3 to 50, and the aperture is desirably in the range of 50 to 250 μm.
The reason is that if the thickness is less than 50 μm, it is difficult to fill the opening with a conductive substance and the connection reliability is lowered, and if it exceeds 250 μm, it is difficult to increase the density.
[0025]
It is desirable to perform desmear treatment for removing resin residue remaining on the inner wall surface of the opening before filling the opening for via hole with plating or conductive paste from the viewpoint of securing connection reliability. Since it is performed in a state where a protective film is stuck on top, for example, it is desirable to use dry desmear treatment using plasma discharge or corona discharge. Among dry desmear treatments, plasma cleaning using a plasma cleaning device is particularly preferable.
[0026]
As a method for forming a via hole by filling a conductive material in the non-through hole subjected to the desmear treatment, there are a plating filling method by plating treatment and a method by filling conductive paste. In particular, in the case of plating filling, in order to prevent plating from depositing on the copper foil on the insulating substrate, a protective film is previously applied to the copper foil surface to prevent contact with the plating solution. Then fill the non-through holes with plating to form via holes.
[0027]
The plating filling can be performed by either an electrolytic plating process or an electroless plating process, but an electrolytic plating process is desirable.
As the electrolytic plating, copper, tin, lead, silver, gold, zinc, indium, bismuth, solder, tin alloy, or the like can be used, and electrolytic copper plating is particularly optimal.
[0028]
When filling by electrolytic plating, electrolytic plating is performed using the copper foil formed on the insulating substrate as a plating lead. Since this copper foil (metal layer) is formed over the entire area of one surface of the insulating substrate, the current density becomes uniform, and the non-through holes are filled at a uniform height by electrolytic plating. Can do.
Here, before the electrolytic plating treatment, the surface of the metal layer in the non-through hole may be activated with an acid or the like.
[0029]
In addition, after electrolytic plating, the electrolytic plating (metal) that has risen from the hole can be removed by polishing or the like and planarized. For polishing, a belt sander or buffing can be used. The electrolytic plating can be left slightly higher than the insulating substrate.
[0030]
Also, instead of filling the conductive material by plating, a part of the non-through hole is filled by a method of filling the conductive paste, or by electrolytic plating or electroless plating, and the remaining part is filled with the conductive paste. Can also be done.
As the conductive paste, a conductive paste made of at least one metal particle selected from copper, tin, gold, silver, nickel, and various solders can be used.
[0031]
In addition, as the metal particle, a metal particle whose surface is coated with a different metal can be used. Specifically, the metal particle which coat | covered the noble metal chosen from gold | metal | money and silver on the surface of a copper particle can be used.
The conductive paste is preferably an organic conductive paste obtained by adding a thermosetting resin such as an epoxy resin or a polyphenylene sulfide (PPS) resin to metal particles.
[0032]
The non-through holes formed by laser processing have a fine diameter of 20 to 150 μm. Therefore, when filling the conductive paste, bubbles are likely to remain, so filling by electrolytic plating is practical. is there.
[0033]
  In the present inventionSuch multilayeringPrinted circuit boardInConductor circuit on one side of insulating substrateDoOne sidePrintCircuit boardIsConductive bumps are provided on the via holes to ensure electrical connection with other circuit boards.
  This conductive bump is preferably formed by filling a plating film or a conductive paste into the opening of the protective film formed by laser irradiation.
[0034]
The plating filling can be performed by either an electrolytic plating process or an electroless plating process, but an electrolytic plating process is desirable.
As the electrolytic plating, low melting point metals such as copper, gold, nickel, tin, and various solders can be used, but tin plating or solder plating is optimal.
[0035]
The height of the conductive bump is preferably in the range of 3 to 60 μm. The reason for this is that if the thickness is less than 3 μm, variation in the height of the bump cannot be allowed due to the deformation of the bump, and if it exceeds 60 μm, the resistance value increases, and the bump spreads laterally when the bump is formed. This causes a short circuit.
[0036]
When the conductive bump is formed by filling a conductive paste, the variation in the height of the electroplating that forms the via hole is corrected by adjusting the amount of the conductive paste to be filled. The height of the bump can be aligned.
[0037]
It is desirable that the bump made of this conductive paste is in a semi-cured state. This is because the conductive paste is hard even in a semi-cured state and can penetrate the organic adhesive layer softened during hot pressing. Moreover, it is deformed at the time of hot pressing, so that the contact area increases, the conduction resistance can be lowered, and the variation in bump height can be corrected.
[0038]
In addition to this, for example, a method of screen-printing a conductive paste using a metal mask provided with openings at predetermined positions, a method of printing a solder paste which is a low melting point metal, and a method of immersing in a solder melt Conductive bumps can be formed.
As the low melting point metal, Pb—Sn solder, Ag—Sn solder, indium solder and the like can be used.
[0039]
The conductor circuit formed on the copper foil bonding surface of the insulating resin base material has a mask having a predetermined wiring pattern after a photosensitive dry film is applied to the copper foil surface or a liquid photosensitive resist is applied. After the plating resist layer is formed by placing and exposing / developing, the copper foil in the portion where the etching resist is not formed is etched.
[0040]
A land (pad) as a part of the conductor circuit is preferably formed on the surface corresponding to each via hole of the conductor circuit in a range of 50 to 250 μm in diameter.
The etching for forming the pattern is performed by at least one selected from an aqueous solution of sulfuric acid-hydrogen peroxide, persulfate, cupric chloride, and ferric chloride.
[0041]
It is preferable that a roughened layer is formed on the surface of the wiring pattern of the conductor circuit to improve the adhesion with the adhesive layer that joins the circuit boards and to prevent the occurrence of delamination.
Examples of the roughening treatment method include soft etching treatment, blackening (oxidation) one-reduction treatment, formation of needle-like alloy plating made of copper-nickel-phosphorus (made by Sugawara Eugleite: trade name Interplate), manufactured by MEC There is surface roughening with an etchant named “MEC Etch Bond”.
[0042]
In this embodiment, the roughening layer is preferably formed using an etching solution. For example, the surface of the conductor circuit is etched using an etching solution from a mixed aqueous solution of a cupric complex and an organic acid. It can be formed by processing. Such an etching solution can dissolve the copper conductor circuit under oxygen coexisting conditions such as spraying and bubbling, and the reaction is assumed to proceed as follows.
Cu + Cu (II) A_n  → 2Cu (I) A_{n / 2}
2Cu (I) A_{n / 2}  + N / 4O₂  + NAH (Aeration)
→ 2Cu (II) A_n  + N / 2H₂O
In the formula, A represents a complexing agent (acts as a chelating agent), and n represents a coordination number.
[0043]
As shown in this formula, the generated cuprous complex dissolves by the action of an acid, and combines with oxygen to form a cupric complex, which again contributes to the oxidation of copper. The cupric complex used in the present invention is preferably an azole cupric complex. The etching solution comprising the organic acid-cupric complex can be prepared by dissolving a cupric complex of an azole and an organic acid (halogen ions as required) in water.
Such an etching solution is formed, for example, from an aqueous solution in which 10 parts by weight of imidazole copper (II) complex, 7 parts by weight of glycolic acid, and 5 parts by weight of potassium chloride are mixed.
[0044]
Moreover, you may coat | cover a metal layer further on the wiring pattern in which the roughening layer was formed as needed. The metal to be formed may be coated with any metal selected from titanium, aluminum, zinc, iron, indium, thallium, cobalt, nickel, tin, lead, and bismuth.
[0045]
The adhesive layer formed on the surface of the insulating resin base opposite to the copper foil sticking surface is obtained by applying a resin to the substrate surface and drying it to make it uncured. In such an embodiment, there is no need to drill holes in the adhesive layer for conduction.
The adhesive layer is preferably formed from an organic adhesive. Examples of the organic adhesive include epoxy resin, polyimide resin, thermosetting polyphenylene ether (PPE), epoxy resin, and thermoplastic resin. It is desirable that the resin be at least one resin selected from a composite resin of the above, a composite resin of an epoxy resin and a silicone resin, and a BT resin.
Here, NMP, DMF, acetone, and ethanol can be used as the solvent for the organic adhesive.
[0046]
As a method for applying the uncured resin as the organic adhesive, a curtain coater, a spin coater, a roll coater, a spray coater, screen printing, or the like can be used.
It is also possible to completely remove bubbles at the interface between the roughened layer and the resin by applying pressure reduction and defoaming after applying the resin. The adhesive layer can also be formed by laminating an adhesive sheet.
As for the thickness of the said adhesive bond layer, 5-50 micrometers is desirable. Since the adhesive layer is easy to handle, it is preferable to pre-cure the adhesive layer.
[0047]
  Next, in the present inventionSuch multilayeringPrinted circuit boardInConductor circuits on both sides of the insulating baseDoBoth sides(For core) printCircuit boardInexplain about.
  In this case, the inside of the non-through hole formed in the single-sided copper-clad laminate by laser irradiation is cleaned by desmear treatment, and a via hole is formed by filling the non-through hole with a conductive substance, and then the via hole. Without forming conductive bumps on top, conductive foil that forms via holes by sticking copper foil through the adhesive layer on the surface of the insulating substrate that includes the via hole openings and heat-pressing. The conductive circuit and the copper foil are electrically connected, and then the copper foil attached to both surfaces of the insulating base material is etched to form a conductor circuit.
[0048]
When a multilayer circuit board is formed by combining a single-sided circuit board and a double-sided circuit board as described above, for example, a double-sided circuit board is first used as a core, and a conductor circuit formed on both sides of the core board is used. The conductive bumps of the single-sided circuit board are arranged opposite to each other, and the other single-sided circuit boards are sequentially stacked so that the conductive bumps are connected to the conductor circuits of the adjacent single-sided circuit board, and they are collectively Heat press.
[0049]
Lamination and integration of the double-sided circuit board as the core board and the plurality of single-sided circuit boards is performed by optically detecting a positioning hole provided in advance in each circuit board with a CCD camera or the like and performing alignment.
That is, the laminate is pressed at a pressure of 0.5 to 5 MPa while being heated at a temperature of 150 to 200 ° C., and all the circuit boards are integrated by one press molding.
[0050]
  Hereinafter, the present inventionMultilayeringAn example of a method for manufacturing a printed circuit board will be described with reference to the accompanying drawings.
  (1) According to the present inventionMultilayeredIn producing the printed circuit board, the insulating base 12 is an epoxy group in which an aramid film is laminated on an aramid film and completely cured to a thickness of 40 to 400 μm. A single-sided copper clad laminate 10 in which a copper foil 14 having a thickness of 5 to 18 μm is attached to one side of the insulating substrate 12 by a hot press is used as a starting material (see FIG. 1A).
[0051]
(2) Via holes 18 are formed on the surface of the insulating base 12 opposite to the copper foil application surface by laser processing so as to penetrate in the thickness direction and reach the copper foil 14.
In forming this opening, a light transmissive resin film 16 is adhered in advance to the surface of the insulating base 12 opposite to the copper foil sticking surface, and laser irradiation is performed on the resin film 16 (FIG. 1). (See (b)).
[0052]
(3) Before filling the opening 18 with a conductive material to form a via hole, plasma cleaning using a plasma cleaning device is performed to remove resin residue remaining on the inner wall surface of the non-through hole.
[0053]
(4) Then, with the protective film 17 attached to the surface of the copper foil 14, the opening 18 is filled with plating to form a via hole 20 (see FIG. 1 (c)). This plating filling is performed by an electrolytic copper plating process using the copper foil 14 as a plating lead.
When producing a double-sided circuit board, the copper electroplating into the opening 18 is formed so as to be slightly higher than the surface of the insulating base, and when producing a single-sided circuit board as described later. The upper portion of the opening 18 is filled with a slight gap.
[0054]
(5) Thereafter, after the PET film 16 and the protective film 17 are peeled off, a semi-cured adhesive layer, ie, B, is formed on the electrolytic copper plating side of the via hole slightly protruding from the resin surface of the insulating base 12. A stage adhesive layer (not shown) is formed, and the copper foil 24 is pressure-bonded to the surface of the insulating base 12 by a hot press through the adhesive layer to cure the adhesive layer (FIG. 1 ( e)).
[0055]
For example, an epoxy resin varnish is used as the adhesive, and the layer thickness is desirably in the range of 10 to 50 μm, and the thickness of the copper foil is desirably 5 to 18 μm.
By the heating press, the copper foil 24 is bonded to the insulating substrate 12 through the cured adhesive layer, and the via hole 20 and the copper foil 24 are electrically connected.
[0056]
(6) Next, conductor circuits 26 and 28 (including via lands) having a predetermined wiring pattern are formed on the copper foils 14 and 24 attached to both surfaces of the insulating base 12 by etching (FIG. 1). (See (f)).
[0057]
In this processing step, first, a photosensitive dry film resist is applied to the surfaces of the copper foils 12 and 24, and then an etching resist is formed by exposing and developing along a predetermined circuit pattern. The metal layer is etched to form conductor circuit patterns 26 and 28 including via lands.
[0058]
(7) Next, the surfaces of the conductor circuits 26 and 28 formed in the step (7) are etched using an etchant from a mixed aqueous solution of a cupric complex and an organic acid (display of the roughened layer). Is omitted), and the double-sided circuit board A for core is formed.
The double-sided circuit board manufactured according to the steps (1) to (7) is suitable as a core circuit board when manufacturing a multilayer circuit board.
[0059]
Next, an example of a method for manufacturing a single-sided circuit board that is laminated on the front and back surfaces of the double-sided circuit board will be described with reference to FIG.
[0060]
(1) Processing according to the steps (1) to (4) of the double-sided circuit board is performed, and the opening 18 is filled with electrolytic copper plating to form a via hole 20. The electrolytic copper plating is filled in the upper part of the opening 18 leaving a slight gap (see FIGS. 2A to 2C).
[0061]
(2) Next, the surface of the via hole 20 filled with electrolytic copper plating is further subjected to a solder plating process to form conductive bumps 22 slightly protruding from the surface of the insulating base 12 (FIG. 2). (See (d)).
[0062]
(3) After pasting the etching protective film 30 on the PET film 16 so as to cover the conductive bumps 22 formed in the above (2), the insulating base material is processed according to the processing step (6) of the double-sided circuit board. A conductor circuit 32 (including via land) having a predetermined wiring pattern is formed on the copper foil 14 affixed to 12 by an etching process (see FIG. 2 (e)).
[0063]
(4) Next, after peeling the PET film 16 and the protective film 30 from the resin surface of the insulating base material 12, an adhesive layer 34 is formed covering the resin surface of the insulating base material 12 and the conductive bumps 22. Thus, the single-sided circuit board B is manufactured (see FIG. 2 (f)).
[0064]
As described above, the single-sided circuit board manufactured according to the steps (1) to (4) has the conductor circuit 32 on one surface of the insulating base 12 and the conductive bump 22 on the other surface. And a resin adhesive layer 34 covering the surface of the insulating base material including the conductive bumps 22, and the plurality of single-sided circuit boards are made of a core circuit board A prepared in advance. Are laminated to form a multilayer.
[0065]
FIG. 3 shows a case where a three-layer board in which two single-sided circuit boards B are laminated on both sides of a core double-sided circuit board A is heated once at a temperature of 150 to 200 ° C. and a pressure of 1 to 4 MPa. 2 shows a multilayer printed wiring board integrated by press molding.
[0066]
  In the embodiment described above, the double-sided circuit board for the core and the double-sided single-sided circuit board are used to form a multi-layered structure. However, the double-sided circuit board for the core and the single-sided circuit board having three or more layers are used. Also applicable to the production of multilayer circuit boardsit can.
[0067]
【Example】
Example 1
(1) Aramid film (product name "Aramika" manufactured by Asahi Kasei Co., Ltd.) as a core material is impregnated with a varnish tank containing an epoxy resin and then dried with a hot air dryer to form a plate with a thickness of 40μm What was formed in this is used as an insulating substrate.
The impregnation amount of the epoxy resin constituting the insulating base material was 30% by weight, and the linear thermal expansion coefficient of the insulating base material 12 was +5 ppm / ° C.
After applying an adhesive to the entire area of one side of the insulating base material 12, a copper foil 14 having a thickness of 12 μm was pasted by a hot press through the adhesive layer to form a single-sided copper-clad laminate 10.
[0068]
(2) After a PET film 16 having a thickness of 22 μm is attached to the resin surface of the insulating substrate 12 of the single-sided copper-clad laminate 10, laser irradiation is performed on the PET film to obtain a thickness of the insulating substrate 12. A via hole forming opening 18 penetrating in the vertical direction and reaching the copper foil 12 was formed.
[0069]
In this example, a high peak short pulse oscillation type carbon dioxide laser processing machine manufactured by Mitsubishi Electric is used, and a laser beam is irradiated from the PET film side by a mask image method under the following laser processing conditions. The openings 18 for forming 150 μmφ via holes were formed at a speed of 100 holes / second.
[0070]
[Laser processing conditions]
Pulse energy 4.0mJ
Pulse width 15μs
Pulse interval 2ms or more
5 shots
At this time, since the insulating substrate 12 has a structure in which an aramid film made of an organic polymer is impregnated with an epoxy resin, the drilling speed on both sides by laser irradiation is almost the same, and the formed via hole is formed. There was almost no variation in the depth or diameter of the opening 18.
[0071]
(3) Next, in order to remove the epoxy resin remaining on the inner wall of the opening formed in the above (2), a plasma cleaning process using a plasma apparatus was performed. (Figure 1B).
[0072]
(4) Next, in a state where the PET film 17 is attached to the surface of the copper foil 14 attached to the insulating base material 12, an electrolytic copper plating process using the copper foil 14 as a plating lead under the following plating conditions Then, the via hole 20 was formed by filling the via hole forming opening 16 with an electrolytic copper plating film.
[0073]
[Electrolytic copper plating aqueous solution]
Copper sulfate pentahydrate: 60 g / l
Leveling agent (Atotech, HL): 40ml / l
Sulfuric acid: 190 g / l
Brightener (Atotech, UV): 0.5ml / l
Chlorine ion: 40ppm
[Electrolytic plating conditions]
Bubbling: 3.0 liters / minute
Current density: 0.5 A / dm²
Set current value: 0.18 A
Plating time: 130 minutes
[0074]
Here, since the shape of the via hole forming opening 16 is made uniform by the laser processing, the electrolytic copper plating film can be grown uniformly, and there is almost no variation in the plating height. The filling amount of the electrolytic copper plating was such that the upper surface slightly protruded from the surface of the green substrate 12 (see FIG. 1 (c)).
[0075]
(5) Then, after peeling the PET films 16 and 17 from the insulating substrate 12 (see FIG. 1 (d)), a semi-cured adhesive layer made of an epoxy resin varnish, that is, a B-stage adhesive layer (Not shown) was formed, and a 12 μm thick copper foil 24 was pressure-bonded to the surface of the insulating substrate 12 by a hot press through this adhesive layer, thereby curing the adhesive layer (FIG. 1). (See (e)).
[0076]
(6) Next, conductor circuits 26 and 28 (including via lands) having a predetermined wiring pattern were formed on the copper foils 14 and 24 attached to both surfaces of the insulating base material 12 by etching (FIG. 1). (See (f)).
[0077]
(7) Next, the surface of the conductor circuits 26 and 28 formed in the step (6) is subjected to a roughening process with an etching solution to form a roughened surface (the roughened layer is not shown).
[0078]
Conductor circuits 26 and 28 are formed on both surfaces of the insulating base material 12 by processing according to the steps (1) to (7), and the via holes 20 and the conductive bumps 22 that electrically connect these conductor circuits. Was formed on the insulating substrate 12, and a double-sided circuit board A in which a roughened layer was formed on the surfaces of the conductor circuits 26 and 28 was produced.
[0079]
(8) Next, after performing the processing according to the above steps (1) to (3) (see FIGS. 2 (a) to (b)), the copper foil 14 surface applied to the insulating base 12 In the state where the PET film 17 is attached, the electrolytic copper plating process using the copper foil 14 as a plating lead is performed under the following plating conditions, and the electrolytic copper plating film is filled in the via hole forming opening 16. A via hole 20 was formed.
[0080]
[Electrolytic copper plating aqueous solution]
Copper sulfate pentahydrate: 60 g / l
Leveling agent (Atotech, HL): 40ml / l
Sulfuric acid: 190 g / l
Brightener (Atotech, UV): 0.5ml / l
Chlorine ion: 40ppm
[Electrolytic plating conditions]
Bubbling: 3.0 liters / minute
Current density: 0.5 A / dm²
Set current value: 0.18 A
Plating time: 100 minutes
[0081]
Here, since the shape of the via hole forming opening 16 is made uniform by the laser processing, the electrolytic copper plating film can be grown uniformly, and there is almost no variation in the plating height. The filling amount of the electrolytic copper plating was such that the upper surface was slightly lower than the surface of the green substrate 12 (see FIG. 2 (c)).
[0082]
(10) Subsequent to the electroless copper plating process in (9) above, an electrolytic solder plating process was performed under the following plating conditions to form the upper portion of the via hole forming opening 18 and the PET film 16. Electrolytic solder plating was filled in the opening, and conductive bumps 22 protruding from the surface of the insulating base material 12 by the thickness of the PET film 16 were formed on the electrolytic copper plating (see FIG. 2 (d)). ).
[0083]
(Electrolytic solder plating solution)
Sn (BF₄)₂      : 25g / l
Pb (BF₄)₂      : 12g / l
Additive: 5ml / l
(Electrolytic solder plating conditions)
Temperature: 20 ° C
Current density: 0.4 A / dm²
[0084]
(11) Next, after peeling the PET film 17 and pasting the etching protective film 30 on the PET film 16, on the copper foil 14 stuck on the insulating base material 12 in the same manner as (6) above, Conductive circuits 32 (including via lands) having a predetermined wiring pattern were formed by etching (see FIG. 2 (e)).
[0085]
(12) Further, after the PET film 16 and the etching protective film 30 are peeled off from the resin surface of the insulating substrate 12, an epoxy resin adhesive is applied to the entire surface on the conductive bump 22 side by a roll coater at 100 ° C. After drying for 30 minutes, a single-sided circuit board B having an adhesive layer 34 with a thickness of 20 μm was produced (see FIG. 2 (f)).
[0086]
(13) Another single-sided circuit board B was manufactured by repeating the steps (8) to (12).
[0087]
(14) Laminate two single-sided circuit boards B across the core double-sided circuit board A,AdditionA multilayered circuit board was produced by integration by one press molding under conditions of a thermal temperature of 180 ° C. and a pressure of 3 MPa.
[0088]
(Example 2)
Aramid film as a core material was impregnated with a varnish tank containing an epoxy resin, then dried with a hot air drier, and formed into a plate shape with a thickness of 40 μm as an insulating substrate, A multilayered circuit board was produced by the same process as in Example 1.
The impregnation amount of the epoxy resin was 50% by weight, and the linear thermal expansion coefficient of this insulating substrate was +8 ppm / ° C.
[0089]
(Reference example 1)
  The polyimide film as the core material was impregnated with a varnish tank containing an epoxy resin, then dried with a hot air dryer, and formed into a plate shape with a thickness of 40 μm as an insulating base material, A multilayered circuit board was produced by the same process as in Example 1.
  The impregnation amount of the epoxy resin was 50% by weight, and the linear thermal expansion coefficient of this insulating substrate was −10 ppm / ° C.
[0090]
(Reference example 2)
  Biaxially stretched Teflon (“Teflon” is a registered trademark of DuPont) as a core material is impregnated with a varnish tank containing an epoxy resin, and then dried with a hot air dryer to obtain a plate having a thickness of 40 μm. A multilayer circuit board was produced by the same process as in Example 1 except that the substrate formed in the shape was used as an insulating substrate.
  The impregnation amount of the epoxy resin was 20% by weight, and the linear thermal expansion coefficient of this insulating base material was +10 ppm / ° C.
[0091]
(Comparative Example 1)
A glass cloth formed by forming glass fiber yarn into a cloth shape is impregnated with 50% by weight of an epoxy resin, dried and cured, and used as an insulating substrate except that it is formed into a plate shape. A multilayer circuit board was manufactured by the same process as in Example 1. The linear thermal expansion coefficient of this insulating substrate was +13 ppm / ° C.
[0092]
  Example 1 above, 2, Reference Examples 1 and 2For the multilayered circuit board fabricated according to Comparative Example 1, the variation in the height of the electrolytic copper plating filled in the opening for the via hole was measured, and the positional deviation between the via hole and the pad due to heating and expansion was measured. Was observed by SEM observation, and the results shown in Table 1 were obtained.
[0093]
[Table 1]

[0094]
  As can be seen from Table 1, Example 1, 2 and Reference Examples 1 and 2According to the above, since an organic polymer such as an aramid film is used instead of the conventional glass fiber as the core material in the insulating layer, there is no occurrence of poor formation of the via hole forming opening during the drilling operation by the laser. Since plating metal can be grown uniformly, variation in plating height can be suppressed to 0.2% or less, and misalignment between via holes and pads due to heating and expansion is less than 5 μm. I was able to suppress it.
[0095]
On the other hand, according to Comparative Example 1, it was confirmed that the variation in plating height was in the range of 12%, and the positional deviation between the via hole and the pad due to heating / expansion was in the range of 20 μm. .
[0096]
【The invention's effect】
  As explained above, the present inventionMultilayeredThe printed wiring boardRespectivelyInsulating substrateofForm a conductor layer on one sideIsTheAt least two sidesPrinted circuit boardAnd a core printed circuit board having a conductor layer formed on both sides of the insulating substrate,
  The other side of the single-sided printed circuit board is laminated on both sides of the core printed circuit board via an adhesive layer and heated and pressed.The insulating base material is composed of a core material made of an aramid film and an epoxy resin layer laminated on both surfaces of the core material by a varnish tank, and the insulating base materialIsIts thicknessThe40 μm to 400 μmIsAnd the linear thermal expansion coefficient in the surface direction of the insulating base material is in the range of +10 ppm / ° C. to −10 ppm / ° C.The single-sided printed circuit board is formed on the insulating base material and connected to the conductor layer, and the plating filled via hole is formed on the plating filled via hole, and is formed from the surface of the insulating base material. Having conductive bumps protruding into the adhesive layer;As a result, plating metal can be grown uniformly in the opening without causing poor formation of the via hole opening, so that variations in the plating height can be suppressed to the maximum, and the printed circuit board can be laminated. The contact failure between each conductor circuit at the time can be greatly reduced.
[0097]
In addition, the amount of thermal expansion due to heating / expansion can be kept as small as possible, minimizing the final thickness variation of the insulating base material due to the pressing pressure and the displacement of the via hole opening. The wiring density can be improved by reducing the hole land diameter and the wiring pitch.
[Brief description of the drawings]
FIGS. 1A to 1F are diagrams showing a manufacturing process of a double-sided circuit board according to an embodiment of the present invention.
FIGS. 2A to 2F are views showing manufacturing steps of a single-sided circuit board according to an embodiment of the present invention.
3 is a diagram showing a multilayered circuit board formed by stacking the single-sided circuit board shown in FIG. 2 using the double-sided circuit board shown in FIG. 1 as a core.
[Explanation of symbols]
10 Copper-clad laminate
12 Green base material
14 Copper foil
16 PET film
17 PET film
18 Opening for via hole formation
20 Bahia Hall
22 Conductive bump
24 Copper foil
26, 28 conductor circuit
30 Etching protection film
32 conductor circuit
34 Adhesive layer

Claims (1)

At least two single-sided printed circuit board formed on one surface of each insulating substrate a conductive layer on both surfaces of the insulating base and the printed circuit board core formed of the conductor layers comprises,
In the multilayer printed circuit board formed by laminating the other side of the single-sided printed circuit board via an adhesive layer on both sides of the printed circuit board for the core and heat-pressing ,
The insulating base material is composed of a core material made of an aramid film and an epoxy resin layer laminated on both surfaces of the core material with a varnish tank,
The insulating substrate is the thickness Rutotomoni is a 40Myuemu～400myuemu, within its linear thermal expansion coefficient in the planar direction of the insulating base + 10ppm / ℃ ~-10ppm / ℃,
The single-sided printed circuit board is formed on the insulating base material and connected to the conductor layer by a plating filled via hole, and formed on the plating filled via hole, the adhesive from the surface of the insulating base material A multilayer printed circuit board comprising conductive bumps protruding to the layer .

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