JP4141963B2 - エラー訂正コードに追加のエラー訂正レイヤを埋め込む方法及び装置 - Google Patents
エラー訂正コードに追加のエラー訂正レイヤを埋め込む方法及び装置 Download PDFInfo
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- JP4141963B2 JP4141963B2 JP2003582910A JP2003582910A JP4141963B2 JP 4141963 B2 JP4141963 B2 JP 4141963B2 JP 2003582910 A JP2003582910 A JP 2003582910A JP 2003582910 A JP2003582910 A JP 2003582910A JP 4141963 B2 JP4141963 B2 JP 4141963B2
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- code
- error correction
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2945—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using at least three error correction codes
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
- G11B20/1833—Error detection or correction; Testing, e.g. of drop-outs by adding special lists or symbols to the coded information
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2942—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes wherein a block of parity bits is computed only from combined information bits or only from parity bits, e.g. a second block of parity bits is computed from a first block of parity bits obtained by systematic encoding of a block of information bits, or a block of parity bits is obtained by an XOR combination of sub-blocks of information bits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/1515—Reed-Solomon codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
- H03M13/2909—Product codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2954—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using Picket codes or other codes providing error burst detection capabilities, e.g. burst indicator codes and long distance codes [LDC]
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Signal Processing (AREA)
- Error Detection And Correction (AREA)
- Detection And Correction Of Errors (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
- Image Processing (AREA)
- Editing Of Facsimile Originals (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP02076356 | 2002-04-05 | ||
| PCT/IB2003/001003 WO2003085839A1 (en) | 2002-04-05 | 2003-03-14 | Method and apparatus for embedding an additional layer of error correction into an error correcting code |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2005522137A JP2005522137A (ja) | 2005-07-21 |
| JP2005522137A5 JP2005522137A5 (enExample) | 2006-06-01 |
| JP4141963B2 true JP4141963B2 (ja) | 2008-08-27 |
Family
ID=28685927
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2003582910A Expired - Fee Related JP4141963B2 (ja) | 2002-04-05 | 2003-03-14 | エラー訂正コードに追加のエラー訂正レイヤを埋め込む方法及び装置 |
Country Status (10)
| Country | Link |
|---|---|
| US (1) | US7188295B2 (enExample) |
| EP (1) | EP1500200B1 (enExample) |
| JP (1) | JP4141963B2 (enExample) |
| KR (1) | KR20040093748A (enExample) |
| CN (1) | CN100539444C (enExample) |
| AT (1) | ATE408931T1 (enExample) |
| AU (1) | AU2003209596A1 (enExample) |
| DE (1) | DE60323622D1 (enExample) |
| TW (1) | TW200401971A (enExample) |
| WO (1) | WO2003085839A1 (enExample) |
Families Citing this family (26)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI245272B (en) | 2003-12-03 | 2005-12-11 | Mediatek Inc | Recording method and apparatus for optical disk drive |
| US8254218B2 (en) | 2003-12-03 | 2012-08-28 | Mediatek Inc. | Recording method and apparatus for optical disk drive |
| US7382707B2 (en) | 2003-12-03 | 2008-06-03 | Mediatek Inc. | Recording method and apparatus for optical disk drive |
| US7281193B2 (en) * | 2004-09-27 | 2007-10-09 | Mediatek Inc. | Method and apparatus for decoding multiword information |
| US7284183B2 (en) * | 2004-11-04 | 2007-10-16 | Mediatek Inc. | Method and apparatus for decoding multiword information |
| JP2006190346A (ja) * | 2004-12-28 | 2006-07-20 | Toshiba Corp | エラー訂正処理装置及びエラー訂正処理方法 |
| JP2006209928A (ja) * | 2005-01-31 | 2006-08-10 | Sony Corp | 光ディスク製造方法及び装置、光ディスク、並びに、光ディスク再生方法及び装置 |
| CN1779833B (zh) * | 2005-09-27 | 2011-05-18 | 威盛电子股份有限公司 | 计算错误检测码的方法 |
| CN100533578C (zh) * | 2005-12-30 | 2009-08-26 | 上海乐金广电电子有限公司 | 高密度光盘纠错码解码装置和方法 |
| KR100772393B1 (ko) * | 2006-02-08 | 2007-11-01 | 삼성전자주식회사 | 에러 정정 블록, 에러 정정 블록의 생성 방법 및 장치,에러 정정 방법 |
| KR101300810B1 (ko) * | 2006-04-03 | 2013-08-26 | 삼성전자주식회사 | 데이터 인코딩 및 디코딩 방법과 그 장치, 저장 매체, 및저장 매체 구동 시스템 |
| US8255763B1 (en) * | 2006-11-08 | 2012-08-28 | Marvell International Ltd. | Error correction system using an iterative product code |
| US8145975B2 (en) | 2008-02-28 | 2012-03-27 | Ip Video Communications Corporation | Universal packet loss recovery system for delivery of real-time streaming multimedia content over packet-switched networks |
| CN101477823B (zh) * | 2009-01-21 | 2010-12-29 | 凌阳科技股份有限公司 | 一种解码系统与方法 |
| DE102010006876B4 (de) * | 2010-02-04 | 2012-10-31 | Infineon Technologies Ag | Verfahren und Vorrichtung zur Kodierung von Daten |
| KR20120059806A (ko) * | 2010-12-01 | 2012-06-11 | 한국전자통신연구원 | 에러 정정 부호의 생성방법, 복호 방법 및 그 장치 |
| EP2672387B1 (en) | 2012-06-04 | 2018-08-01 | Amplidata NV | A distributed object storage system |
| US8996969B2 (en) * | 2012-12-08 | 2015-03-31 | Lsi Corporation | Low density parity check decoder with miscorrection handling |
| KR102254102B1 (ko) | 2015-01-23 | 2021-05-20 | 삼성전자주식회사 | 메모리 시스템 및 메모리 시스템의 동작 방법 |
| CN109787713B (zh) * | 2017-11-15 | 2020-10-09 | 华为技术有限公司 | 一种循环冗余校验crc计算方法和装置 |
| US10649841B2 (en) * | 2018-03-05 | 2020-05-12 | Alibaba Group Holding Limited | Supporting multiple page lengths with unique error correction coding via galois field dimension folding |
| CN109191151A (zh) * | 2018-08-23 | 2019-01-11 | 东莞市将为防伪科技有限公司 | 一种防伪方法 |
| CN109472336B (zh) * | 2018-10-16 | 2023-05-02 | 易宝严选科技(深圳)有限公司 | 一种防伪方法 |
| US11031956B2 (en) * | 2019-06-25 | 2021-06-08 | Samsung Electronics Co., Ltd. | Generalized concatenated error correction coding scheme with locality |
| CN110489269B (zh) * | 2019-08-16 | 2023-08-15 | 西安紫光国芯半导体有限公司 | 检测纠正三位错误的编码解码方法、编码解码器及处理器 |
| CN110492889B (zh) * | 2019-08-16 | 2023-05-30 | 西安紫光国芯半导体有限公司 | 检测纠正两位错误的编码解码方法、编码解码器及处理器 |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5247523A (en) * | 1989-07-12 | 1993-09-21 | Hitachi, Ltd. | Code error correction apparatus |
| US5299208A (en) * | 1991-11-14 | 1994-03-29 | International Business Machines Corporation | Enhanced decoding of interleaved error correcting codes |
| EP0603932B1 (en) * | 1992-12-14 | 1998-04-08 | Koninklijke Philips Electronics N.V. | Method and apparatus for implementing a quasi-product code with different degrees of protection against errors |
| US5784387A (en) * | 1994-10-31 | 1998-07-21 | International Business Machines Corporation | Method for detecting start-of-frame, end of frame and idle words in a data stream |
| JPH08204583A (ja) * | 1995-01-20 | 1996-08-09 | Sanyo Electric Co Ltd | ディジタル信号の処理方法および処理装置 |
| KR100756904B1 (ko) * | 1998-04-29 | 2007-09-07 | 코닌클리케 필립스 일렉트로닉스 엔.브이. | 다중워드 정보를 인코딩 및 디코딩하는 방법, 장치 및 기록매체 |
| JPH11328879A (ja) * | 1998-05-19 | 1999-11-30 | Sony Corp | 誤り訂正装置および光ディスク再生装置 |
| EP1040583B1 (en) | 1998-07-27 | 2008-03-26 | Koninklijke Philips Electronics N.V. | Encoding multiword information by wordwise interleaving |
| US6581178B1 (en) * | 1999-02-15 | 2003-06-17 | Nec Corporation | Error correction coding/decoding method and apparatus |
| US6625774B1 (en) * | 1999-10-29 | 2003-09-23 | Stmicroelectronics, Inc. | Redundancy system and method for locating errors in interleaved code words |
| US7356752B2 (en) * | 2000-03-14 | 2008-04-08 | Comtech Telecommunications Corp. | Enhanced turbo product codes |
| US7093179B2 (en) * | 2001-03-22 | 2006-08-15 | University Of Florida | Method and coding means for error-correction utilizing concatenated parity and turbo codes |
-
2003
- 2003-03-14 DE DE60323622T patent/DE60323622D1/de not_active Expired - Fee Related
- 2003-03-14 AU AU2003209596A patent/AU2003209596A1/en not_active Abandoned
- 2003-03-14 EP EP03745852A patent/EP1500200B1/en not_active Expired - Lifetime
- 2003-03-14 CN CNB038076756A patent/CN100539444C/zh not_active Expired - Fee Related
- 2003-03-14 JP JP2003582910A patent/JP4141963B2/ja not_active Expired - Fee Related
- 2003-03-14 WO PCT/IB2003/001003 patent/WO2003085839A1/en not_active Ceased
- 2003-03-14 AT AT03745852T patent/ATE408931T1/de not_active IP Right Cessation
- 2003-03-14 US US10/509,478 patent/US7188295B2/en not_active Expired - Fee Related
- 2003-03-14 KR KR10-2004-7015810A patent/KR20040093748A/ko not_active Abandoned
- 2003-04-02 TW TW092107507A patent/TW200401971A/zh unknown
Also Published As
| Publication number | Publication date |
|---|---|
| AU2003209596A1 (en) | 2003-10-20 |
| TW200401971A (en) | 2004-02-01 |
| JP2005522137A (ja) | 2005-07-21 |
| KR20040093748A (ko) | 2004-11-08 |
| EP1500200B1 (en) | 2008-09-17 |
| AU2003209596A8 (en) | 2003-10-20 |
| DE60323622D1 (de) | 2008-10-30 |
| WO2003085839A1 (en) | 2003-10-16 |
| CN100539444C (zh) | 2009-09-09 |
| US7188295B2 (en) | 2007-03-06 |
| US20050154959A1 (en) | 2005-07-14 |
| EP1500200A1 (en) | 2005-01-26 |
| ATE408931T1 (de) | 2008-10-15 |
| CN1647392A (zh) | 2005-07-27 |
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