JP4116954B2 - 電子部品封止用基板およびそれを用いた電子装置 - Google Patents
電子部品封止用基板およびそれを用いた電子装置 Download PDFInfo
- Publication number
- JP4116954B2 JP4116954B2 JP2003302416A JP2003302416A JP4116954B2 JP 4116954 B2 JP4116954 B2 JP 4116954B2 JP 2003302416 A JP2003302416 A JP 2003302416A JP 2003302416 A JP2003302416 A JP 2003302416A JP 4116954 B2 JP4116954 B2 JP 4116954B2
- Authority
- JP
- Japan
- Prior art keywords
- main surface
- electronic component
- substrate
- insulating substrate
- wiring conductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/162—Disposition
- H01L2924/16235—Connecting to a semiconductor or solid-state bodies, i.e. cap-to-chip
Landscapes
- Micromachines (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2003302416A JP4116954B2 (ja) | 2003-08-27 | 2003-08-27 | 電子部品封止用基板およびそれを用いた電子装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2003302416A JP4116954B2 (ja) | 2003-08-27 | 2003-08-27 | 電子部品封止用基板およびそれを用いた電子装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2005072418A JP2005072418A (ja) | 2005-03-17 |
| JP2005072418A5 JP2005072418A5 (enExample) | 2006-11-30 |
| JP4116954B2 true JP4116954B2 (ja) | 2008-07-09 |
Family
ID=34406686
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2003302416A Expired - Fee Related JP4116954B2 (ja) | 2003-08-27 | 2003-08-27 | 電子部品封止用基板およびそれを用いた電子装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP4116954B2 (enExample) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4550653B2 (ja) * | 2005-04-15 | 2010-09-22 | 富士通株式会社 | マイクロ可動素子および光スイッチング装置 |
| JP4665733B2 (ja) * | 2005-11-25 | 2011-04-06 | パナソニック電工株式会社 | センサエレメント |
| JP5237733B2 (ja) * | 2008-09-22 | 2013-07-17 | アルプス電気株式会社 | Memsセンサ |
-
2003
- 2003-08-27 JP JP2003302416A patent/JP4116954B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2005072418A (ja) | 2005-03-17 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4938779B2 (ja) | 微小電子機械機構装置およびその製造方法 | |
| US7932594B2 (en) | Electronic component sealing substrate for hermetically sealing a micro electronic mechanical system of an electronic component | |
| JP4741621B2 (ja) | 電子部品封止用基板およびそれを用いた電子装置、並びに電子装置の製造方法 | |
| JP4675973B2 (ja) | 微小電子機械装置およびその製造方法ならびに配線基板 | |
| JPWO2008066087A1 (ja) | 微小構造体装置およびその製造方法ならびに封止用基板 | |
| JP4268480B2 (ja) | 電子部品封止用基板およびそれを用いた電子装置 | |
| JP4126459B2 (ja) | 電子部品封止用基板およびそれを用いた電子装置、並びに電子装置の製造方法 | |
| JP4761713B2 (ja) | 電子部品封止用基板および多数個取り用電子部品封止用基板ならびに電子装置の製造方法 | |
| JP2005262382A (ja) | 電子装置およびその製造方法 | |
| JP3842751B2 (ja) | 電子部品封止用基板およびそれを用いた電子装置の製造方法 | |
| JP5013824B2 (ja) | 電子部品封止用基板および複数個取り形態の電子部品封止用基板、並びに電子部品封止用基板を用いた電子装置および電子装置の製造方法 | |
| JP4116954B2 (ja) | 電子部品封止用基板およびそれを用いた電子装置 | |
| JP2005212016A (ja) | 電子部品封止用基板および多数個取り用電子部品封止用基板ならびに電子装置の製造方法 | |
| JP4903540B2 (ja) | 微小電子機械部品封止用基板及び複数個取り形態の微小電子機械部品封止用基板、並びに微小電子機械装置及び微小電子機械装置の製造方法 | |
| JP4434870B2 (ja) | 多数個取り電子部品封止用基板および電子装置ならびに電子装置の製造方法 | |
| JP2006185968A (ja) | 電子装置 | |
| JP4404647B2 (ja) | 電子装置および電子部品封止用基板 | |
| JP2005153067A (ja) | 電子部品封止用基板およびそれを用いた電子装置の製造方法 | |
| JP4731291B2 (ja) | 電子部品封止用基板およびそれを用いた電子装置、電子装置の製造方法 | |
| JP4673670B2 (ja) | 圧電デバイスの製造方法 | |
| JP2006295213A (ja) | 電子部品封止用基板および多数個取り形態の電子部品封止用基板、並びに電子装置 | |
| JP2017212256A (ja) | 電子装置用パッケージおよび電子装置 | |
| JP2006100446A (ja) | 複合構造体および電子部品封止用基板 | |
| JP2014225837A (ja) | 水晶デバイス |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20060822 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20061016 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20061031 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20070130 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20070402 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20080325 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20080418 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110425 Year of fee payment: 3 |
|
| R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110425 Year of fee payment: 3 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110425 Year of fee payment: 3 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120425 Year of fee payment: 4 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120425 Year of fee payment: 4 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130425 Year of fee payment: 5 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140425 Year of fee payment: 6 |
|
| LAPS | Cancellation because of no payment of annual fees |