JP4087344B2 - 電子装置およびその製造方法 - Google Patents
電子装置およびその製造方法 Download PDFInfo
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- JP4087344B2 JP4087344B2 JP2004052833A JP2004052833A JP4087344B2 JP 4087344 B2 JP4087344 B2 JP 4087344B2 JP 2004052833 A JP2004052833 A JP 2004052833A JP 2004052833 A JP2004052833 A JP 2004052833A JP 4087344 B2 JP4087344 B2 JP 4087344B2
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- 239000011347 resin Substances 0.000 claims description 78
- 239000004020 conductor Substances 0.000 claims description 55
- 238000010438 heat treatment Methods 0.000 claims description 47
- 229920001187 thermosetting polymer Polymers 0.000 claims description 44
- 238000000034 method Methods 0.000 claims description 38
- 238000001723 curing Methods 0.000 claims description 27
- 238000007789 sealing Methods 0.000 claims description 22
- 229920000106 Liquid crystal polymer Polymers 0.000 claims description 20
- 239000004977 Liquid-crystal polymers (LCPs) Substances 0.000 claims description 20
- 229920005992 thermoplastic resin Polymers 0.000 claims description 14
- 238000000016 photochemical curing Methods 0.000 claims description 3
- 239000000463 material Substances 0.000 description 12
- 239000002184 metal Substances 0.000 description 7
- 229910052751 metal Inorganic materials 0.000 description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 239000004065 semiconductor Substances 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 6
- 239000010703 silicon Substances 0.000 description 6
- 239000004593 Epoxy Substances 0.000 description 4
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- 239000011888 foil Substances 0.000 description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 238000005304 joining Methods 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- 239000004974 Thermotropic liquid crystal Substances 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
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- 238000002844 melting Methods 0.000 description 1
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- 229920000647 polyepoxide Polymers 0.000 description 1
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- 239000009719 polyimide resin Substances 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
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Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/10155—Shape being other than a cuboid
- H01L2924/10157—Shape being other than a cuboid at the active surface
Landscapes
- Wire Bonding (AREA)
Description
支持層の第1の面と電子部品との間に、硬化前の絶縁性の熱硬化性または光硬化性の樹脂を介在させて、電極が第1の面と対向するように基板上に電子部品を配置する工程と、
電極が支持層を貫通して導体層に接続されるように、支持層のうち、少なくとも、熱可塑性樹脂によって構成された部分を加熱すると共に、基板および電子部品を加圧する加熱・加圧工程と、
硬化前の樹脂を加熱または光の照射によって硬化させる硬化工程と
を備えている。
[第1の実施の形態]
始めに、図1を参照して、本発明の第1の実施の形態に係る電子装置の構成について説明する。図1は本実施の形態に係る電子装置の断面図である。図1に示したように、本実施の形態に係る電子装置1は、基板10と、この基板10に実装された電子部品20とを備えている。
次に、図5を参照して本発明の第2の実施の形態に係る電子装置およびその製造方法について説明する。図5は、本実施の形態に係る電子装置の製造方法における加熱・加圧工程を説明するため説明図である。
次に、図6を参照して本発明の第3の実施の形態に係る電子装置およびその製造方法について説明する。図6は、本実施の形態に係る電子装置の断面図である。
次に、図7を参照して本発明の第4の実施の形態に係る電子装置およびその製造方法について説明する。図7は、本実施の形態に係る電子装置の断面図である。
以下、第1の実施の形態における実施例を示すが、本発明は以下の実施例に限定されるものではない。
Claims (5)
- 基板と、この基板に実装された電子部品とを備えた電子装置であって、
前記電子部品は、前記基板に対向する基板対向面を有する本体と、この本体の前記基板対向面に設けられた電極とを含み、
前記基板は、前記電子部品の本体に対向する第1の面およびこの第1の面とは反対側の第2の面を有する絶縁性の支持層と、前記支持層の第2の面に配置された導体層とを含み、
前記電極は、前記支持層を貫通して前記導体層に接続され、
前記支持層のうち、少なくとも、前記電極を囲う部分は、熱可塑性樹脂によって構成され、
電子装置は、更に、前記支持層の第1の面の上に配置され、且つ熱硬化性または光硬化性の樹脂を硬化させることによって形成され、前記基板と前記電子部品とを接合すると共に前記基板と前記電子部品との間の隙間を封止する封止用樹脂層を備えたことを特徴とする電子装置。 - 前記熱可塑性樹脂は液晶ポリマーであることを特徴とする請求項1記載の電子装置。
- 基板と、この基板に実装された電子部品とを備え、前記電子部品は、前記基板に対向する基板対向面を有する本体と、この本体の前記基板対向面に設けられた電極とを含み、前記基板は、前記電子部品の本体に対向する第1の面およびこの第1の面とは反対側の第2の面を有する絶縁性の支持層と、前記支持層の第2の面に配置された導体層とを含み、前記電極は、前記支持層を貫通して前記導体層に接続され、前記支持層のうち、少なくとも、前記電極を囲う部分は、熱可塑性樹脂によって構成された電子装置を製造する方法であって、
前記支持層の第1の面と前記電子部品との間に、硬化前の絶縁性の熱硬化性または光硬化性の樹脂を介在させて、前記電極が前記第1の面と対向するように前記基板上に前記電子部品を配置する工程と、
前記電極が前記支持層を貫通して前記導体層に接続されるように、前記支持層のうち、少なくとも、熱可塑性樹脂によって構成された部分を加熱すると共に、前記基板および電子部品を加圧する加熱・加圧工程と、
前記硬化前の樹脂を加熱または光の照射によって硬化させる硬化工程と
を備えたことを特徴とする電子装置の製造方法。 - 前記熱可塑性樹脂は液晶ポリマーであることを特徴とする請求項3記載の電子装置の製造方法。
- 前記加熱・加圧工程と前記硬化工程は同時に行なわれることを特徴とする請求項3または4記載の電子装置の製造方法。
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JP2004052833A JP4087344B2 (ja) | 2004-02-27 | 2004-02-27 | 電子装置およびその製造方法 |
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JP2004052833A JP4087344B2 (ja) | 2004-02-27 | 2004-02-27 | 電子装置およびその製造方法 |
Publications (2)
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JP2005243989A JP2005243989A (ja) | 2005-09-08 |
JP4087344B2 true JP4087344B2 (ja) | 2008-05-21 |
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JP2004052833A Expired - Fee Related JP4087344B2 (ja) | 2004-02-27 | 2004-02-27 | 電子装置およびその製造方法 |
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Families Citing this family (1)
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KR101614449B1 (ko) | 2009-01-22 | 2016-04-21 | 삼성전자주식회사 | 전이 금속/탄소 나노튜브 복합체 및 이의 제조 방법 |
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