JP4076079B2 - 半導体集積回路装置および半導体集積回路 - Google Patents

半導体集積回路装置および半導体集積回路 Download PDF

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Publication number
JP4076079B2
JP4076079B2 JP2003001825A JP2003001825A JP4076079B2 JP 4076079 B2 JP4076079 B2 JP 4076079B2 JP 2003001825 A JP2003001825 A JP 2003001825A JP 2003001825 A JP2003001825 A JP 2003001825A JP 4076079 B2 JP4076079 B2 JP 4076079B2
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Japan
Prior art keywords
wiring
mos transistor
input
pair
terminal
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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JP2003001825A
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English (en)
Japanese (ja)
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JP2004215137A (ja
JP2004215137A5 (enExample
Inventor
隆 武藤
敏郎 高橋
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Hitachi Ltd
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Hitachi Ltd
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Publication date
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Priority to JP2003001825A priority Critical patent/JP4076079B2/ja
Priority to US10/751,917 priority patent/US7053670B2/en
Publication of JP2004215137A publication Critical patent/JP2004215137A/ja
Publication of JP2004215137A5 publication Critical patent/JP2004215137A5/ja
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/0272—Arrangements for coupling to multiple lines, e.g. for differential transmission
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/003—Changing the DC level
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H10D84/907—CMOS gate arrays
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/0292—Arrangements specific to the receiver end

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Amplifiers (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
JP2003001825A 2003-01-08 2003-01-08 半導体集積回路装置および半導体集積回路 Expired - Fee Related JP4076079B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2003001825A JP4076079B2 (ja) 2003-01-08 2003-01-08 半導体集積回路装置および半導体集積回路
US10/751,917 US7053670B2 (en) 2003-01-08 2004-01-07 Semiconductor integrated circuit device and semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003001825A JP4076079B2 (ja) 2003-01-08 2003-01-08 半導体集積回路装置および半導体集積回路

Publications (3)

Publication Number Publication Date
JP2004215137A JP2004215137A (ja) 2004-07-29
JP2004215137A5 JP2004215137A5 (enExample) 2006-02-23
JP4076079B2 true JP4076079B2 (ja) 2008-04-16

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ID=32767188

Family Applications (1)

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JP2003001825A Expired - Fee Related JP4076079B2 (ja) 2003-01-08 2003-01-08 半導体集積回路装置および半導体集積回路

Country Status (2)

Country Link
US (1) US7053670B2 (enExample)
JP (1) JP4076079B2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8884680B2 (en) 2011-05-13 2014-11-11 Panasonic Corporation Signal electric potential conversion circuit

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2263061C (en) * 1999-02-26 2011-01-25 Ki-Jun Lee Dual control analog delay element
US7692453B2 (en) * 2004-08-11 2010-04-06 Atmel Corporation Detector of differential threshold voltage
JP2006211514A (ja) * 2005-01-31 2006-08-10 Kawasaki Microelectronics Kk 出力回路を備えた半導体集積回路
JP4546288B2 (ja) * 2005-02-28 2010-09-15 株式会社リコー 差動出力回路及びその差動出力回路を有する半導体装置
US7190193B1 (en) * 2005-04-21 2007-03-13 Xilinx, Inc. Method and apparatus for a differential driver with voltage translation
US20070159744A1 (en) * 2006-01-06 2007-07-12 Ramen Dutta High voltage pin for low voltage process
US7525384B2 (en) * 2006-10-17 2009-04-28 Avago Technologies Wireless Ip (Singapore) Pte. Ltd. Transmission line amplifier
US7701259B2 (en) * 2006-12-06 2010-04-20 Broadcom Corporation Method and system for wide range amplitude detection
US7594198B2 (en) * 2007-02-27 2009-09-22 Taiwan Semiconductor Manufacturing Co., Ltd. Ultra fine pitch I/O design for microchips
US7609093B2 (en) * 2007-08-03 2009-10-27 Tower Semiconductor Ltd. Comparator with low supply current spike and input offset cancellation
JP5407226B2 (ja) * 2008-09-01 2014-02-05 富士通株式会社 信号伝送システム評価装置、信号伝送システム評価プログラム、信号伝送システム設計方法
JP5421300B2 (ja) * 2011-01-19 2014-02-19 日本電信電話株式会社 クロック入力インターフェース回路
JP2014007458A (ja) * 2012-06-21 2014-01-16 Nec Engineering Ltd 受信回路
JP6106045B2 (ja) * 2013-03-22 2017-03-29 株式会社東芝 受光回路

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4577162A (en) * 1985-04-29 1986-03-18 Motorola, Inc. Clocked gain stage having differential inputs and outputs
US5032744A (en) * 1989-10-31 1991-07-16 Vlsi Technology, Inc. High speed comparator with offset cancellation
JPH10145348A (ja) * 1996-09-13 1998-05-29 Nec Corp クロック抽出回路
JP3697847B2 (ja) * 1997-08-21 2005-09-21 ソニー株式会社 電圧制御発振回路
US5990707A (en) * 1997-09-05 1999-11-23 Cirrus Logic, Inc. Method and system for sliced integration of flash analog to digital converters in read channel circuits
US6459306B1 (en) * 1999-07-22 2002-10-01 Lucent Technologies Inc. Low power differential comparator with stable hysteresis
US6529070B1 (en) * 1999-10-25 2003-03-04 Texas Instruments Incorporated Low-voltage, broadband operational amplifier
TW445714B (en) * 2000-05-05 2001-07-11 Ind Tech Res Inst Capacitor-coupled differential logic circuit
US6617899B2 (en) * 2001-05-25 2003-09-09 Infineon Technologies Ag Ultra high speed clocked analog latch
US6628224B1 (en) * 2002-05-24 2003-09-30 Broadcom Corporation Distributed averaging analog to digital converter topology

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8884680B2 (en) 2011-05-13 2014-11-11 Panasonic Corporation Signal electric potential conversion circuit

Also Published As

Publication number Publication date
US20040150459A1 (en) 2004-08-05
US7053670B2 (en) 2006-05-30
JP2004215137A (ja) 2004-07-29

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