JP4066638B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP4066638B2
JP4066638B2 JP2001341365A JP2001341365A JP4066638B2 JP 4066638 B2 JP4066638 B2 JP 4066638B2 JP 2001341365 A JP2001341365 A JP 2001341365A JP 2001341365 A JP2001341365 A JP 2001341365A JP 4066638 B2 JP4066638 B2 JP 4066638B2
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dummy
circuit
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Japanese (ja)
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JP2002222589A5 (enExample
JP2002222589A (ja
Inventor
悟 半澤
健 阪田
秀行 松岡
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Hitachi Ltd
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Hitachi Ltd
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  • For Increasing The Reliability Of Semiconductor Memories (AREA)
JP2001341365A 2000-11-27 2001-11-07 半導体装置 Expired - Fee Related JP4066638B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001341365A JP4066638B2 (ja) 2000-11-27 2001-11-07 半導体装置

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2000364543 2000-11-27
JP2000-364543 2000-11-27
JP2001341365A JP4066638B2 (ja) 2000-11-27 2001-11-07 半導体装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2007179193A Division JP4577334B2 (ja) 2000-11-27 2007-07-09 半導体装置

Publications (3)

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JP2002222589A JP2002222589A (ja) 2002-08-09
JP2002222589A5 JP2002222589A5 (enExample) 2005-07-07
JP4066638B2 true JP4066638B2 (ja) 2008-03-26

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JP2001341365A Expired - Fee Related JP4066638B2 (ja) 2000-11-27 2001-11-07 半導体装置

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Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4679036B2 (ja) * 2002-09-12 2011-04-27 ルネサスエレクトロニクス株式会社 記憶装置
JP3733468B2 (ja) * 2002-11-01 2006-01-11 松下電器産業株式会社 抵抗変化素子を用いた不揮発性フリップフロップ回路の駆動方法
JP2004241013A (ja) * 2003-02-03 2004-08-26 Renesas Technology Corp 半導体記憶装置
JP4170108B2 (ja) 2003-02-20 2008-10-22 株式会社ルネサステクノロジ 磁気記憶装置
US7453719B2 (en) 2003-04-21 2008-11-18 Nec Corporation Magnetic random access memory with improved data reading method
JP4689973B2 (ja) * 2004-06-09 2011-06-01 ルネサスエレクトロニクス株式会社 半導体記憶装置
US7321507B2 (en) * 2005-11-21 2008-01-22 Magic Technologies, Inc. Reference cell scheme for MRAM
US7495971B2 (en) * 2006-04-19 2009-02-24 Infineon Technologies Ag Circuit and a method of determining the resistive state of a resistive memory cell
JP5076175B2 (ja) * 2007-09-20 2012-11-21 ルネサスエレクトロニクス株式会社 不揮発性半導体記憶装置
JP4679627B2 (ja) * 2008-10-29 2011-04-27 ルネサスエレクトロニクス株式会社 薄膜磁性体記憶装置
WO2011055420A1 (ja) * 2009-11-04 2011-05-12 ルネサスエレクトロニクス株式会社 半導体装置
US8446753B2 (en) * 2010-03-25 2013-05-21 Qualcomm Incorporated Reference cell write operations at a memory
JP5283724B2 (ja) * 2011-03-25 2013-09-04 ルネサスエレクトロニクス株式会社 薄膜磁性体記憶装置
WO2013031126A1 (ja) * 2011-08-31 2013-03-07 パナソニック株式会社 読み出し回路およびこれを用いた不揮発性メモリ
JP5929268B2 (ja) * 2012-02-06 2016-06-01 凸版印刷株式会社 不揮発性メモリセルアレイ、および不揮発性メモリ
US9147457B2 (en) * 2012-09-13 2015-09-29 Qualcomm Incorporated Reference cell repair scheme
JP2015053096A (ja) 2013-09-09 2015-03-19 マイクロン テクノロジー， インク． 半導体装置、及び誤り訂正方法
US10381102B2 (en) 2014-04-30 2019-08-13 Micron Technology, Inc. Memory devices having a read function of data stored in a plurality of reference cells
JP6341795B2 (ja) 2014-08-05 2018-06-13 ルネサスエレクトロニクス株式会社 マイクロコンピュータ及びマイクロコンピュータシステム

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