JP4057762B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

Info

Publication number
JP4057762B2
JP4057762B2 JP2000123839A JP2000123839A JP4057762B2 JP 4057762 B2 JP4057762 B2 JP 4057762B2 JP 2000123839 A JP2000123839 A JP 2000123839A JP 2000123839 A JP2000123839 A JP 2000123839A JP 4057762 B2 JP4057762 B2 JP 4057762B2
Authority
JP
Japan
Prior art keywords
film
insulating film
hard mask
semiconductor device
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2000123839A
Other languages
English (en)
Japanese (ja)
Other versions
JP2001308178A (ja
JP2001308178A5 (https=
Inventor
和里 原
圭亮 船津
俊則 今井
純司 野口
直史 大橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Technology Corp
Original Assignee
Renesas Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Technology Corp filed Critical Renesas Technology Corp
Priority to JP2000123839A priority Critical patent/JP4057762B2/ja
Priority to TW090108015A priority patent/TW508784B/zh
Priority to US09/823,975 priority patent/US6495466B2/en
Priority to KR1020010021109A priority patent/KR100783868B1/ko
Publication of JP2001308178A publication Critical patent/JP2001308178A/ja
Priority to US10/298,585 priority patent/US6734104B2/en
Publication of JP2001308178A5 publication Critical patent/JP2001308178A5/ja
Application granted granted Critical
Publication of JP4057762B2 publication Critical patent/JP4057762B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/042Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers
    • H10W20/043Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers for electroplating
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/042Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers
    • H10W20/044Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers for electroless plating
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/062Manufacture or treatment of conductive parts of the interconnections by smoothing of conductive parts, e.g. by planarisation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/074Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/074Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/075Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers of multilayered thin functional dielectric layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/081Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/093Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/097Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by thermally treating

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
JP2000123839A 2000-04-25 2000-04-25 半導体装置の製造方法 Expired - Fee Related JP4057762B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2000123839A JP4057762B2 (ja) 2000-04-25 2000-04-25 半導体装置の製造方法
TW090108015A TW508784B (en) 2000-04-25 2001-04-03 Method of manufacturing a semiconductor device and a semiconductor device
US09/823,975 US6495466B2 (en) 2000-04-25 2001-04-03 Method of manufacturing a semiconductor device and a semiconductor device
KR1020010021109A KR100783868B1 (ko) 2000-04-25 2001-04-19 반도체장치의 제조방법 및 반도체장치
US10/298,585 US6734104B2 (en) 2000-04-25 2002-11-19 Method of manufacturing a semiconductor device and a semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000123839A JP4057762B2 (ja) 2000-04-25 2000-04-25 半導体装置の製造方法

Publications (3)

Publication Number Publication Date
JP2001308178A JP2001308178A (ja) 2001-11-02
JP2001308178A5 JP2001308178A5 (https=) 2006-03-30
JP4057762B2 true JP4057762B2 (ja) 2008-03-05

Family

ID=18634066

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000123839A Expired - Fee Related JP4057762B2 (ja) 2000-04-25 2000-04-25 半導体装置の製造方法

Country Status (4)

Country Link
US (2) US6495466B2 (https=)
JP (1) JP4057762B2 (https=)
KR (1) KR100783868B1 (https=)
TW (1) TW508784B (https=)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010030169A1 (en) * 2000-04-13 2001-10-18 Hideo Kitagawa Method of etching organic film and method of producing element
US6800918B2 (en) * 2001-04-18 2004-10-05 Intel Corporation EMI and noise shielding for multi-metal layer high frequency integrated circuit processes
JP2003142579A (ja) * 2001-11-07 2003-05-16 Hitachi Ltd 半導体装置の製造方法および半導体装置
US6949411B1 (en) * 2001-12-27 2005-09-27 Lam Research Corporation Method for post-etch and strip residue removal on coral films
US20030215570A1 (en) * 2002-05-16 2003-11-20 Applied Materials, Inc. Deposition of silicon nitride
US20050062164A1 (en) * 2003-09-23 2005-03-24 Taiwan Semiconductor Manufacturing Co., Ltd. Method for improving time dependent dielectric breakdown lifetimes
US7444867B2 (en) * 2005-01-04 2008-11-04 Bell Geospace, Inc. Accelerometer and rate sensor package for gravity gradiometer instruments
KR101674989B1 (ko) 2013-05-21 2016-11-22 제일모직 주식회사 레지스트 하층막용 조성물, 이를 사용한 패턴 형성 방법 및 상기 패턴을 포함하는 반도체 집적회로 디바이스
CN103996618B (zh) * 2014-05-09 2017-01-18 上海大学 Tft电极引线制造方法
CN103996653B (zh) * 2014-05-09 2017-01-04 上海大学 Tft深接触孔制造方法
US12454752B2 (en) * 2022-01-14 2025-10-28 Asm Ip Holding B.V. Method and apparatus for forming a patterned structure on a substrate

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09139423A (ja) 1995-11-13 1997-05-27 Hitachi Ltd 半導体集積回路装置およびその製造方法
JP3660799B2 (ja) 1997-09-08 2005-06-15 株式会社ルネサステクノロジ 半導体集積回路装置の製造方法
JP3300643B2 (ja) 1997-09-09 2002-07-08 株式会社東芝 半導体装置の製造方法
US6066569A (en) * 1997-09-30 2000-05-23 Siemens Aktiengesellschaft Dual damascene process for metal layers and organic intermetal layers
TW337608B (en) * 1997-10-29 1998-08-01 United Microelectronics Corp Process for producing unlanded via
DE19756988C1 (de) * 1997-12-20 1999-09-02 Daimler Benz Ag Elektrisch beheizbare Glühkerze oder Glühstab für Verbrennungsmotoren
JP3107047B2 (ja) * 1998-05-28 2000-11-06 日本電気株式会社 半導体装置の製造方法
JP3186040B2 (ja) * 1998-06-01 2001-07-11 日本電気株式会社 半導体装置の製造方法
KR20000019171A (ko) * 1998-09-09 2000-04-06 윤종용 감광성 폴리머를 사용하는 금속배선 형성방법
US6184142B1 (en) * 1999-04-26 2001-02-06 United Microelectronics Corp. Process for low k organic dielectric film etch
US6165891A (en) * 1999-11-22 2000-12-26 Chartered Semiconductor Manufacturing Ltd. Damascene structure with reduced capacitance using a carbon nitride, boron nitride, or boron carbon nitride passivation layer, etch stop layer, and/or cap layer
US6261963B1 (en) * 2000-07-07 2001-07-17 Advanced Micro Devices, Inc. Reverse electroplating of barrier metal layer to improve electromigration performance in copper interconnect devices

Also Published As

Publication number Publication date
US6495466B2 (en) 2002-12-17
US6734104B2 (en) 2004-05-11
JP2001308178A (ja) 2001-11-02
KR100783868B1 (ko) 2007-12-10
TW508784B (en) 2002-11-01
KR20010098743A (ko) 2001-11-08
US20030073317A1 (en) 2003-04-17
US20010034132A1 (en) 2001-10-25

Similar Documents

Publication Publication Date Title
JP3660799B2 (ja) 半導体集積回路装置の製造方法
KR100798166B1 (ko) 반도체장치 및 그 제조방법
TWI484554B (zh) Semiconductor device and manufacturing method thereof
CN100470787C (zh) 半导体器件及其制造方法
US7514354B2 (en) Methods for forming damascene wiring structures having line and plug conductors formed from different materials
JP4012381B2 (ja) 導電層の剥離を抑制できる半導体素子及びその製造方法
CN100372097C (zh) 制作集成电路中铜互连线的方法
JP4057762B2 (ja) 半導体装置の製造方法
TW202303759A (zh) 內連線結構的形成方法
JP2003100746A (ja) 半導体装置の製造方法
JP2000003912A (ja) 半導体装置の製造方法および半導体装置
JP2001176965A (ja) 半導体装置及びその製造方法
KR100827498B1 (ko) 다마신을 이용한 금속 배선의 제조 방법
JP4232215B2 (ja) 半導体装置の製造方法
JP2002270689A (ja) 半導体装置の製造方法
JP4472286B2 (ja) 変形されたデュアルダマシン工程を利用した半導体素子の金属配線形成方法
JPH11307528A (ja) 半導体装置およびその製造方法
KR101005737B1 (ko) 반도체 소자의 금속배선 형성방법
KR101103550B1 (ko) 반도체 소자의 금속배선 형성방법
KR100574645B1 (ko) 텅스텐 플러그 형성 방법
JP2001044201A (ja) 半導体集積回路装置の製造方法
JP2000058638A (ja) 半導体装置及びその製造方法
JP2003133314A (ja) 半導体装置の製造方法
KR100772249B1 (ko) 듀얼 다마신을 이용한 금속 배선의 제조 방법
KR20040077307A (ko) 다마신 금속 배선 형성방법

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20040527

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20040527

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20060215

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20061101

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20070904

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20071101

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20071204

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20071214

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

Ref document number: 4057762

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20101221

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20101221

Year of fee payment: 3

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313111

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20101221

Year of fee payment: 3

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20101221

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20111221

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20121221

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20121221

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20131221

Year of fee payment: 6

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

LAPS Cancellation because of no payment of annual fees