JP4047513B2 - 半導体集積回路及びその製造方法 - Google Patents

半導体集積回路及びその製造方法 Download PDF

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Publication number
JP4047513B2
JP4047513B2 JP2000074654A JP2000074654A JP4047513B2 JP 4047513 B2 JP4047513 B2 JP 4047513B2 JP 2000074654 A JP2000074654 A JP 2000074654A JP 2000074654 A JP2000074654 A JP 2000074654A JP 4047513 B2 JP4047513 B2 JP 4047513B2
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Japan
Prior art keywords
gate
source
gate electrode
layer
silicon nitride
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Expired - Fee Related
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JP2000074654A
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Japanese (ja)
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JP2001267533A5 (enExample
JP2001267533A (ja
Inventor
くみ 小口
隆之 岡村
聡 大拔
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Toshiba Corp
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Toshiba Corp
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Priority to JP2000074654A priority Critical patent/JP4047513B2/ja
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Publication of JP2001267533A5 publication Critical patent/JP2001267533A5/ja
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  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP2000074654A 2000-03-16 2000-03-16 半導体集積回路及びその製造方法 Expired - Fee Related JP4047513B2 (ja)

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JP2000074654A JP4047513B2 (ja) 2000-03-16 2000-03-16 半導体集積回路及びその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000074654A JP4047513B2 (ja) 2000-03-16 2000-03-16 半導体集積回路及びその製造方法

Publications (3)

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JP2001267533A JP2001267533A (ja) 2001-09-28
JP2001267533A5 JP2001267533A5 (enExample) 2005-04-28
JP4047513B2 true JP4047513B2 (ja) 2008-02-13

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JP2000074654A Expired - Fee Related JP4047513B2 (ja) 2000-03-16 2000-03-16 半導体集積回路及びその製造方法

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Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7368775B2 (en) * 2004-07-31 2008-05-06 Taiwan Semiconductor Manufacturing Co., Ltd. Single transistor DRAM cell with reduced current leakage and method of manufacture
JP5076570B2 (ja) 2007-03-16 2012-11-21 富士通セミコンダクター株式会社 半導体装置とその製造方法

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JP2001267533A (ja) 2001-09-28

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