JP4030982B2 - 半導体装置および半導体装置の製造方法 - Google Patents
半導体装置および半導体装置の製造方法 Download PDFInfo
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- JP4030982B2 JP4030982B2 JP2004140431A JP2004140431A JP4030982B2 JP 4030982 B2 JP4030982 B2 JP 4030982B2 JP 2004140431 A JP2004140431 A JP 2004140431A JP 2004140431 A JP2004140431 A JP 2004140431A JP 4030982 B2 JP4030982 B2 JP 4030982B2
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- 239000004065 semiconductor Substances 0.000 title claims description 46
- 238000004519 manufacturing process Methods 0.000 title claims description 20
- 238000005530 etching Methods 0.000 claims description 61
- 239000000463 material Substances 0.000 claims description 49
- 238000000034 method Methods 0.000 claims description 47
- 238000001312 dry etching Methods 0.000 claims description 33
- 229910000990 Ni alloy Inorganic materials 0.000 claims description 24
- 229910052594 sapphire Inorganic materials 0.000 claims description 17
- 239000010980 sapphire Substances 0.000 claims description 17
- 238000001020 plasma etching Methods 0.000 claims description 15
- 238000007747 plating Methods 0.000 claims description 15
- 239000006185 dispersion Substances 0.000 claims description 13
- 229910002704 AlGaN Inorganic materials 0.000 claims description 10
- 229910045601 alloy Inorganic materials 0.000 claims description 8
- 239000000956 alloy Substances 0.000 claims description 8
- 238000009616 inductively coupled plasma Methods 0.000 claims description 8
- 238000000059 patterning Methods 0.000 claims description 6
- 229910052698 phosphorus Inorganic materials 0.000 claims description 4
- 229910052709 silver Inorganic materials 0.000 claims description 4
- 238000004544 sputter deposition Methods 0.000 claims description 4
- 229910052718 tin Inorganic materials 0.000 claims description 4
- 238000001771 vacuum deposition Methods 0.000 claims description 3
- 239000010408 film Substances 0.000 description 74
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 32
- 229910002601 GaN Inorganic materials 0.000 description 31
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 23
- 229910010271 silicon carbide Inorganic materials 0.000 description 22
- 239000000758 substrate Substances 0.000 description 21
- 239000010410 layer Substances 0.000 description 20
- 229920002120 photoresistant polymer Polymers 0.000 description 10
- 238000010586 diagram Methods 0.000 description 9
- 230000000694 effects Effects 0.000 description 8
- 239000010935 stainless steel Substances 0.000 description 8
- 229910001220 stainless steel Inorganic materials 0.000 description 8
- 238000005336 cracking Methods 0.000 description 7
- 239000010453 quartz Substances 0.000 description 5
- 238000006722 reduction reaction Methods 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 238000002474 experimental method Methods 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 229910052759 nickel Inorganic materials 0.000 description 3
- 150000004767 nitrides Chemical class 0.000 description 3
- 238000007740 vapor deposition Methods 0.000 description 3
- 239000013078 crystal Substances 0.000 description 2
- 239000010432 diamond Substances 0.000 description 2
- 229910003460 diamond Inorganic materials 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 229910017937 Ag-Ni Inorganic materials 0.000 description 1
- 229910017984 Ag—Ni Inorganic materials 0.000 description 1
- 229910018487 Ni—Cr Inorganic materials 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000003638 chemical reducing agent Substances 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 239000008151 electrolyte solution Substances 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 229910052736 halogen Inorganic materials 0.000 description 1
- 150000002367 halogens Chemical class 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/3086—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0332—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their composition, e.g. multilayer masks, materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
- H01L21/0475—Changing the shape of the semiconductor body, e.g. forming recesses
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Crystallography & Structural Chemistry (AREA)
- Electrodes Of Semiconductors (AREA)
- Drying Of Semiconductors (AREA)
- Junction Field-Effect Transistors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Led Devices (AREA)
Description
12 ステンレスマスク
22、42 Ti膜
23、43、53 フォトレジストマスク
24、44 Ni膜
25、45、55 バイアホール
54 Ni合金膜
Claims (8)
- GaN系半導体層、SiCまたはサファイアからなる被エッチング材料の表面にTi膜と分散メッキ法によって成膜されるNi合金膜とを順次成膜して積層膜を形成する第1のステップと、
前記積層膜にパターニングを施して前記エッチング材料表面の一部領域を暴露する第2のステップと、
前記暴露された前記被エッチング材料表面にドライエッチングを施す第3のステップとを備えていることを特徴とする半導体装置の製造方法。 - 前記第2のステップにおける前記積層膜のパターニングは、前記被エッチング材料上に所定のマスクを設け、前記積層膜を形成した後に前記マスクを除去することでなされるリフトオフ工程であることを特徴とする請求項1に記載の半導体装置の製造方法。
- 前記第3のステップにおけるドライエッチングは、反応性イオンエッチング法、電子サイクロトロン共鳴エッチング法、または誘導結合型プラズマエッチング法の何れかにより実行されることを特徴とする請求項1に記載の半導体装置の製造方法。
- 前記GaN系半導体層は、InGaN、AlGaNもしくはInGaNPであることを特徴とする請求項1に記載の半導体装置の製造方法。
- 前記Ti膜は、真空蒸着法またはスパッタリング法により成膜されることを特徴とする請求項1に記載の半導体装置の製造方法。
- 前記Ti膜の厚みは10〜30nmであることを特徴とする請求項1に記載の半導体装置の製造方法。
- 前記Ti膜の厚みは概ね20nmであることを特徴とする請求項6に記載の半導体装置の製造方法。
- 前記Ni合金膜は、Niと、Ag、Sn、P、またはBとの合金により構成されることを特徴とする請求項1に記載の半導体装置の製造方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004140431A JP4030982B2 (ja) | 2004-05-10 | 2004-05-10 | 半導体装置および半導体装置の製造方法 |
US11/125,137 US20050250336A1 (en) | 2004-05-10 | 2005-05-10 | Semiconductor device and method for fabricating the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004140431A JP4030982B2 (ja) | 2004-05-10 | 2004-05-10 | 半導体装置および半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005322811A JP2005322811A (ja) | 2005-11-17 |
JP4030982B2 true JP4030982B2 (ja) | 2008-01-09 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004140431A Expired - Lifetime JP4030982B2 (ja) | 2004-05-10 | 2004-05-10 | 半導体装置および半導体装置の製造方法 |
Country Status (2)
Country | Link |
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US (1) | US20050250336A1 (ja) |
JP (1) | JP4030982B2 (ja) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4612534B2 (ja) * | 2005-12-01 | 2011-01-12 | 三菱電機株式会社 | 半導体装置の製造方法 |
JP4516538B2 (ja) * | 2006-03-01 | 2010-08-04 | 住友電工デバイス・イノベーション株式会社 | 半導体装置の製造方法 |
JP2008098456A (ja) * | 2006-10-13 | 2008-04-24 | Eudyna Devices Inc | 半導体装置の製造方法 |
JP2008226962A (ja) * | 2007-03-09 | 2008-09-25 | Sumitomo Chemical Co Ltd | 半導体発光素子およびその製造方法 |
JP5135879B2 (ja) | 2007-05-21 | 2013-02-06 | 富士電機株式会社 | 炭化珪素半導体装置の製造方法 |
JP2009246227A (ja) | 2008-03-31 | 2009-10-22 | Toshiba Corp | 半導体装置 |
JP2009267358A (ja) | 2008-04-03 | 2009-11-12 | Toshiba Corp | 半導体装置 |
JP5179455B2 (ja) | 2009-10-27 | 2013-04-10 | Sppテクノロジーズ株式会社 | プラズマエッチング方法 |
JP5566803B2 (ja) | 2010-07-21 | 2014-08-06 | 住友電工デバイス・イノベーション株式会社 | 半導体装置の製造方法 |
CN102110592A (zh) * | 2010-12-02 | 2011-06-29 | 南京大学扬州光电研究院 | 用于干法刻蚀的蓝宝石衬底表面加工前期生产方法 |
CN104599949A (zh) * | 2014-12-30 | 2015-05-06 | 上海师范大学 | 基于SiC衬底片深刻蚀光滑表面的加工工艺 |
CN106910711A (zh) * | 2017-02-13 | 2017-06-30 | 苏州本然微电子有限公司 | 一种用于GaN HEMT芯片生产中通孔的刻蚀方法 |
JP7258719B2 (ja) | 2019-10-24 | 2023-04-17 | 株式会社ノリタケカンパニーリミテド | ダイヤモンドドレッサ |
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FR2633451B1 (fr) * | 1988-06-24 | 1990-10-05 | Labo Electronique Physique | Procede de realisation de dispositifs semiconducteurs incluant au moins une etape de gravure ionique reactive |
JP3292044B2 (ja) * | 1996-05-31 | 2002-06-17 | 豊田合成株式会社 | p伝導形3族窒化物半導体の電極パッド及びそれを有した素子及び素子の製造方法 |
US6106907A (en) * | 1996-06-25 | 2000-08-22 | Canon Kabushiki Kaisha | Electrode plate, liquid crystal device and production thereof |
JP4217778B2 (ja) * | 2003-04-11 | 2009-02-04 | 古河電気工業株式会社 | 抵抗層付き導電性基材、抵抗層付き回路基板及び抵抗回路配線板 |
US7074631B2 (en) * | 2003-04-15 | 2006-07-11 | Luminus Devices, Inc. | Light emitting device methods |
-
2004
- 2004-05-10 JP JP2004140431A patent/JP4030982B2/ja not_active Expired - Lifetime
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2005
- 2005-05-10 US US11/125,137 patent/US20050250336A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
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JP2005322811A (ja) | 2005-11-17 |
US20050250336A1 (en) | 2005-11-10 |
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