JP3956771B2 - 半導体装置用接着剤シート、半導体接続用基板ならびに半導体装置 - Google Patents

半導体装置用接着剤シート、半導体接続用基板ならびに半導体装置 Download PDF

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Publication number
JP3956771B2
JP3956771B2 JP2002146210A JP2002146210A JP3956771B2 JP 3956771 B2 JP3956771 B2 JP 3956771B2 JP 2002146210 A JP2002146210 A JP 2002146210A JP 2002146210 A JP2002146210 A JP 2002146210A JP 3956771 B2 JP3956771 B2 JP 3956771B2
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JP
Japan
Prior art keywords
adhesive
semiconductor
semiconductor device
layer
adhesive sheet
Prior art date
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Expired - Fee Related
Application number
JP2002146210A
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English (en)
Japanese (ja)
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JP2003338580A (ja
JP2003338580A5 (enExample
Inventor
洋子 大澤
純子 岩崎
将次 木越
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toray Industries Inc
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Toray Industries Inc
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Publication date
Application filed by Toray Industries Inc filed Critical Toray Industries Inc
Priority to JP2002146210A priority Critical patent/JP3956771B2/ja
Publication of JP2003338580A publication Critical patent/JP2003338580A/ja
Publication of JP2003338580A5 publication Critical patent/JP2003338580A5/ja
Application granted granted Critical
Publication of JP3956771B2 publication Critical patent/JP3956771B2/ja
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Expired - Fee Related legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/4824Connecting between the body and an opposite side of the item with respect to the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73215Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Landscapes

  • Adhesive Tapes (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Wire Bonding (AREA)
JP2002146210A 2002-05-21 2002-05-21 半導体装置用接着剤シート、半導体接続用基板ならびに半導体装置 Expired - Fee Related JP3956771B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002146210A JP3956771B2 (ja) 2002-05-21 2002-05-21 半導体装置用接着剤シート、半導体接続用基板ならびに半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002146210A JP3956771B2 (ja) 2002-05-21 2002-05-21 半導体装置用接着剤シート、半導体接続用基板ならびに半導体装置

Publications (3)

Publication Number Publication Date
JP2003338580A JP2003338580A (ja) 2003-11-28
JP2003338580A5 JP2003338580A5 (enExample) 2005-10-06
JP3956771B2 true JP3956771B2 (ja) 2007-08-08

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002146210A Expired - Fee Related JP3956771B2 (ja) 2002-05-21 2002-05-21 半導体装置用接着剤シート、半導体接続用基板ならびに半導体装置

Country Status (1)

Country Link
JP (1) JP3956771B2 (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2679822B1 (fr) * 1991-07-30 1995-07-21 Protechnic Sa Procede de fabrication d'un produit thermocollant, dispositif pour la mise en óoeuvre de ce procede et produit ainsi obtenu.
JP2007067245A (ja) * 2005-08-31 2007-03-15 Sumitomo Bakelite Co Ltd フィルム状配線テープ及びその製造方法、並びにフィルム状配線テープを用いた半導体装置の製造方法
JP2009029843A (ja) * 2007-07-24 2009-02-12 Sekisui Chem Co Ltd 半導体用接着剤及び半導体用接着テープ
JP5445187B2 (ja) * 2010-02-05 2014-03-19 日立化成株式会社 回路部材接続用接着剤及びこれを用いた半導体装置
US8676284B2 (en) 2010-10-15 2014-03-18 Novanex, Inc. Method for non-invasive blood glucose monitoring
JP6244684B2 (ja) * 2013-06-24 2017-12-13 日立化成株式会社 素子封止用エポキシ樹脂成形材料及び電子部品装置
JP2014074181A (ja) * 2013-12-25 2014-04-24 Hitachi Chemical Co Ltd 半導体装置の製造方法及びこれを用いて製造されてなる半導体装置
JP6579949B2 (ja) * 2015-12-24 2019-09-25 日東電工株式会社 グラファイトシート用粘着シート
JP6528801B2 (ja) * 2017-06-05 2019-06-12 日立化成株式会社 素子封止用エポキシ樹脂成形材料及び電子部品装置
JP6405482B1 (ja) * 2018-03-27 2018-10-17 タツタ電線株式会社 導電性接着剤層用キャリアフィルム及びそれを備えたボンディングフィルム
KR102710946B1 (ko) * 2019-01-28 2024-09-27 가부시끼가이샤 레조낙 접착제 조성물, 필름상 접착제, 접착 시트, 및 반도체 장치의 제조 방법
JP2023072930A (ja) * 2021-11-15 2023-05-25 株式会社レゾナック 熱硬化性接着剤組成物、積層フィルム、接続体及びその製造方法

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