JP3906522B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
JP3906522B2
JP3906522B2 JP15174997A JP15174997A JP3906522B2 JP 3906522 B2 JP3906522 B2 JP 3906522B2 JP 15174997 A JP15174997 A JP 15174997A JP 15174997 A JP15174997 A JP 15174997A JP 3906522 B2 JP3906522 B2 JP 3906522B2
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JP
Japan
Prior art keywords
film
wiring
wire
pad portion
opening
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP15174997A
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English (en)
Japanese (ja)
Other versions
JPH10340920A5 (enExample
JPH10340920A (ja
Inventor
和弘 星野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP15174997A priority Critical patent/JP3906522B2/ja
Publication of JPH10340920A publication Critical patent/JPH10340920A/ja
Publication of JPH10340920A5 publication Critical patent/JPH10340920A5/ja
Application granted granted Critical
Publication of JP3906522B2 publication Critical patent/JP3906522B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H10W72/019—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H10W72/07551—
    • H10W72/50—
    • H10W72/536—
    • H10W72/5522—
    • H10W72/59—
    • H10W72/921—
    • H10W72/923—
    • H10W72/934—
    • H10W72/952—

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)
JP15174997A 1997-06-10 1997-06-10 半導体装置の製造方法 Expired - Fee Related JP3906522B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15174997A JP3906522B2 (ja) 1997-06-10 1997-06-10 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15174997A JP3906522B2 (ja) 1997-06-10 1997-06-10 半導体装置の製造方法

Publications (3)

Publication Number Publication Date
JPH10340920A JPH10340920A (ja) 1998-12-22
JPH10340920A5 JPH10340920A5 (enExample) 2005-03-17
JP3906522B2 true JP3906522B2 (ja) 2007-04-18

Family

ID=15525454

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15174997A Expired - Fee Related JP3906522B2 (ja) 1997-06-10 1997-06-10 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JP3906522B2 (enExample)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW426980B (en) * 1999-01-23 2001-03-21 Lucent Technologies Inc Wire bonding to copper
JP2003031575A (ja) 2001-07-17 2003-01-31 Nec Corp 半導体装置及びその製造方法
JP2003303848A (ja) * 2002-04-12 2003-10-24 Nec Compound Semiconductor Devices Ltd 半導体装置
KR20040045109A (ko) * 2002-11-22 2004-06-01 주식회사 하이닉스반도체 반도체 소자의 제조 방법
JP2004221098A (ja) 2003-01-09 2004-08-05 Renesas Technology Corp 半導体装置およびその製造方法
JP2008091454A (ja) * 2006-09-29 2008-04-17 Rohm Co Ltd 半導体装置及び半導体装置の製造方法
US7485564B2 (en) * 2007-02-12 2009-02-03 International Business Machines Corporation Undercut-free BLM process for Pb-free and Pb-reduced C4
JP4701264B2 (ja) * 2008-04-18 2011-06-15 ルネサスエレクトロニクス株式会社 半導体装置、および半導体装置の製造方法
JP5582879B2 (ja) * 2010-06-09 2014-09-03 株式会社東芝 半導体装置及びその製造方法
JP5621712B2 (ja) * 2011-06-06 2014-11-12 株式会社デンソー 半導体チップ
JP2014222742A (ja) * 2013-05-14 2014-11-27 トヨタ自動車株式会社 半導体装置
DE102016101801B4 (de) 2016-02-02 2021-01-14 Infineon Technologies Ag Lastanschluss eines leistungshalbleiterbauelements, leistungshalbleitermodul damit und herstellungsverfahren dafür
JP7379845B2 (ja) * 2019-03-28 2023-11-15 セイコーエプソン株式会社 半導体装置、半導体装置の製造方法、電子デバイス、電子機器および移動体

Also Published As

Publication number Publication date
JPH10340920A (ja) 1998-12-22

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