JP3876250B2 - Surface mount semiconductor electronic component and manufacturing method - Google Patents

Surface mount semiconductor electronic component and manufacturing method Download PDF

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JP3876250B2
JP3876250B2 JP2003404753A JP2003404753A JP3876250B2 JP 3876250 B2 JP3876250 B2 JP 3876250B2 JP 2003404753 A JP2003404753 A JP 2003404753A JP 2003404753 A JP2003404753 A JP 2003404753A JP 3876250 B2 JP3876250 B2 JP 3876250B2
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hole
sided
double
bare chip
resin
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JP2005039177A (en
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弘三 田中
中島　　宏
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Stanley Electric Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED

Description

本発明は、表面実装型半導体電子部品の製造方法に関し、詳しくは、半導体ベアチップが配置されたプリント基板をセットした成形金型内に流動性樹脂を圧入して半導体ベアチップを樹脂封止する工程を有する表面実装型半導体電子部品の製造方法に関する。   The present invention relates to a method for manufacturing a surface-mounted semiconductor electronic component, and more specifically, a step of resin-sealing a semiconductor bare chip by press-fitting a fluid resin into a molding die in which a printed circuit board on which a semiconductor bare chip is arranged is set. The present invention relates to a method for manufacturing a surface-mounted semiconductor electronic component.

近年の電子機器の小型・軽量化に伴い、電子部品においても小型化、表面実装化への取組みが強力に推進されている。表面実装型の小型電子部品の一例として発光ダイオード（ＬＥＤ）が挙げられるが、表面実装型の発光ダイオード（以降、チップタイプＬＥＤと言う）の製造方法は、絶縁基板の両面に導体パターンが配設されたプリント基板の一方の導体パターン上に導電性接着剤を介して縦および横に一定の間隔で多数のＬＥＤベアチップを配置し、ＬＥＤベアチップをプリント基板に固定すると同時にＬＥＤベアチップの下部電極と導体パターンとを電気的に接続する。また、ＬＥＤベアチップの上部電極は、ＬＥＤベアチップが配置された導体パターンとは分離された導体パターンにワイヤを介して接続され、電気的な導通が図られている。なお、プリント基板を作製するに当たっては、ＬＥＤベアチップが配置される導体パターンおよびワイヤが接続される導体パターンは、内周面にメッキ等によって金属導電膜が施されたスルーホールを介して反対面の導体パターンによる電極パッドと電気的に接続される。   Along with the recent reduction in size and weight of electronic devices, efforts have also been made to reduce the size and surface mounting of electronic components. Light emitting diodes (LEDs) can be cited as an example of surface mount type small electronic components. The surface mount type light emitting diodes (hereinafter referred to as chip type LEDs) are manufactured by arranging conductor patterns on both sides of an insulating substrate. A large number of LED bare chips are arranged at regular intervals vertically and horizontally on one conductor pattern of the printed circuit board, and the LED bare chip is fixed to the printed circuit board, and at the same time, the lower electrode and the conductor of the LED bare chip Connect the pattern electrically. Further, the upper electrode of the LED bare chip is connected to a conductor pattern separated from the conductor pattern on which the LED bare chip is disposed via a wire, thereby achieving electrical conduction. In producing the printed circuit board, the conductor pattern on which the LED bare chip is arranged and the conductor pattern to which the wire is connected are arranged on the opposite surface through a through hole in which a metal conductive film is applied to the inner peripheral surface by plating or the like. It is electrically connected to the electrode pad by the conductor pattern.

そして、プリント基板のＬＥＤベアチップが配置された面（以降、部品面と言う）は、ＬＥＤベアチップおよびワイヤを振動や衝撃等の外部応力および水分や塵埃等の外部環境から保護すると同時に、ＬＥＤベアチップから放射される光の配光を制御するレンズ機能を持たせるように光透過性樹脂で封止されている。但し、この封止工程では光透過性樹脂がスルーホールに進入し、プリント基板の裏面（以降、半田面と言う）まで回り込んで電極パッドを覆うことになり、電極パッドへの半田付けが不良な製品になってしまう。これを防止するために、光透過性樹脂で封止する前にスルーホールを全長に亘って導電部材で充填し、光透過性樹脂がスルーホールの部品面からプリント基板の半田面に回り込まないようにしたものがある（例えば、特許文献１および特許文献２参照。）。   The surface of the printed circuit board on which the LED bare chip is disposed (hereinafter referred to as the component surface) protects the LED bare chip and the wire from external stresses such as vibration and shock and the external environment such as moisture and dust, and at the same time from the LED bare chip. It is sealed with a light-transmitting resin so as to have a lens function for controlling the light distribution of the emitted light. However, in this sealing process, the light-transmitting resin enters the through hole and goes around to the back surface of the printed circuit board (hereinafter referred to as the solder surface) to cover the electrode pad, so that the soldering to the electrode pad is poor. It becomes a product. In order to prevent this, the through hole is filled with the conductive member over the entire length before sealing with the light transmissive resin, so that the light transmissive resin does not enter the solder surface of the printed circuit board from the component surface of the through hole. (For example, see Patent Document 1 and Patent Document 2).

また、両面に導体パターンが形成されたプリント基板のスルーホールを設ける位置にある半田面の導体パターンを取り除き、半田面側からレーザ、ドリル等の加工によって部品面の導体パターンを残してスルーホール用の穴をあけ、その後、穴の内周面にメッキ等によって金属導電膜を施すと共に、半田面の導体パターンが取り除かれた位置にも金属導電膜を施して電極パッドを再形成し、部品面の導体パターンと半田面の電極パッドとをスルーホールを介して導通させたものもある（例えば、特許文献２および特許文献３参照。）。   Also, remove the conductor pattern on the solder surface at the position where the through hole of the printed circuit board with the conductor pattern formed on both sides is to be provided, and leave the conductor pattern on the component surface by processing with a laser, drill, etc. from the solder surface side. After that, a metal conductive film is applied to the inner peripheral surface of the hole by plating or the like, and a metal conductive film is also applied to the position where the conductor pattern on the solder surface is removed to re-form the electrode pad. In some cases, the conductor pattern is electrically connected to the electrode pad on the solder surface through a through hole (see, for example, Patent Document 2 and Patent Document 3).

このような処理を施したプリント基板が光透過樹脂で封止された後は、各ＬＥＤベアチップ単位でスルーホールを均等に２分割するように縦、横にダイシングされて１枚のプリント基板から多数のチップタイプＬＥＤが生産される。
特開平１１−７４４１０号公報（第４−６頁、第１図） 特開平８−２１３６６０号公報（第４−８頁、第１，８図） 特開平９−１８１３５９号公報（第２−３頁、第１図） After the printed circuit board that has been subjected to such treatment is sealed with a light-transmitting resin, each LED bare chip unit is diced vertically and horizontally so as to divide the through hole into two equally, and a large number of the printed circuit boards are formed. The chip type LED is produced.
Japanese Patent Laid-Open No. 11-74410 (page 4-6, FIG. 1) Japanese Patent Laid-Open No. 8-213660 (pages 4-8, FIGS. 1 and 8) JP-A-9-181359 (page 2-3, FIG. 1)

電子機器に搭載された電子部品が長期に亘って完全な機能を維持するためには、電子機器に組込まれるプリント基板に電子部品を強固に取付けて電気的接続を確実なものにする必要があり、そのためには電極パッドに対する半田付けが重要な役割を担ってくる。その際、小型化された電子部品においては、電極パッドは非常に小さいものとなるため、電子部品の半田付に使用される電極の形状が半田付けの信頼性に大きく影響することになる。特に上述したようなスルーホールの全長に亘って導電部材を充填した表面実装型の電子部品をスルーホールの面を電子機器のプリント基板に対向するように実装する場合には、スルーホールが半分にダイシングされて（以降、ハーフスルーホールと言う）平面となった導電部材の表面は半田付けに必要なフラックスが十分に行き渡らず、半田付が不完全な状態でプリント基板に固定されることになる。さらに、平面状の電極パッドのみの半田付部は、充填されていないハーフスルーホールと電極パッドが連結した立体的な半田付部を形成した場合に比較してフラックスおよび半田の延びが不十分で半田付性に劣るところがある。   In order for an electronic component mounted on an electronic device to maintain its complete function over a long period of time, it is necessary to firmly attach the electronic component to a printed circuit board incorporated in the electronic device to ensure electrical connection. For this purpose, soldering to the electrode pad plays an important role. At that time, in the miniaturized electronic component, since the electrode pad is very small, the shape of the electrode used for soldering the electronic component greatly affects the reliability of soldering. In particular, when mounting a surface mount type electronic component filled with a conductive member over the entire length of the through hole as described above so that the surface of the through hole faces the printed circuit board of the electronic device, the through hole is halved. The surface of the conductive member that has been diced (hereinafter referred to as a half-through hole) is flat on the surface of the conductive member, and the flux required for soldering does not reach the surface sufficiently, and is fixed to the printed circuit board with incomplete soldering. . Furthermore, the soldered portion of the planar electrode pad only has insufficient flux and solder extension compared to the case where a three-dimensional soldered portion is formed by connecting the unfilled half through hole and the electrode pad. There are places where solderability is inferior.

また、両面に導体パターンが形成されたプリント基板のスルーホールを設ける位置にある半田面の導体パターンを取り除き、レーザ或いはドリルによって導体パターンまで到達する穴を設け、穴の内周面にメッキ等によって金属導電膜を施してスルーホールを形成する方法は、プリント基板を作製する過程に導体パターンを除去する工程が必要になること、また、１枚のプリント基板で電子部品の多数取りを行なうためにプリント基板には多数のスルーホールが設けてあり、それをレーザで形成するには多くの時間を有すること、また、ドリルによってスルーホール用の穴を形成する場合は導体パターンをドリルの歯が貫通しないように、しかも導体パターンにプリント基板の絶縁物が残らないように加工することが要求され、穴の深さの設定、再現性およびこれらを満足するために必要とされる作業精度等を考慮すると製品の歩留まりが大きな問題となる。従って、このような方法でスルーホールを形成するには、加工工数に係わる時間や手間の増加および完成品の歩留まりの低下による製品コストの上昇が問題となる。また、スルーホールのダイシング時に発生するバリによってスルーホールに直角な方向に設けられた電極パッドに半田が上がるのが阻害され、電極パッド全面まで半田が十分行き渡らず、固定強度が弱い半田付けになってしまうという問題点がある。
本発明は上記問題に鑑みて創案なされたもので、電子機器に組み込まれるプリント基板に実装するときに信頼性の高い半田付けが確保できるような表面実装型半導体電子部品を低コストで製造する方法およびそれを用いて製造される表面実装型半導体電子部品を提供することを目的とするものである。 Also, remove the conductor pattern on the solder surface at the position where the through hole of the printed circuit board with the conductor pattern formed on both sides is provided, provide a hole reaching the conductor pattern with a laser or a drill, and by plating on the inner peripheral surface of the hole The method of forming a through hole by applying a metal conductive film requires a step of removing a conductor pattern in the process of producing a printed circuit board, and also for taking a large number of electronic components on one printed circuit board. The printed circuit board has a large number of through holes, and it takes a lot of time to form them with a laser. Also, when drilling holes for through holes, the teeth of the drill penetrate the conductor pattern. In order to prevent the printed circuit board insulation from remaining on the conductor pattern. , The yield of the consideration of product working accuracy and the like which are required to satisfy reproducibility and these become a big problem. Therefore, in order to form a through hole by such a method, there is a problem of an increase in product cost due to an increase in processing time and labor and a decrease in the yield of finished products. In addition, the burrs generated during dicing of the through hole hinder the solder from going up to the electrode pad provided in the direction perpendicular to the through hole, and the solder does not reach the entire surface of the electrode pad, resulting in weak fixing strength. There is a problem that.
The present invention was devised in view of the above problems, and a method for manufacturing a surface-mounted semiconductor electronic component capable of ensuring reliable soldering when mounted on a printed circuit board incorporated in an electronic device at a low cost. It is another object of the present invention to provide a surface mount semiconductor electronic component manufactured using the same.

絶縁基板の両面に多数の独立した導体パターンが配設され、内周面に金属導電膜が施されたスルーホールを介して前記両面の導体パターンが導通するようにした両面スルーホールプリント基板の前記スルーホールの一方の開口部を塞ぐ工程と、前記両面スルーホール基板の前記スルーホールの開口部を塞いだ面の導体パターン上に半導体ベアチップを配置する工程と、前記半導体ベアチップを配置した前記両面スルーホール基板がセットされた成形金型内に第１の樹脂を圧入することによって前記半導体ベアチップを覆うように樹脂封止を行なう工程とを有することを特徴とする表面実装型半導体電子部品の製造方法であって、前記開口部を塞ぐ工程は、前記スルーホールの上部に第１レジスト膜を形成し、該第１レジスト膜の上面に第２レジスト膜を形成して２層のレジスト膜で構成されることを特徴とするものである。 The double-sided through-hole printed circuit board in which a large number of independent conductor patterns are arranged on both sides of the insulating substrate, and the conductive patterns on both sides are conducted through a through-hole in which a metal conductive film is applied to the inner peripheral surface. A step of closing one opening of a through hole, a step of disposing a semiconductor bare chip on a conductor pattern of the surface of the double-sided through-hole substrate where the opening of the through hole is blocked, and the double-sided through in which the semiconductor bare chip is disposed the method of manufacturing a surface mount type semiconductor electronic component, comprising the step of performing resin sealing so as to cover the semiconductor bare chip by forcing first resin into the molding die hole substrate is set In the step of closing the opening, a first resist film is formed on the through hole, and a second resist is formed on the upper surface of the first resist film. Is characterized in that consists of the resist film strike film formed by two layers.

また、本発明の請求項２に記載された発明は、請求項１において、前記第１レジスト膜は、前記スルーホールの途中までを塞ぐことを特徴とするものである。 The invention described in claim 2 of the present invention is characterized in that, in claim 1, the first resist film blocks up to the middle of the through hole .

また、本発明の請求項３に記載された発明は、請求項１または２のいずれか１項において、前記スルーホールの前記第１レジストと接触する面に粗化処理が施されていることを特徴とするものである。 According to a third aspect of the present invention, in any one of the first or second aspect, the surface of the through hole that comes into contact with the first resist is roughened. It is a feature.

また、本発明の請求項４に記載された発明は、絶縁基板の両面に多数の独立した導体パターンが配設され、内周面に金属導電膜が施されたスルーホールを介して前記両面の導体パターンが導通するようにした両面スルーホールプリント基板の前記スルーホールの一方の開口部を塞ぐ工程と、前記両面スルーホール基板の前記スルーホールの開口部を塞いだ面の導体パターン上に半導体ベアチップを配置する工程と、前記半導体ベアチップを配置した前記両面スルーホール基板がセットされた成形金型内に第１の樹脂を圧入することによって前記半導体ベアチップを覆うように樹脂封止を行なう工程とを有することを特徴とする表面実装型半導体電子部品の製造方法であって、前記開口部を塞ぐ工程は、前記両面スルーホールプリント基板において、前記導体パターンの少なくとも前記半導体ベアチップが配置される位置の近傍および前記半導体ベアチップに一方の端部が接続されたワイヤの他方の端部が接続される位置の近傍を除いた部分にプリプレグを備えた絶縁シートが貼着され、前記プリプレグに含浸された熱硬化性樹脂が前記スルーホールの途中までを塞ぐことを特徴とするものである。 According to the invention described in claim 4 of the present invention , a large number of independent conductor patterns are arranged on both sides of the insulating substrate, and a metal conductive film is provided on the inner peripheral surface thereof, through the through holes. A step of closing one opening of the through hole of the double-sided through-hole printed circuit board in which the conductive pattern is conducted; and a semiconductor bare chip on the conductive pattern of the surface of the double-sided through-hole substrate closing the through-hole. And a step of resin sealing so as to cover the semiconductor bare chip by press-fitting a first resin into a molding die in which the double-sided through-hole substrate on which the semiconductor bare chip is arranged is set. A method of manufacturing a surface-mount type semiconductor electronic component comprising the step of closing the opening in the double-sided through-hole printed circuit board. A prepreg at least in the vicinity of a position of the conductor pattern near the position where the semiconductor bare chip is disposed and in the vicinity of the position where the other end of the wire connected to one end of the semiconductor bare chip is connected. The provided insulating sheet is stuck, and the thermosetting resin impregnated in the prepreg blocks up to the middle of the through hole .

また、本発明の請求項５に記載された発明は、請求項４において、前記スルーホールの前記熱硬化性樹脂と接触する面に粗化処理が施されていることを特徴とするものである。 Moreover, the invention described in claim 5 of the present invention is characterized in that, in claim 4 , a surface of the through hole that comes into contact with the thermosetting resin is roughened. .

また、本発明の請求項６に記載された発明は、請求項１〜５のいずれか１項において、前記半導体ベアチップを配置した前記両面スルーホール基板がセットされた前記成形金型内に第１の樹脂を圧入することによって前記樹脂封止を行なう方法は、トランスファ成形であることを特徴とするものである。 Further, the invention described in claim 6 of the present invention, claim in any one of 1 to 5, the first to the said double-sided through-hole board the set in the molding die arranged a semiconductor bare chip The method of sealing the resin by press-fitting the resin is transfer molding .

また、本発明の請求項７に記載された発明は、請求項１〜６のいずれか１項において、前記半導体ベアチップを配置した前記両面スルーホール基板がセットされた前記成形金型内に第１の樹脂を圧入することによって前記樹脂封止を行なう方法において、成形圧力が８０ｋｇ／ｃｍ ２ から１２０ｋｇ／ｃｍ ２ であることを特徴とするものである。 Further, the invention described in claim 7 of the present invention is claimed in any one of claims 1 to 6, first to said double-sided through-hole board the set in the molding die arranged a semiconductor bare chip a method for performing the resin sealing by forcing the resin, is characterized in that the molding pressure is 120 kg / cm 2 from 80 kg / cm 2.

また、本発明の請求項８に記載された発明は、
絶縁基板上に多数の独立した導体パターンが両面に配設された、両面スルーホールプリント基板と、
金属導電膜が施された内周面と両端に開口部を有し、前記導体パターンを貫通するように前記両面スルーホールプリント基板に配設されるハーフスルーホールと、
前記開口部のうち、一方の開口部から前記内周面の途中までを塞ぐ第１レジスト膜と、該第１レジスト膜の上面に形成された第２レジスト膜の２層のレジスト膜と、
前記２層のレジスト膜側の前記両面スルーホールプリント基板の導体パターン上に配置される半導体ベアチップと、
前記半導体ベアチップを覆うように封止する樹脂と、
を備えることを特徴とするものである。 Moreover, the invention described in claim 8 of the present invention is
A double-sided through-hole printed circuit board in which a large number of independent conductor patterns are arranged on both sides on an insulating board;
A half through hole disposed in the double-sided through-hole printed circuit board so as to have an opening on both the inner peripheral surface and both ends subjected to the metal conductive film, and to penetrate the conductor pattern;
Among the openings, a first resist film that blocks from one opening to the middle of the inner peripheral surface, a two-layer resist film formed of a second resist film formed on the upper surface of the first resist film,
A semiconductor bare chip disposed on a conductor pattern of the double-sided through-hole printed circuit board on the two-layer resist film side;
A resin for sealing so as to cover the semiconductor bare chip;
It is characterized by providing .

また、本発明の請求項９に記載された発明は、請求項８において、前記ハーフスルーホールの前記第１レジスト膜と接触する面に粗化処理が施されていることを特徴とするものである。 The invention described in claim 9 of the present invention is characterized in that, in claim 8 , a surface of the half-through hole that is in contact with the first resist film is roughened. is there.

また、本発明の請求項１０に記載された発明は、請求項８または９のいずれか１項において、前記第１レジスト膜は、前記第２レジスト膜により覆われていることを特徴とするものである。 The invention described in claim 10 of the present invention is characterized in that, in any one of claims 8 and 9, the first resist film is covered with the second resist film. It is.

また、本発明の請求項１１に記載された発明は、
絶縁基板上に多数の独立した導体パターンが両面に配設された、両面スルーホールプリント基板と、
金属導電膜が施された内周面と両端に開口部を有し、前記導体パターンを貫通するように前記両面スルーホールプリント基板に配設されるハーフスルーホールと、
前記開口部の一方の開口部を塞ぐプリプレグと、
前記開口部から前記内周面の途中までを塞ぐプリプレグおよびプリプレグに含浸された熱硬化性樹脂と、
前記プリプレグ側の前記両面スルーホールプリント基板の導体パターン上に配置される半導体ベアチップと、
前記半導体ベアチップを覆うように封止する樹脂と、
を備えることを特徴とするものである。 Further, the invention described in claim 11 of the present invention is
A double-sided through-hole printed circuit board in which a large number of independent conductor patterns are arranged on both sides on an insulating board;
A half through hole disposed in the double-sided through-hole printed circuit board so as to have an opening on both the inner peripheral surface and both ends subjected to the metal conductive film, and to penetrate the conductor pattern;
A prepreg that closes one of the openings;
A thermosetting resin impregnated in the prepreg and the prepreg that plugs from the opening to the middle of the inner peripheral surface;
A semiconductor bare chip disposed on a conductor pattern of the double-sided through-hole printed circuit board on the prepreg side;
A resin for sealing so as to cover the semiconductor bare chip;
It is characterized by providing .

そして、多数のＬＥＤベアチップ１０および受光ベアチップ１１が配置された面に各チップ１０，１１およびワイヤ１２を振動や衝撃等の外部応力および水分や塵埃等の外部環境から保護すると同時に、ＬＥＤベアチップから放射される光の配光を制御するレンズ１４機能を持たせるように両面スルーホールプリント基板１の部品面を覆うように光透過性樹脂１３で封止されている。この光透過性樹脂１３で封止する方法は、例えばトランスファ成形で行なわれ、各チップ１０，１１およびワイヤ１２が配置された両面スルーホールプリント基板１を金型内にセットして型締めされ、金型内に流動性の光透過性樹脂１３を圧入して成形によって行なわれる。尚、このときの成形条件としては、プレス機型締圧力は約２０ｔ、プランジャ径はφ３５ｍｍ（プランジャ面積は９．６ｃｍ２）、プランジャ射出圧力は約１ｔ、金型温度は約１６０℃、成形圧力は各チップ１０，１１と電極を結ぶワイヤが変形しないこと等を考慮すると８０ｋｇ／ｃｍ２から１２０ｋｇ／ｃｍ２が最適である。このような条件のトランスファ成形によって樹脂封止が行なわれた場合、上述したような第１レジスト膜のみでスルーホールの途中まで充填した時は、樹脂の成形圧力を受けてスルーホールに充填されたレジストがスルーホール内を半田面側に移動し、約２０％の確率でスルーホール内に樹脂が浸入して樹脂漏れを発生し、半田付不良を誘発する原因となった。そこで、レジストを２層構造に形成することで、樹脂漏れの発生率を殆んど０％にすることができた。そして、光透過性樹脂１３で封止が完了した後、１対のＬＥＤベアチップ１０および受光ベアチップ１１単位でスルーホール５を均等に２分割するように２点鎖線に沿って縦、横にダイシングされて１枚のプリント基板から多数の図４に示すような表面実装型半導体電子部品１５が生産される。 Then, on the surface on which a large number of LED bare chips 10 and light receiving bare chips 11 are arranged, the chips 10, 11 and the wires 12 are protected from external stresses such as vibration and impact and external environment such as moisture and dust, and at the same time radiated from the LED bare chips. It is sealed with a light-transmitting resin 13 so as to cover the component surface of the double-sided through-hole printed circuit board 1 so as to have a lens 14 function for controlling the light distribution. The method of sealing with the light-transmitting resin 13 is performed, for example, by transfer molding, and the double-sided through-hole printed circuit board 1 on which the chips 10 and 11 and the wires 12 are arranged is set in a mold and clamped. This is performed by press-fitting a fluid light-transmitting resin 13 into the mold. As molding conditions at this time, the press clamping pressure is about 20 t, the plunger diameter is 35 mm (plunger area is 9.6 cm 2 ), the plunger injection pressure is about 1 t, the mold temperature is about 160 ° C., the molding pressure Considering that the wires connecting the chips 10 and 11 and the electrodes are not deformed, the optimum is 80 kg / cm 2 to 120 kg / cm 2 . When resin sealing is performed by transfer molding under such conditions, when filling the through hole with only the first resist film as described above, the through hole is filled under the resin molding pressure. The resist moved to the solder surface side through the through hole, and the resin entered the through hole with a probability of about 20%, causing a resin leak, causing a soldering defect. Therefore, by forming the resist in a two-layer structure, the occurrence rate of resin leakage could be almost 0%. After the sealing with the light transmissive resin 13 is completed, the through hole 5 is diced vertically and horizontally along the two-dot chain line so as to equally divide the through hole 5 into two in units of a pair of the LED bare chip 10 and the light receiving bare chip 11. A large number of surface mounted semiconductor electronic components 15 as shown in FIG. 4 are produced from a single printed board.

そして、ダイシングによって分割された個々の表面実装型半導体電子部品１５を電子機器に組み込まれるプリント基板に実装した状態を示した断面図が第５図である。表面実装型半導体電子部品は電子機器に組み込まれるプリント基板１６に表面実装型半導体電子部品１５のハーフスルーホール５′の面を対向するように配置され、プリント基板１６の導電パターン１７と表面実装型半導体電子部品１５のハーフスルーホール５′の第１レジスト６が除去されて露出した金属導電膜４および電極パッド１９とを半田１８によって接合されて、固定と電気的導通が図られている。このような接合形態では、プリント基板１６に対して表面実装型半導体電子部品１５のハーフスルーホール５′面とそれに直角な面に設けられた電極パッド１９との両面が立体的に半田１８によって接続されるため、プリント基板１６に対して強固な固定が確保されている。したがって、実装された表面実装型半導体電子部品１５に振動や応力が加わることによる接触不良が原因で電子機器の不具合が生じる頻度が顕著に減少するものである。   FIG. 5 is a cross-sectional view showing a state in which the individual surface-mounted semiconductor electronic components 15 divided by dicing are mounted on a printed circuit board incorporated in an electronic device. The surface-mounted semiconductor electronic component is disposed so that the surface of the half-through hole 5 ′ of the surface-mounted semiconductor electronic component 15 faces the printed board 16 incorporated in the electronic device. The metal conductive film 4 and the electrode pad 19 exposed by removing the first resist 6 in the half-through hole 5 ′ of the semiconductor electronic component 15 are joined together by solder 18 so as to be fixed and electrically connected. In such a joining form, both surfaces of the half-through hole 5 ′ surface of the surface mount semiconductor electronic component 15 and the electrode pad 19 provided on a surface perpendicular to the surface of the printed circuit board 16 are three-dimensionally connected by the solder 18. Therefore, firm fixation to the printed circuit board 16 is ensured. Accordingly, the frequency of occurrence of defects in the electronic device due to contact failure due to vibration or stress applied to the mounted surface-mounted semiconductor electronic component 15 is remarkably reduced.

本発明に係わる第２実施例は、上述した第１実施例において示した図１の（ａ）〜（ｃ）の工程によってスルーホールの部品面側の開口部９を塞ぐ処理を行う。この工程は第１実施例においては、レジスト材料によって二層の膜を形成するものであったが、本実施例では、スルーホール５にエポキシ樹脂を充填し、その後レーザ加工等により半田面側のエポキシ樹脂の一部を除去してスルーホール内壁の金属導電膜４を露出させるものである。従って、スルーホール５に充填する充填材にエポキシ樹脂を用いることによって１回の充填工程で処理できるために製造工数の低減が図られるという利点がある。ところで、スルーホール５に充填するエポキシ樹脂は光透過性樹脂のトランスファ成形時の成形温度よりも高いガラス転移温度を有することが望ましく、本実施例では、ガラス転移温度が１８０〜２２０℃のエポキシ樹脂を使用した。その後、第１実施例と同様の工程で部品面に半導体ベアチップを載置した後、光透過性樹脂で封止して表面実装型半導体電子部品を組み上げる。   In the second embodiment of the present invention, the process of closing the opening 9 on the component surface side of the through hole is performed by the steps (a) to (c) of FIG. 1 shown in the first embodiment. In the first embodiment, this process is to form a two-layer film with a resist material. In this embodiment, the through hole 5 is filled with an epoxy resin, and then laser processing or the like is performed on the solder surface side. A part of the epoxy resin is removed to expose the metal conductive film 4 on the inner wall of the through hole. Therefore, there is an advantage that the number of manufacturing steps can be reduced because an epoxy resin can be used for the filling material to fill the through hole 5 because it can be processed in one filling process. By the way, it is desirable that the epoxy resin filling the through hole 5 has a glass transition temperature higher than the molding temperature at the time of transfer molding of the light transmitting resin. In this embodiment, the epoxy resin having a glass transition temperature of 180 to 220 ° C. It was used. Thereafter, a semiconductor bare chip is placed on the component surface in the same process as in the first embodiment, and then sealed with a light-transmitting resin to assemble a surface mount semiconductor electronic component.

ここで、トランスファ成形によって光透過性樹脂で半導体ベアチップを封止する成形温度が１５０℃程度の高温であるのに対して、第１実施例でスルーホールを塞ぐために使用したアクリル系レジスト材料のガラス転移温度は１１０〜１２０℃、本実施例でスルーホールに充填するために使用したエポキシ樹脂のガラス転移温度は１８０〜２２０℃であった。成形温度よりも転移温度が高い方が軟化やトランスファ成形による光透過性樹脂のスルーホールへの浸入を確実に防止することができる。さらに、本実施例の利点は、封止樹脂となる光透過性成樹脂との密着性がレジストよりもエポキシ樹脂のほうが良く、歩留まりの向上および耐久性の向上が期待できることである。また、プリント基板の材質がエポキシ樹脂である場合には、基板と充填材料との熱膨張係数差を低減できるため、デバイスの耐熱性の向上も期待できる。   Here, the glass of the acrylic resist material used to close the through-hole in the first embodiment, whereas the molding temperature for sealing the semiconductor bare chip with the light transmissive resin by transfer molding is as high as about 150 ° C. The transition temperature was 110 to 120 ° C., and the glass transition temperature of the epoxy resin used for filling the through holes in this example was 180 to 220 ° C. When the transition temperature is higher than the molding temperature, the penetration of the light-transmitting resin into the through hole due to softening or transfer molding can be reliably prevented. Furthermore, the advantage of the present embodiment is that the epoxy resin has better adhesion to the light-transmitting resin as the sealing resin than the resist, and an improvement in yield and durability can be expected. Further, when the material of the printed board is an epoxy resin, the difference in thermal expansion coefficient between the board and the filling material can be reduced, so that improvement in the heat resistance of the device can also be expected.

図６は、本発明に係わる第３実施例の表面実装型半導体電子部品が１枚の両面スルーホールプリント基板上に多数個取りで形成された状態を示す部分平面図である。両面スルーホールプリント基板１にＬＥＤベアチップ１０および受光ベアチップ１１を配置し、光透過性樹脂１３で部品面を封止するのは上述した第１実施例と同様であるが、光透過性樹脂１３で封止するときにスルーホール５に光透過性樹脂１３が流れ込まないようにスルーホール５を塞ぐ方法が異なっている。この場合、接着性を有する樹脂フィルム（プリプレグ）２０をスルーホール５の部品面側の開口部９に配置し、プリプレグ２０を介してさらにその上に両面スルーホールプリント基板１の絶縁基板２と同一の部材からなる絶縁材シート２１を熱圧着する。このように、２層にスルーホール５の開口部９を塞ぐことにより封止成形時の射出圧力によって光透過樹脂１３がスルーホー１３へ進入することを確実に防止している。ここで使用されるプリプレグ２０は炭素繊維、ガラス繊維或いはアラミド繊維等にエポキシ樹脂等の未硬化の熱硬化性樹脂を含浸させたものであり、これを、スルーホール５の開口部９に設けることにより、流れ出した熱硬化性樹脂によってスルーホールの途中までが充填される。このとき、スルーホール５への充填の深さは繊維に含浸される熱硬化性樹脂の量を調整することにより制御される。また、光透過性樹脂１３のスルーホール５への流れ込み防止の効果が損なわれないように、充填された熱硬化性樹脂に気泡、クラックおよび異物の混入がないような管理が行なわれている。さらに、多数のスルーホール５の１ヵ所毎にこのような処理をすることは非常に時間を費やす作業になるため、プリプレグ２０および絶縁シート２１は必要な部分で構成されるシート状に形成されて両面スルーホールプリント基板１上に一括で貼り付けられる。なお、スルーホール５の開口部９を塞ぐ絶縁シート２１を両面スルーホールプリント基板１の絶縁基板２と同一の部材にするのは、絶縁シート２１を両面スルーホールプリント基板１に貼り付けるときに圧力および熱を加えるため、冷却過程で熱膨張係数の違いによって両者の間に応力が加わり、最悪の場合は剥離が生じる可能性がある。このため熱膨張係数が同一の材料を使用することにより応力の発生を防ぎ、貼り付けの確実性を確保するためである。   FIG. 6 is a partial plan view showing a state in which a plurality of surface-mounted semiconductor electronic components according to the third embodiment of the present invention are formed on a single double-sided through-hole printed circuit board. The LED bare chip 10 and the light receiving bare chip 11 are arranged on the double-sided through-hole printed circuit board 1 and the component surface is sealed with the light transmissive resin 13 as in the first embodiment. The method of closing the through-hole 5 is different so that the light-transmitting resin 13 does not flow into the through-hole 5 when sealing. In this case, a resin film (prepreg) 20 having adhesiveness is disposed in the opening 9 on the component surface side of the through hole 5, and the same as the insulating substrate 2 of the double-sided through-hole printed circuit board 1 is further disposed thereon via the prepreg 20. The insulating material sheet 21 made of the above member is subjected to thermocompression bonding. In this way, the opening 9 of the through hole 5 is closed in two layers, thereby reliably preventing the light transmitting resin 13 from entering the through hole 13 due to the injection pressure at the time of sealing molding. The prepreg 20 used here is obtained by impregnating carbon fiber, glass fiber, aramid fiber, or the like with an uncured thermosetting resin such as epoxy resin, and this is provided in the opening 9 of the through hole 5. Thus, the middle of the through hole is filled with the thermosetting resin that has flowed out. At this time, the depth of filling the through hole 5 is controlled by adjusting the amount of the thermosetting resin impregnated in the fiber. Moreover, management is performed so that bubbles, cracks, and foreign matters are not mixed in the filled thermosetting resin so that the effect of preventing the light-transmitting resin 13 from flowing into the through hole 5 is not impaired. Furthermore, since it is very time consuming to perform such processing for each of the many through holes 5, the prepreg 20 and the insulating sheet 21 are formed in a sheet shape composed of necessary portions. The double-sided through-hole printed circuit board 1 is pasted together. The insulating sheet 21 that closes the opening 9 of the through hole 5 is made the same member as the insulating substrate 2 of the double-sided through-hole printed circuit board 1 because the pressure is applied when the insulating sheet 21 is attached to the double-sided through-hole printed circuit board 1. Since heat is applied, stress is applied between the two due to the difference in thermal expansion coefficient during the cooling process, and in the worst case, peeling may occur. For this reason, the use of a material having the same thermal expansion coefficient prevents the generation of stress and ensures the certainty of attachment.

このようにスルーホール５の処理が行なわれた両面スルーホールプリント基板１の部品面には実施例１と同様に、スルーホール５に連結された各導体パターン３上に1対のＬＥＤベアチップ１０と受光ベアチップ１１が導電性接着剤（図示せず）を介して多数配置され、プリント基板に固定されると同時に各チップ１０，１１の下部電極と導体パターン３とが電気的に接続されている。また、各チップ１０，１１の上部電極は、各チップ１０，１１が配置された導体パターン３とは分離されたスルーホール５に連結された導体パターン３にワイヤ１２を介して接続され、電気的な導通が図られている。   In the same manner as in the first embodiment, a pair of LED bare chips 10 and a pair of LED bare chips 10 are formed on each of the conductor patterns 3 connected to the through holes 5 on the component surface of the double-sided through-hole printed circuit board 1 subjected to the processing of the through holes 5 in this way. A large number of light receiving bare chips 11 are arranged via a conductive adhesive (not shown), and are fixed to the printed circuit board. At the same time, the lower electrodes of the chips 10 and 11 and the conductor pattern 3 are electrically connected. Further, the upper electrodes of the chips 10 and 11 are electrically connected to the conductor pattern 3 connected to the through hole 5 separated from the conductor pattern 3 on which the chips 10 and 11 are arranged via the wire 12. Continuity is achieved.

そして、両面スルーホールプリント基板１の部品面は、ＬＥＤベアチップ１０および受光ベアチップ１１を覆うように光透過性樹脂１３で封止され、２点鎖線に沿ってスクライブされて図７に示すような個々の表面実装型半導体電子部品１５に分割される。   Then, the component surface of the double-sided through-hole printed circuit board 1 is sealed with a light-transmitting resin 13 so as to cover the LED bare chip 10 and the light-receiving bare chip 11, and is scribed along a two-dot chain line, as shown in FIG. Are divided into surface-mounted semiconductor electronic components 15.

なお、本発明は上記実施例に限定されるものではない。例えば、スルーホールの開口部を塞ぐ充填材に関しては、ガラス転移温度が高い樹脂であれば使用可能であり、半導体ベアチップの封止工程において光透過性樹脂の種類、成形温度、後工程等の条件に対応して適宜選択されるものである。また、スルーホールを塞ぐ方法に関しても、治具等を使用してあらかじめスルーホールの途中まで樹脂を充填する方法、スルーホールに充填後にエッチングあるいはプラズマ照射等の手法によって半田面側の樹脂の一部を除去する方法等が考えられる。   In addition, this invention is not limited to the said Example. For example, with respect to the filler that closes the opening of the through hole, any resin having a high glass transition temperature can be used. In the semiconductor bare chip sealing process, conditions such as the type of light-transmitting resin, molding temperature, and post-process Is appropriately selected corresponding to the above. In addition, as for the method of closing the through hole, a part of the resin on the solder surface side is filled by filling the through hole with a resin in advance using a jig or the like, or by etching or plasma irradiation after filling the through hole. The method etc. which remove can be considered.

上述したように、本発明では、スルーホールの開口部を２層に塞ぐことにより、ＬＥＤベアチップおよび受光ベアチップが配置された部品面をトランスファ成形によって封止するに当たり、成形時の成形圧力が８０ｋｇ／ｃｍ２から１２０ｋｇ／ｃｍ２の光透過性樹脂がスルーホールに進入するのを確実に阻止することができる。従って、封止樹脂がスルーホールに進入してプリント基板の半田面まで回り込み、電極パッドを覆って電極パッドへの半田付けが不可能な製品になることを防止することができる。 As described above, according to the present invention, when the part surface where the LED bare chip and the light receiving bare chip are arranged is sealed by transfer molding by closing the opening of the through hole into two layers, the molding pressure during molding is 80 kg / It is possible to reliably prevent cm 2 to 120 kg / cm 2 of the light transmissive resin from entering the through hole. Accordingly, it is possible to prevent the sealing resin from entering the through hole and wrapping around the solder surface of the printed circuit board to cover the electrode pad and become a product that cannot be soldered to the electrode pad.

また、スルーホールを塞ぐ時に使用されるレジストは印刷、スプレー等の方法で、接着シートを有する絶縁シートは貼り付けで共に一括形成される。従って、作業工数が少なく、製造コストを安くできる。   Also, the resist used when closing the through hole is formed together by printing, spraying or the like, and the insulating sheet having the adhesive sheet is pasted together. Therefore, the number of work steps is small, and the manufacturing cost can be reduced.

また、スルーホールの開口部を覆う２層の部材のうち、スルーホールに接する部材がスルーホールの途中までしか充填されないため、多数個取りで構成されて個々の表面実装型半導体電子部品に分割されるときにスルーホールが半分に分割されたハーフスルーホールに絶縁材が充填されないで金属導電膜が露出した部分が存在する。これにより、表面実装型半導体電子部品が実装されるプリント基板に対して表面実装型半導体電子部品のハーフスルーホール面とそれに直角な面に設けられた電極パッドの両面に立体的に半田接続が行なわれるため、実装基板に対して強固な固定が確保される。また、スルーホールが均等に２分割されたハーフスルーホールの切断部に発生する導体パターンのバリは、スルーホールの穴を除いた部分に限定される。従って、バリによって電極パッドに半田が上がるのが阻害され、電極パッド全面まで半田が十分行き渡らず、固定強度が弱い半田付けになってしまうということが回避される。すなわち、電子機器に組み込まれたプリント基板に実装された表面実装型半導体電子部品に振動や応力が加わることで接触不良が発生し、それが原因で電子機器に不具合が生じるといったトラブルが少なくなる。などの優れた効果を奏するものである。   In addition, among the two-layer members covering the opening of the through hole, the member in contact with the through hole is filled only up to the middle of the through hole, so that it is composed of a large number of parts and divided into individual surface mount semiconductor electronic components. In this case, there is a portion where the metal conductive film is exposed without being filled with an insulating material in the half through hole in which the through hole is divided in half. As a result, a three-dimensional solder connection is made between the half-through hole surface of the surface mount semiconductor electronic component and the electrode pads provided on the surface perpendicular to the surface mount semiconductor electronic component on the printed circuit board on which the surface mount semiconductor electronic component is mounted. Therefore, firm fixation to the mounting substrate is ensured. Moreover, the burr | flash of the conductor pattern which generate | occur | produces in the cut part of the half through hole by which the through hole was equally divided into 2 is limited to the part except the hole of the through hole. Accordingly, it is possible to prevent the solder from rising to the electrode pad due to the burrs, the solder not sufficiently reaching the entire surface of the electrode pad, and soldering with low fixing strength. That is, contact failure occurs when vibration or stress is applied to the surface-mounted semiconductor electronic component mounted on the printed circuit board incorporated in the electronic device, and the trouble that the electronic device becomes defective due to this is reduced. It has excellent effects such as.

本発明の第1実施例に係わる両面スルーホールプリント基板の工程図を示す部分断面図であり、（ａ）はスルーホールの構成を示す図、（ｂ）は第１レジストの形成を示す図、（ｃ）は第１レジストの部分除去を示す図、（ｄ）は第２レジストの形成を示す図、（ｅ）はスルーホールの第1レジスト除去部の金属導電膜および電極パッドへの金メッキの形成を示す図である。It is a partial sectional view showing a process diagram of a double-sided through-hole printed circuit board according to the first embodiment of the present invention, (a) is a diagram showing the configuration of the through-hole, (b) is a diagram showing the formation of the first resist, (C) is a diagram showing the partial removal of the first resist, (d) is a diagram showing the formation of the second resist, (e) is a gold plating on the metal conductive film and the electrode pad of the first resist removal portion of the through hole. It is a figure which shows formation. 本発明の第1実施例に係わる表面実装型半導体電子部品を半田面方向から見た斜視図である。1 is a perspective view of a surface mount semiconductor electronic component according to a first embodiment of the present invention as viewed from the direction of a solder surface. 本発明の第1実施例に係わる表面実装型半導体電子部品をプリント基板上に多数個取りで形成した状態の平面図である。1 is a plan view showing a state in which a large number of surface-mounted semiconductor electronic components according to a first embodiment of the present invention are formed on a printed board. 本発明の第1実施例に係わる表面実装型半導体電子部品を部品面方向から見た斜視図である。1 is a perspective view of a surface-mounted semiconductor electronic component according to a first embodiment of the present invention when viewed from the component surface direction. 本発明の第1実施例に係わる表面実装型半導体電子部品の実装状態を示す断面図である。1 is a cross-sectional view showing a mounted state of a surface mount semiconductor electronic component according to a first embodiment of the present invention. 本発明の第３実施例に係わる表面実装型半導体電子部品をプリント基板上に多数個取りで形成した状態の平面図である。It is a top view of the state which formed many surface mount type semiconductor electronic components concerning the 3rd example of the present invention on a printed circuit board. 本発明の第３実施例に係わる表面実装型半導体電子部品を部品面方向から見た斜視図である。It is the perspective view which looked at the surface mounting type semiconductor electronic component concerning 3rd Example of this invention from the component surface direction.

符号の説明Explanation of symbols

１ 両面スルーホールプリント基板
２ 絶縁基板
３ 導体パターン
４ 金属導電膜
５ スルーホール
５′ ハーフスルーホール
６ 第１レジスト
７ 第２レジスト
８ 金メッキ
９ 開口部
９′ 開口部
１０ ＬＥＤベアチップ
１１ 受光ベアチップ
１２ ワイヤ
１３ 光透過性樹脂
１４ レンズ
１５ 表面実装型半導体電子部品
１６ プリント基板
１７ 導体パターン
１８ 半田
１９ 電極パッド
２０ プリプレグ
２１ 絶縁シート 1 Double-sided through-hole printed circuit board 2 Insulating board 3 Conductor pattern 4 Metal conductive film 5 Through-hole
5 ′ half-through hole 6 first resist 7 second resist 8 gold plating 9 opening 9 ′ opening 10 LED bare chip 11 light receiving bare chip 12 wire 13 light transmitting resin 14 lens 15 surface mount semiconductor electronic component 16 printed circuit board 17 conductor pattern 18 Solder 19 Electrode pad 20 Prepreg 21 Insulating sheet

Claims (11)

絶縁基板の両面に多数の独立した導体パターンが配設され、内周面に金属導電膜が施されたスルーホールを介して前記両面の導体パターンが導通するようにした両面スルーホールプリント基板の前記スルーホールの一方の開口部を塞ぐ工程と、前記両面スルーホール基板の前記スルーホールの開口部を塞いだ面の導体パターン上に半導体ベアチップを配置する工程と、前記半導体ベアチップを配置した前記両面スルーホール基板がセットされた成形金型内に第１の樹脂を圧入することによって前記半導体ベアチップを覆うように樹脂封止を行なう工程とを有することを特徴とする表面実装型半導体電子部品の製造方法であって、前記開口部を塞ぐ工程は、前記スルーホールの上部に第１レジスト膜を形成し、該第１レジスト膜の上面に第２レジスト膜を形成して２層のレジスト膜で構成されることを特徴とする表面実装型半導体電子部品の製造方法。 The double-sided through-hole printed circuit board in which a large number of independent conductor patterns are arranged on both sides of the insulating substrate, and the conductive patterns on both sides are conducted through a through-hole in which a metal conductive film is applied to the inner peripheral surface. A step of closing one opening of a through hole, a step of disposing a semiconductor bare chip on a conductor pattern of the surface of the double-sided through-hole substrate where the opening of the through hole is blocked, and the double-sided through in which the semiconductor bare chip is disposed And a step of sealing the resin so as to cover the semiconductor bare chip by press-fitting a first resin into a molding die on which a hole substrate is set. In the step of closing the opening, a first resist film is formed on the through hole, and a second resist is formed on the upper surface of the first resist film. Surface mounting semiconductor electronic component manufacturing method, characterized by consisting of a resist film of two layers by forming a strike layer. 前記第１レジスト膜は、前記スルーホールの途中までを塞ぐことを特徴とする請求項１に記載の表面実装型半導体電子部品の製造方法。 The method for manufacturing a surface-mount type semiconductor electronic component according to claim 1, wherein the first resist film blocks up to a middle of the through hole . 前記スルーホールの前記第１レジストと接触する面に粗化処理が施されていることを特徴とする請求項１または２のいずれか１項に記載の表面実装型半導体電子部品の製造方法。 The surface mounting type semiconductor electronic component manufacturing method according to claim 1, wherein a surface of the through hole that is in contact with the first resist is roughened . 絶縁基板の両面に多数の独立した導体パターンが配設され、内周面に金属導電膜が施されたスルーホールを介して前記両面の導体パターンが導通するようにした両面スルーホールプリント基板の前記スルーホールの一方の開口部を塞ぐ工程と、前記両面スルーホール基板の前記スルーホールの開口部を塞いだ面の導体パターン上に半導体ベアチップを配置する工程と、前記半導体ベアチップを配置した前記両面スルーホール基板がセットされた成形金型内に第１の樹脂を圧入することによって前記半導体ベアチップを覆うように樹脂封止を行なう工程とを有することを特徴とする表面実装型半導体電子部品の製造方法であって、前記開口部を塞ぐ工程は、前記両面スルーホールプリント基板において、前記導体パターンの少なくとも前記半導体ベアチップが配置される位置の近傍および前記半導体ベアチップに一方の端部が接続されたワイヤの他方の端部が接続される位置の近傍を除いた部分にプリプレグを備えた絶縁シートが貼着され、前記プリプレグに含浸された熱硬化性樹脂が前記スルーホールの途中までを塞ぐことを特徴とする表面実装型半導体電子部品の製造方法。 The double-sided through-hole printed circuit board in which a large number of independent conductor patterns are arranged on both sides of the insulating substrate, and the conductive patterns on both sides are conducted through a through-hole in which a metal conductive film is applied to the inner peripheral surface. A step of closing one opening of a through hole, a step of disposing a semiconductor bare chip on a conductor pattern of the surface of the double-sided through-hole substrate where the opening of the through hole is blocked, and the double-sided through in which the semiconductor bare chip is disposed And a step of sealing the resin so as to cover the semiconductor bare chip by press-fitting a first resin into a molding die on which a hole substrate is set. And the step of closing the opening includes at least the semiconductor of the conductor pattern in the double-sided through-hole printed circuit board. An insulating sheet provided with a prepreg is attached to a portion excluding the vicinity of the position where the bare chip is arranged and the vicinity of the position where the other end of the wire connected to one end of the semiconductor bare chip is connected, A method for manufacturing a surface-mounted semiconductor electronic component, wherein the thermosetting resin impregnated in the prepreg closes partway through the through hole . 前記スルーホールの前記熱硬化性樹脂と接触する面に粗化処理が施されていることを特徴とする請求項４に記載の表面実装型半導体電子部品の製造方法。 The surface mounting type semiconductor electronic component manufacturing method according to claim 4, wherein a surface of the through hole that is in contact with the thermosetting resin is roughened . 前記半導体ベアチップを配置した前記両面スルーホール基板がセットされた前記成形金型内に第１の樹脂を圧入することによって前記樹脂封止を行なう方法は、トランスファ成形であることを特徴とする請求項１〜５のいずれか１項に記載の表面実装型半導体電子部品の製造方法。 The method for sealing the resin by press-fitting a first resin into the molding die on which the double-sided through-hole substrate on which the semiconductor bare chip is disposed is set is transfer molding. The manufacturing method of the surface-mount type semiconductor electronic component of any one of 1-5 . 前記半導体ベアチップを配置した前記両面スルーホール基板がセットされた前記成形金型内に第１の樹脂を圧入することによって前記樹脂封止を行なう方法において、成形圧力が８０ｋｇ／ｃｍ ２ から１２０ｋｇ／ｃｍ ２ であることを特徴とする請求項１〜６のいずれか１項に記載の表面実装型半導体電子部品の製造方法。 In the method of sealing the resin by press-fitting a first resin into the molding die on which the double-sided through-hole substrate on which the semiconductor bare chip is arranged is set, the molding pressure is 80 kg / cm 2 to 120 kg / cm 2. The method of manufacturing a surface-mount type semiconductor electronic component according to claim 1, wherein 絶縁基板上に多数の独立した導体パターンが両面に配設された、両面スルーホールプリント基板と、
金属導電膜が施された内周面と両端に開口部を有し、前記導体パターンを貫通するように前記両面スルーホールプリント基板に配設されるハーフスルーホールと、
前記開口部のうち、一方の開口部から前記内周面の途中までを塞ぐ第１レジスト膜と、該第１レジスト膜の上面に形成された第２レジスト膜の２層のレジスト膜と、
前記２層のレジスト膜側の前記両面スルーホールプリント基板の導体パターン上に配置される半導体ベアチップと、
前記半導体ベアチップを覆うように封止する樹脂と、
を備えることを特徴とする表面実装型半導体電子部品。 A double-sided through-hole printed circuit board in which a large number of independent conductor patterns are arranged on both sides on an insulating board;
A half through hole disposed in the double-sided through-hole printed circuit board so as to have an opening on both the inner peripheral surface and both ends subjected to the metal conductive film, and to penetrate the conductor pattern;
Among the openings, a first resist film that blocks from one opening to the middle of the inner peripheral surface, a two-layer resist film formed of a second resist film formed on the upper surface of the first resist film,
A semiconductor bare chip disposed on a conductor pattern of the double-sided through-hole printed circuit board on the two-layer resist film side;
A resin for sealing so as to cover the semiconductor bare chip;
A surface mount type semiconductor electronic component comprising: a. 前記ハーフスルーホールの前記第１レジスト膜と接触する面に粗化処理が施されていることを特徴とする請求項８に記載の表面実装型半導体電子部品。 9. The surface mount semiconductor electronic component according to claim 8 , wherein a surface of the half through hole that comes into contact with the first resist film is roughened . 前記第１レジスト膜は、前記第２レジスト膜により覆われていることを特徴とする請求項８または９のいずれか１項に記載の表面実装型半導体電子部品。 The surface-mount semiconductor electronic component according to claim 8, wherein the first resist film is covered with the second resist film . 絶縁基板上に多数の独立した導体パターンが両面に配設された、両面スルーホールプリント基板と、
金属導電膜が施された内周面と両端に開口部を有し、前記導体パターンを貫通するように前記両面スルーホールプリント基板に配設されるハーフスルーホールと、
前記開口部の一方の開口部を塞ぐプリプレグと、
前記開口部から前記内周面の途中までを塞ぐプリプレグおよびプリプレグに含浸された熱硬化性樹脂と、
前記プリプレグ側の前記両面スルーホールプリント基板の導体パターン上に配置される半導体ベアチップと、
前記半導体ベアチップを覆うように封止する樹脂と、
を備えることを特徴とする表面実装型半導体電子部品。 A double-sided through-hole printed circuit board in which a large number of independent conductor patterns are arranged on both sides on an insulating board;
A half through hole disposed in the double-sided through-hole printed circuit board so as to have an opening on both the inner peripheral surface and both ends subjected to the metal conductive film, and to penetrate the conductor pattern;
A prepreg that closes one of the openings;
A thermosetting resin impregnated in the prepreg and the prepreg that plugs from the opening to the middle of the inner peripheral surface;
A semiconductor bare chip disposed on a conductor pattern of the double-sided through-hole printed circuit board on the prepreg side;
A resin for sealing so as to cover the semiconductor bare chip;
A surface mount type semiconductor electronic component comprising: a.
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